git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         power-domains {
  49                 compatible = "xlnx,zynqmp-genpd";
  50
  51                 pd_usb0: pd-usb0 {
  52                         #power-domain-cells = <0x0>;
  53                         pd-id = <0x16>;
  54                 };
  55
  56                 pd_usb1: pd-usb1 {
  57                         #power-domain-cells = <0x0>;
  58                         pd-id = <0x17>;
  59                 };
  60
  61                 pd_sata: pd-sata {
  62                         #power-domain-cells = <0x0>;
  63                         pd-id = <0x1c>;
  64                 };
  65
  66                 pd_spi0: pd-spi0 {
  67                         #power-domain-cells = <0x0>;
  68                         pd-id = <0x23>;
  69                 };
  70
  71                 pd_spi1: pd-spi1 {
  72                         #power-domain-cells = <0x0>;
  73                         pd-id = <0x24>;
  74                 };
  75
  76                 pd_uart0: pd-uart0 {
  77                         #power-domain-cells = <0x0>;
  78                         pd-id = <0x21>;
  79                 };
  80
  81                 pd_uart1: pd-uart1 {
  82                         #power-domain-cells = <0x0>;
  83                         pd-id = <0x22>;
  84                 };
  85
  86                 pd_eth0: pd-eth0 {
  87                         #power-domain-cells = <0x0>;
  88                         pd-id = <0x1d>;
  89                 };
  90
  91                 pd_eth1: pd-eth1 {
  92                         #power-domain-cells = <0x0>;
  93                         pd-id = <0x1e>;
  94                 };
  95
  96                 pd_eth2: pd-eth2 {
  97                         #power-domain-cells = <0x0>;
  98                         pd-id = <0x1f>;
  99                 };
 100
 101                 pd_eth3: pd-eth3 {
 102                         #power-domain-cells = <0x0>;
 103                         pd-id = <0x20>;
 104                 };
 105
 106                 pd_i2c0: pd-i2c0 {
 107                         #power-domain-cells = <0x0>;
 108                         pd-id = <0x25>;
 109                 };
 110
 111                 pd_i2c1: pd-i2c1 {
 112                         #power-domain-cells = <0x0>;
 113                         pd-id = <0x26>;
 114                 };
 115
 116                 pd_dp: pd-dp {
 117                         /* fixme: what to attach to */
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x29>;
 120                 };
 121
 122                 pd_gdma: pd-gdma {
 123                         #power-domain-cells = <0x0>;
 124                         pd-id = <0x2a>;
 125                 };
 126
 127                 pd_adma: pd-adma {
 128                         #power-domain-cells = <0x0>;
 129                         pd-id = <0x2b>;
 130                 };
 131
 132                 pd_ttc0: pd-ttc0 {
 133                         #power-domain-cells = <0x0>;
 134                         pd-id = <0x18>;
 135                 };
 136
 137                 pd_ttc1: pd-ttc1 {
 138                         #power-domain-cells = <0x0>;
 139                         pd-id = <0x19>;
 140                 };
 141
 142                 pd_ttc2: pd-ttc2 {
 143                         #power-domain-cells = <0x0>;
 144                         pd-id = <0x1a>;
 145                 };
 146
 147                 pd_ttc3: pd-ttc3 {
 148                         #power-domain-cells = <0x0>;
 149                         pd-id = <0x1b>;
 150                 };
 151
 152                 pd_sd0: pd-sd0 {
 153                         #power-domain-cells = <0x0>;
 154                         pd-id = <0x27>;
 155                 };
 156
 157                 pd_sd1: pd-sd1 {
 158                         #power-domain-cells = <0x0>;
 159                         pd-id = <0x28>;
 160                 };
 161
 162                 pd_nand: pd-nand {
 163                         #power-domain-cells = <0x0>;
 164                         pd-id = <0x2c>;
 165                 };
 166
 167                 pd_qspi: pd-qspi {
 168                         #power-domain-cells = <0x0>;
 169                         pd-id = <0x2d>;
 170                 };
 171
 172                 pd_gpio: pd-gpio {
 173                         #power-domain-cells = <0x0>;
 174                         pd-id = <0x2e>;
 175                 };
 176
 177                 pd_can0: pd-can0 {
 178                         #power-domain-cells = <0x0>;
 179                         pd-id = <0x2f>;
 180                 };
 181
 182                 pd_can1: pd-can1 {
 183                         #power-domain-cells = <0x0>;
 184                         pd-id = <0x30>;
 185                 };
 186
 187                 pd_ddr: pd-ddr {
 188                         #power-domain-cells = <0x0>;
 189                         pd-id = <0x37>;
 190                 };
 191
 192                 pd_apll: pd-apll {
 193                         #power-domain-cells = <0x0>;
 194                         pd-id = <0x32>;
 195                 };
 196
 197                 pd_vpll: pd-vpll {
 198                         #power-domain-cells = <0x0>;
 199                         pd-id = <0x33>;
 200                 };
 201
 202                 pd_dpll: pd-dpll {
 203                         #power-domain-cells = <0x0>;
 204                         pd-id = <0x34>;
 205                 };
 206
 207                 pd_rpll: pd-rpll {
 208                         #power-domain-cells = <0x0>;
 209                         pd-id = <0x35>;
 210                 };
 211
 212                 pd_iopll: pd-iopll {
 213                         #power-domain-cells = <0x0>;
 214                         pd-id = <0x36>;
 215                 };
 216         };
 217
 218         pmu {
 219                 compatible = "arm,armv8-pmuv3";
 220                 interrupts = <0 143 4>,
 221                              <0 144 4>,
 222                              <0 145 4>,
 223                              <0 146 4>;
 224         };
 225
 226         psci {
 227                 compatible = "arm,psci-0.2";
 228                 method = "smc";
 229         };
 230
 231         firmware {
 232                 compatible = "xlnx,zynqmp-pm";
 233                 method = "smc";
 234         };
 235
 236         timer {
 237                 compatible = "arm,armv8-timer";
 238                 interrupt-parent = <&gic>;
 239                 interrupts = <1 13 0xf01>,
 240                              <1 14 0xf01>,
 241                              <1 11 0xf01>,
 242                              <1 10 0xf01>;
 243         };
 244
 245         amba_apu: amba_apu {
 246                 compatible = "simple-bus";
 247                 #address-cells = <2>;
 248                 #size-cells = <1>;
 249                 ranges;
 250
 251                 gic: interrupt-controller@f9010000 {
 252                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 253                         #interrupt-cells = <3>;
 254                         reg = <0x0 0xf9010000 0x10000>,
 255                               <0x0 0xf902f000 0x2000>,
 256                               <0x0 0xf9040000 0x20000>,
 257                               <0x0 0xf906f000 0x2000>;
 258                         interrupt-controller;
 259                         interrupt-parent = <&gic>;
 260                         interrupts = <1 9 0xf04>;
 261                 };
 262         };
 263
 264         amba: amba {
 265                 compatible = "simple-bus";
 266                 #address-cells = <2>;
 267                 #size-cells = <1>;
 268                 ranges;
 269
 270                 can0: can@ff060000 {
 271                         compatible = "xlnx,zynq-can-1.0";
 272                         status = "disabled";
 273                         clock-names = "can_clk", "pclk";
 274                         reg = <0x0 0xff060000 0x1000>;
 275                         interrupts = <0 23 4>;
 276                         interrupt-parent = <&gic>;
 277                         tx-fifo-depth = <0x40>;
 278                         rx-fifo-depth = <0x40>;
 279                         power-domains = <&pd_can0>;
 280                 };
 281
 282                 can1: can@ff070000 {
 283                         compatible = "xlnx,zynq-can-1.0";
 284                         status = "disabled";
 285                         clock-names = "can_clk", "pclk";
 286                         reg = <0x0 0xff070000 0x1000>;
 287                         interrupts = <0 24 4>;
 288                         interrupt-parent = <&gic>;
 289                         tx-fifo-depth = <0x40>;
 290                         rx-fifo-depth = <0x40>;
 291                         power-domains = <&pd_can1>;
 292                 };
 293
 294                 /* GDMA */
 295                 fpd_dma_chan1: dma@fd500000 {
 296                         status = "disabled";
 297                         compatible = "xlnx,zynqmp-dma-1.0";
 298                         reg = <0x0 0xfd500000 0x1000>;
 299                         interrupt-parent = <&gic>;
 300                         interrupts = <0 124 4>;
 301                         xlnx,id = <0>;
 302                         xlnx,bus-width = <128>;
 303                         power-domains = <&pd_gdma>;
 304                 };
 305
 306                 fpd_dma_chan2: dma@fd510000 {
 307                         status = "disabled";
 308                         compatible = "xlnx,zynqmp-dma-1.0";
 309                         reg = <0x0 0xfd510000 0x1000>;
 310                         interrupt-parent = <&gic>;
 311                         interrupts = <0 125 4>;
 312                         xlnx,id = <1>;
 313                         xlnx,bus-width = <128>;
 314                         power-domains = <&pd_gdma>;
 315                 };
 316
 317                 fpd_dma_chan3: dma@fd520000 {
 318                         status = "disabled";
 319                         compatible = "xlnx,zynqmp-dma-1.0";
 320                         reg = <0x0 0xfd520000 0x1000>;
 321                         interrupt-parent = <&gic>;
 322                         interrupts = <0 126 4>;
 323                         xlnx,id = <2>;
 324                         xlnx,bus-width = <128>;
 325                         power-domains = <&pd_gdma>;
 326                 };
 327
 328                 fpd_dma_chan4: dma@fd530000 {
 329                         status = "disabled";
 330                         compatible = "xlnx,zynqmp-dma-1.0";
 331                         reg = <0x0 0xfd530000 0x1000>;
 332                         interrupt-parent = <&gic>;
 333                         interrupts = <0 127 4>;
 334                         xlnx,id = <3>;
 335                         xlnx,bus-width = <128>;
 336                         power-domains = <&pd_gdma>;
 337                 };
 338
 339                 fpd_dma_chan5: dma@fd540000 {
 340                         status = "disabled";
 341                         compatible = "xlnx,zynqmp-dma-1.0";
 342                         reg = <0x0 0xfd540000 0x1000>;
 343                         interrupt-parent = <&gic>;
 344                         interrupts = <0 128 4>;
 345                         xlnx,id = <4>;
 346                         xlnx,bus-width = <128>;
 347                         power-domains = <&pd_gdma>;
 348                 };
 349
 350                 fpd_dma_chan6: dma@fd550000 {
 351                         status = "disabled";
 352                         compatible = "xlnx,zynqmp-dma-1.0";
 353                         reg = <0x0 0xfd550000 0x1000>;
 354                         interrupt-parent = <&gic>;
 355                         interrupts = <0 129 4>;
 356                         xlnx,id = <5>;
 357                         xlnx,bus-width = <128>;
 358                         power-domains = <&pd_gdma>;
 359                 };
 360
 361                 fpd_dma_chan7: dma@fd560000 {
 362                         status = "disabled";
 363                         compatible = "xlnx,zynqmp-dma-1.0";
 364                         reg = <0x0 0xfd560000 0x1000>;
 365                         interrupt-parent = <&gic>;
 366                         interrupts = <0 130 4>;
 367                         xlnx,id = <6>;
 368                         xlnx,bus-width = <128>;
 369                         power-domains = <&pd_gdma>;
 370                 };
 371
 372                 fpd_dma_chan8: dma@fd570000 {
 373                         status = "disabled";
 374                         compatible = "xlnx,zynqmp-dma-1.0";
 375                         reg = <0x0 0xfd570000 0x1000>;
 376                         interrupt-parent = <&gic>;
 377                         interrupts = <0 131 4>;
 378                         xlnx,id = <7>;
 379                         xlnx,bus-width = <128>;
 380                         power-domains = <&pd_gdma>;
 381                 };
 382
 383                 gpu: gpu@fd4b0000 {
 384                         status = "disabled";
 385                         compatible = "arm,mali-400", "arm,mali-utgard";
 386                         reg = <0x0 0xfd4b0000 0x30000>;
 387                         interrupt-parent = <&gic>;
 388                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 389                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 390                 };
 391
 392                 /* ADMA */
 393                 lpd_dma_chan1: dma@ffa80000 {
 394                         status = "disabled";
 395                         compatible = "xlnx,zynqmp-dma-1.0";
 396                         reg = <0x0 0xffa80000 0x1000>;
 397                         interrupt-parent = <&gic>;
 398                         interrupts = <0 77 4>;
 399                         xlnx,id = <0>;
 400                         xlnx,bus-width = <64>;
 401                         power-domains = <&pd_adma>;
 402                 };
 403
 404                 lpd_dma_chan2: dma@ffa90000 {
 405                         status = "disabled";
 406                         compatible = "xlnx,zynqmp-dma-1.0";
 407                         reg = <0x0 0xffa90000 0x1000>;
 408                         interrupt-parent = <&gic>;
 409                         interrupts = <0 78 4>;
 410                         xlnx,id = <1>;
 411                         xlnx,bus-width = <64>;
 412                         power-domains = <&pd_adma>;
 413                 };
 414
 415                 lpd_dma_chan3: dma@ffaa0000 {
 416                         status = "disabled";
 417                         compatible = "xlnx,zynqmp-dma-1.0";
 418                         reg = <0x0 0xffaa0000 0x1000>;
 419                         interrupt-parent = <&gic>;
 420                         interrupts = <0 79 4>;
 421                         xlnx,id = <2>;
 422                         xlnx,bus-width = <64>;
 423                         power-domains = <&pd_adma>;
 424                 };
 425
 426                 lpd_dma_chan4: dma@ffab0000 {
 427                         status = "disabled";
 428                         compatible = "xlnx,zynqmp-dma-1.0";
 429                         reg = <0x0 0xffab0000 0x1000>;
 430                         interrupt-parent = <&gic>;
 431                         interrupts = <0 80 4>;
 432                         xlnx,id = <3>;
 433                         xlnx,bus-width = <64>;
 434                         power-domains = <&pd_adma>;
 435                 };
 436
 437                 lpd_dma_chan5: dma@ffac0000 {
 438                         status = "disabled";
 439                         compatible = "xlnx,zynqmp-dma-1.0";
 440                         reg = <0x0 0xffac0000 0x1000>;
 441                         interrupt-parent = <&gic>;
 442                         interrupts = <0 81 4>;
 443                         xlnx,id = <4>;
 444                         xlnx,bus-width = <64>;
 445                         power-domains = <&pd_adma>;
 446                 };
 447
 448                 lpd_dma_chan6: dma@ffad0000 {
 449                         status = "disabled";
 450                         compatible = "xlnx,zynqmp-dma-1.0";
 451                         reg = <0x0 0xffad0000 0x1000>;
 452                         interrupt-parent = <&gic>;
 453                         interrupts = <0 82 4>;
 454                         xlnx,id = <5>;
 455                         xlnx,bus-width = <64>;
 456                         power-domains = <&pd_adma>;
 457                 };
 458
 459                 lpd_dma_chan7: dma@ffae0000 {
 460                         status = "disabled";
 461                         compatible = "xlnx,zynqmp-dma-1.0";
 462                         reg = <0x0 0xffae0000 0x1000>;
 463                         interrupt-parent = <&gic>;
 464                         interrupts = <0 83 4>;
 465                         xlnx,id = <6>;
 466                         xlnx,bus-width = <64>;
 467                         power-domains = <&pd_adma>;
 468                 };
 469
 470                 lpd_dma_chan8: dma@ffaf0000 {
 471                         status = "disabled";
 472                         compatible = "xlnx,zynqmp-dma-1.0";
 473                         reg = <0x0 0xffaf0000 0x1000>;
 474                         interrupt-parent = <&gic>;
 475                         interrupts = <0 84 4>;
 476                         xlnx,id = <7>;
 477                         xlnx,bus-width = <64>;
 478                         power-domains = <&pd_adma>;
 479                 };
 480
 481                 nand0: nand@ff100000 {
 482                         compatible = "arasan,nfc-v3p10";
 483                         status = "disabled";
 484                         reg = <0x0 0xff100000 0x1000>;
 485                         clock-names = "clk_sys", "clk_flash";
 486                         interrupt-parent = <&gic>;
 487                         interrupts = <0 14 4>;
 488                         #address-cells = <2>;
 489                         #size-cells = <1>;
 490                         power-domains = <&pd_nand>;
 491                 };
 492
 493                 gem0: ethernet@ff0b0000 {
 494                         compatible = "cdns,zynqmp-gem";
 495                         status = "disabled";
 496                         interrupt-parent = <&gic>;
 497                         interrupts = <0 57 4>, <0 57 4>;
 498                         reg = <0x0 0xff0b0000 0x1000>;
 499                         clock-names = "pclk", "hclk", "tx_clk";
 500                         #address-cells = <1>;
 501                         #size-cells = <0>;
 502                         #stream-id-cells = <1>;
 503                         power-domains = <&pd_eth0>;
 504                 };
 505
 506                 gem1: ethernet@ff0c0000 {
 507                         compatible = "cdns,zynqmp-gem";
 508                         status = "disabled";
 509                         interrupt-parent = <&gic>;
 510                         interrupts = <0 59 4>, <0 59 4>;
 511                         reg = <0x0 0xff0c0000 0x1000>;
 512                         clock-names = "pclk", "hclk", "tx_clk";
 513                         #address-cells = <1>;
 514                         #size-cells = <0>;
 515                         #stream-id-cells = <1>;
 516                         power-domains = <&pd_eth1>;
 517                 };
 518
 519                 gem2: ethernet@ff0d0000 {
 520                         compatible = "cdns,zynqmp-gem";
 521                         status = "disabled";
 522                         interrupt-parent = <&gic>;
 523                         interrupts = <0 61 4>, <0 61 4>;
 524                         reg = <0x0 0xff0d0000 0x1000>;
 525                         clock-names = "pclk", "hclk", "tx_clk";
 526                         #address-cells = <1>;
 527                         #size-cells = <0>;
 528                         #stream-id-cells = <1>;
 529                         power-domains = <&pd_eth2>;
 530                 };
 531
 532                 gem3: ethernet@ff0e0000 {
 533                         compatible = "cdns,zynqmp-gem";
 534                         status = "disabled";
 535                         interrupt-parent = <&gic>;
 536                         interrupts = <0 63 4>, <0 63 4>;
 537                         reg = <0x0 0xff0e0000 0x1000>;
 538                         clock-names = "pclk", "hclk", "tx_clk";
 539                         #address-cells = <1>;
 540                         #size-cells = <0>;
 541                         #stream-id-cells = <1>;
 542                         power-domains = <&pd_eth3>;
 543                 };
 544
 545                 gpio: gpio@ff0a0000 {
 546                         compatible = "xlnx,zynqmp-gpio-1.0";
 547                         status = "disabled";
 548                         #gpio-cells = <0x2>;
 549                         interrupt-parent = <&gic>;
 550                         interrupts = <0 16 4>;
 551                         reg = <0x0 0xff0a0000 0x1000>;
 552                         power-domains = <&pd_gpio>;
 553                 };
 554
 555                 i2c0: i2c@ff020000 {
 556                         compatible = "cdns,i2c-r1p10";
 557                         status = "disabled";
 558                         interrupt-parent = <&gic>;
 559                         interrupts = <0 17 4>;
 560                         reg = <0x0 0xff020000 0x1000>;
 561                         #address-cells = <1>;
 562                         #size-cells = <0>;
 563                         power-domains = <&pd_i2c0>;
 564                 };
 565
 566                 i2c1: i2c@ff030000 {
 567                         compatible = "cdns,i2c-r1p10";
 568                         status = "disabled";
 569                         interrupt-parent = <&gic>;
 570                         interrupts = <0 18 4>;
 571                         reg = <0x0 0xff030000 0x1000>;
 572                         #address-cells = <1>;
 573                         #size-cells = <0>;
 574                         power-domains = <&pd_i2c1>;
 575                 };
 576
 577                 pcie: pcie@fd0e0000 {
 578                         compatible = "xlnx,nwl-pcie-2.11";
 579                         status = "disabled";
 580                         #address-cells = <3>;
 581                         #size-cells = <2>;
 582                         #interrupt-cells = <1>;
 583                         device_type = "pci";
 584                         interrupt-parent = <&gic>;
 585                         interrupts = < 0 118 4>,
 586                                      < 0 116 4>,
 587                                      < 0 115 4>,        /* MSI_1 [63...32] */
 588                                      < 0 114 4 >;       /* MSI_0 [31...0] */
 589                         interrupt-names = "misc", "intx", "msi_1", "msi_0";
 590                         reg = <0x0 0xfd0e0000 0x1000>,
 591                               <0x0 0xfd480000 0x1000>,
 592                               <0x0 0xe0000000 0x1000000>;
 593                         reg-names = "breg", "pcireg", "cfg";
 594                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 595                 };
 596
 597                 qspi: spi@ff0f0000 {
 598                         compatible = "xlnx,zynqmp-qspi-1.0";
 599                         status = "disabled";
 600                         clock-names = "ref_clk", "pclk";
 601                         interrupts = <0 15 4>;
 602                         interrupt-parent = <&gic>;
 603                         num-cs = <1>;
 604                         reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
 605                         #address-cells = <1>;
 606                         #size-cells = <0>;
 607                         power-domains = <&pd_qspi>;
 608                 };
 609
 610                 rtc: rtc@ffa60000 {
 611                         compatible = "xlnx,zynqmp-rtc";
 612                         status = "disabled";
 613                         reg = <0x0 0xffa60000 0x100>;
 614                         interrupt-parent = <&gic>;
 615                         interrupts = <0 26 4>, <0 27 4>;
 616                         interrupt-names = "alarm", "sec";
 617                 };
 618
 619                 sata: ahci@fd0c0000 {
 620                         compatible = "ceva,ahci-1v84";
 621                         status = "disabled";
 622                         reg = <0x0 0xfd0c0000 0x2000>;
 623                         interrupt-parent = <&gic>;
 624                         interrupts = <0 133 4>;
 625                         power-domains = <&pd_sata>;
 626                 };
 627
 628                 sdhci0: sdhci@ff160000 {
 629                         compatible = "arasan,sdhci-8.9a";
 630                         status = "disabled";
 631                         interrupt-parent = <&gic>;
 632                         interrupts = <0 48 4>;
 633                         reg = <0x0 0xff160000 0x1000>;
 634                         clock-names = "clk_xin", "clk_ahb";
 635                         broken-tuning;
 636                         power-domains = <&pd_sd0>;
 637                 };
 638
 639                 sdhci1: sdhci@ff170000 {
 640                         compatible = "arasan,sdhci-8.9a";
 641                         status = "disabled";
 642                         interrupt-parent = <&gic>;
 643                         interrupts = <0 49 4>;
 644                         reg = <0x0 0xff170000 0x1000>;
 645                         clock-names = "clk_xin", "clk_ahb";
 646                         broken-tuning;
 647                         power-domains = <&pd_sd1>;
 648                 };
 649
 650                 smmu: smmu@fd800000 {
 651                         compatible = "arm,mmu-500";
 652                         reg = <0x0 0xfd800000 0x20000>;
 653                         #global-interrupts = <1>;
 654                         interrupt-parent = <&gic>;
 655                         interrupts = <0 155 4>,
 656                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 657                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 658                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 659                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 660                         mmu-masters = < &gem0 0x874
 661                                         &gem1 0x875
 662                                         &gem2 0x876
 663                                         &gem3 0x877 >;
 664                 };
 665
 666                 spi0: spi@ff040000 {
 667                         compatible = "cdns,spi-r1p6";
 668                         status = "disabled";
 669                         interrupt-parent = <&gic>;
 670                         interrupts = <0 19 4>;
 671                         reg = <0x0 0xff040000 0x1000>;
 672                         clock-names = "ref_clk", "pclk";
 673                         #address-cells = <1>;
 674                         #size-cells = <0>;
 675                         power-domains = <&pd_spi0>;
 676                 };
 677
 678                 spi1: spi@ff050000 {
 679                         compatible = "cdns,spi-r1p6";
 680                         status = "disabled";
 681                         interrupt-parent = <&gic>;
 682                         interrupts = <0 20 4>;
 683                         reg = <0x0 0xff050000 0x1000>;
 684                         clock-names = "ref_clk", "pclk";
 685                         #address-cells = <1>;
 686                         #size-cells = <0>;
 687                         power-domains = <&pd_spi1>;
 688                 };
 689
 690                 ttc0: timer@ff110000 {
 691                         compatible = "cdns,ttc";
 692                         status = "disabled";
 693                         interrupt-parent = <&gic>;
 694                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 695                         reg = <0x0 0xff110000 0x1000>;
 696                         timer-width = <32>;
 697                         power-domains = <&pd_ttc0>;
 698                 };
 699
 700                 ttc1: timer@ff120000 {
 701                         compatible = "cdns,ttc";
 702                         status = "disabled";
 703                         interrupt-parent = <&gic>;
 704                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 705                         reg = <0x0 0xff120000 0x1000>;
 706                         timer-width = <32>;
 707                         power-domains = <&pd_ttc1>;
 708                 };
 709
 710                 ttc2: timer@ff130000 {
 711                         compatible = "cdns,ttc";
 712                         status = "disabled";
 713                         interrupt-parent = <&gic>;
 714                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 715                         reg = <0x0 0xff130000 0x1000>;
 716                         timer-width = <32>;
 717                         power-domains = <&pd_ttc2>;
 718                 };
 719
 720                 ttc3: timer@ff140000 {
 721                         compatible = "cdns,ttc";
 722                         status = "disabled";
 723                         interrupt-parent = <&gic>;
 724                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 725                         reg = <0x0 0xff140000 0x1000>;
 726                         timer-width = <32>;
 727                         power-domains = <&pd_ttc3>;
 728                 };
 729
 730                 uart0: serial@ff000000 {
 731                         compatible = "cdns,uart-r1p12";
 732                         status = "disabled";
 733                         interrupt-parent = <&gic>;
 734                         interrupts = <0 21 4>;
 735                         reg = <0x0 0xff000000 0x1000>;
 736                         clock-names = "uart_clk", "pclk";
 737                         power-domains = <&pd_uart0>;
 738                 };
 739
 740                 uart1: serial@ff010000 {
 741                         compatible = "cdns,uart-r1p12";
 742                         status = "disabled";
 743                         interrupt-parent = <&gic>;
 744                         interrupts = <0 22 4>;
 745                         reg = <0x0 0xff010000 0x1000>;
 746                         clock-names = "uart_clk", "pclk";
 747                         power-domains = <&pd_uart1>;
 748                 };
 749
 750                 usb0: usb@fe200000 {
 751                         compatible = "snps,dwc3";
 752                         status = "disabled";
 753                         interrupt-parent = <&gic>;
 754                         interrupts = <0 65 4>;
 755                         reg = <0x0 0xfe200000 0x40000>;
 756                         clock-names = "clk_xin", "clk_ahb";
 757                         power-domains = <&pd_usb0>;
 758                 };
 759
 760                 usb1: usb@fe300000 {
 761                         compatible = "snps,dwc3";
 762                         status = "disabled";
 763                         interrupt-parent = <&gic>;
 764                         interrupts = <0 70 4>;
 765                         reg = <0x0 0xfe300000 0x40000>;
 766                         clock-names = "clk_xin", "clk_ahb";
 767                         power-domains = <&pd_usb1>;
 768                 };
 769
 770                 watchdog0: watchdog@fd4d0000 {
 771                         compatible = "cdns,wdt-r1p2";
 772                         status = "disabled";
 773                         interrupt-parent = <&gic>;
 774                         interrupts = <0 113 1>;
 775                         reg = <0x0 0xfd4d0000 0x1000>;
 776                         timeout-sec = <10>;
 777                 };
 778
 779                 xilinx_drm: xilinx_drm {
 780                         compatible = "xlnx,drm";
 781                         status = "disabled";
 782                         xlnx,encoder-slave = <&xlnx_dp>;
 783                         xlnx,connector-type = "DisplayPort";
 784                         xlnx,dp-sub = <&xlnx_dp_sub>;
 785                         planes {
 786                                 xlnx,pixel-format = "rgb565";
 787                                 plane0 {
 788                                         dmas = <&xlnx_dpdma 3>;
 789                                         dma-names = "dma";
 790                                 };
 791                                 plane1 {
 792                                         dmas = <&xlnx_dpdma 0>;
 793                                         dma-names = "dma";
 794                                 };
 795                         };
 796                 };
 797
 798                 xlnx_dp: dp@43c00000 {
 799                         compatible = "xlnx,v-dp";
 800                         status = "disabled";
 801                         reg = <0x0 0xfd4a0000 0x1000>;
 802                         interrupts = <0 119 4>;
 803                         interrupt-parent = <&gic>;
 804                         clock-names = "aclk", "aud_clk";
 805                         xlnx,dp-version = "v1.2";
 806                         xlnx,max-lanes = <2>;
 807                         xlnx,max-link-rate = <540000>;
 808                         xlnx,max-bpc = <16>;
 809                         xlnx,enable-ycrcb;
 810                         xlnx,colormetry = "rgb";
 811                         xlnx,bpc = <8>;
 812                         xlnx,audio-chan = <2>;
 813                         xlnx,dp-sub = <&xlnx_dp_sub>;
 814                 };
 815
 816                 xlnx_dp_snd_card: dp_snd_card {
 817                         compatible = "xlnx,dp-snd-card";
 818                         status = "disabled";
 819                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 820                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 821                 };
 822
 823                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 824                         compatible = "xlnx,dp-snd-codec";
 825                         status = "disabled";
 826                         clock-names = "aud_clk";
 827                 };
 828
 829                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 830                         compatible = "xlnx,dp-snd-pcm";
 831                         status = "disabled";
 832                         dmas = <&xlnx_dpdma 4>;
 833                         dma-names = "tx";
 834                 };
 835
 836                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 837                         compatible = "xlnx,dp-snd-pcm";
 838                         status = "disabled";
 839                         dmas = <&xlnx_dpdma 5>;
 840                         dma-names = "tx";
 841                 };
 842
 843                 xlnx_dp_sub: dp_sub@43c0a000 {
 844                         compatible = "xlnx,dp-sub";
 845                         status = "disabled";
 846                         reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
 847                         reg-names = "blend", "av_buf", "aud";
 848                         xlnx,output-fmt = "rgb";
 849                 };
 850
 851                 xlnx_dpdma: dma@fd4c0000 {
 852                         compatible = "xlnx,dpdma";
 853                         status = "disabled";
 854                         reg = <0x0 0xfd4c0000 0x1000>;
 855                         interrupts = <0 122 4>;
 856                         interrupt-parent = <&gic>;
 857                         clock-names = "axi_clk";
 858                         dma-channels = <6>;
 859                         #dma-cells = <1>;
 860                         dma-video0channel@43c10000 {
 861                                 compatible = "xlnx,video0";
 862                         };
 863                         dma-video1channel@43c10000 {
 864                                 compatible = "xlnx,video1";
 865                         };
 866                         dma-video2channel@43c10000 {
 867                                 compatible = "xlnx,video2";
 868                         };
 869                         dma-graphicschannel@43c10000 {
 870                                 compatible = "xlnx,graphics";
 871                         };
 872                         dma-audio0channel@43c10000 {
 873                                 compatible = "xlnx,audio0";
 874                         };
 875                         dma-audio1channel@43c10000 {
 876                                 compatible = "xlnx,audio1";
 877                         };
 878                 };
 879         };
 880 };