git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <2>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         dcc: dcc {
  49                 compatible = "arm,dcc";
  50                 status = "disabled";
  51                 u-boot,dm-pre-reloc;
  52         };
  53
  54         power-domains {
  55                 compatible = "xlnx,zynqmp-genpd";
  56
  57                 pd_usb0: pd-usb0 {
  58                         #power-domain-cells = <0x0>;
  59                         pd-id = <0x16>;
  60                 };
  61
  62                 pd_usb1: pd-usb1 {
  63                         #power-domain-cells = <0x0>;
  64                         pd-id = <0x17>;
  65                 };
  66
  67                 pd_sata: pd-sata {
  68                         #power-domain-cells = <0x0>;
  69                         pd-id = <0x1c>;
  70                 };
  71
  72                 pd_spi0: pd-spi0 {
  73                         #power-domain-cells = <0x0>;
  74                         pd-id = <0x23>;
  75                 };
  76
  77                 pd_spi1: pd-spi1 {
  78                         #power-domain-cells = <0x0>;
  79                         pd-id = <0x24>;
  80                 };
  81
  82                 pd_uart0: pd-uart0 {
  83                         #power-domain-cells = <0x0>;
  84                         pd-id = <0x21>;
  85                 };
  86
  87                 pd_uart1: pd-uart1 {
  88                         #power-domain-cells = <0x0>;
  89                         pd-id = <0x22>;
  90                 };
  91
  92                 pd_eth0: pd-eth0 {
  93                         #power-domain-cells = <0x0>;
  94                         pd-id = <0x1d>;
  95                 };
  96
  97                 pd_eth1: pd-eth1 {
  98                         #power-domain-cells = <0x0>;
  99                         pd-id = <0x1e>;
 100                 };
 101
 102                 pd_eth2: pd-eth2 {
 103                         #power-domain-cells = <0x0>;
 104                         pd-id = <0x1f>;
 105                 };
 106
 107                 pd_eth3: pd-eth3 {
 108                         #power-domain-cells = <0x0>;
 109                         pd-id = <0x20>;
 110                 };
 111
 112                 pd_i2c0: pd-i2c0 {
 113                         #power-domain-cells = <0x0>;
 114                         pd-id = <0x25>;
 115                 };
 116
 117                 pd_i2c1: pd-i2c1 {
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x26>;
 120                 };
 121
 122                 pd_dp: pd-dp {
 123                         /* fixme: what to attach to */
 124                         #power-domain-cells = <0x0>;
 125                         pd-id = <0x29>;
 126                 };
 127
 128                 pd_gdma: pd-gdma {
 129                         #power-domain-cells = <0x0>;
 130                         pd-id = <0x2a>;
 131                 };
 132
 133                 pd_adma: pd-adma {
 134                         #power-domain-cells = <0x0>;
 135                         pd-id = <0x2b>;
 136                 };
 137
 138                 pd_ttc0: pd-ttc0 {
 139                         #power-domain-cells = <0x0>;
 140                         pd-id = <0x18>;
 141                 };
 142
 143                 pd_ttc1: pd-ttc1 {
 144                         #power-domain-cells = <0x0>;
 145                         pd-id = <0x19>;
 146                 };
 147
 148                 pd_ttc2: pd-ttc2 {
 149                         #power-domain-cells = <0x0>;
 150                         pd-id = <0x1a>;
 151                 };
 152
 153                 pd_ttc3: pd-ttc3 {
 154                         #power-domain-cells = <0x0>;
 155                         pd-id = <0x1b>;
 156                 };
 157
 158                 pd_sd0: pd-sd0 {
 159                         #power-domain-cells = <0x0>;
 160                         pd-id = <0x27>;
 161                 };
 162
 163                 pd_sd1: pd-sd1 {
 164                         #power-domain-cells = <0x0>;
 165                         pd-id = <0x28>;
 166                 };
 167
 168                 pd_nand: pd-nand {
 169                         #power-domain-cells = <0x0>;
 170                         pd-id = <0x2c>;
 171                 };
 172
 173                 pd_qspi: pd-qspi {
 174                         #power-domain-cells = <0x0>;
 175                         pd-id = <0x2d>;
 176                 };
 177
 178                 pd_gpio: pd-gpio {
 179                         #power-domain-cells = <0x0>;
 180                         pd-id = <0x2e>;
 181                 };
 182
 183                 pd_can0: pd-can0 {
 184                         #power-domain-cells = <0x0>;
 185                         pd-id = <0x2f>;
 186                 };
 187
 188                 pd_can1: pd-can1 {
 189                         #power-domain-cells = <0x0>;
 190                         pd-id = <0x30>;
 191                 };
 192
 193                 pd_pcie: pd-pcie {
 194                         #power-domain-cells = <0x0>;
 195                         pd-id = <0x3b>;
 196                 };
 197
 198                 pd_gpu: pd-gpu {
 199                         #power-domain-cells = <0x0>;
 200                         pd-id = <0x3a 0x14 0x15>;
 201                 };
 202         };
 203
 204         pmu {
 205                 compatible = "arm,armv8-pmuv3";
 206                 interrupt-parent = <&gic>;
 207                 interrupts = <0 143 4>,
 208                              <0 144 4>,
 209                              <0 145 4>,
 210                              <0 146 4>;
 211         };
 212
 213         psci {
 214                 compatible = "arm,psci-0.2";
 215                 method = "smc";
 216         };
 217
 218         firmware {
 219                 compatible = "xlnx,zynqmp-pm";
 220                 method = "smc";
 221         };
 222
 223         timer {
 224                 compatible = "arm,armv8-timer";
 225                 interrupt-parent = <&gic>;
 226                 interrupts = <1 13 0xf01>,
 227                              <1 14 0xf01>,
 228                              <1 11 0xf01>,
 229                              <1 10 0xf01>;
 230         };
 231
 232         edac {
 233                 compatible = "arm,cortex-a53-edac";
 234         };
 235
 236         pcap {
 237                 compatible = "xlnx,zynqmp-pcap-fpga";
 238         };
 239
 240         amba_apu: amba_apu@0 {
 241                 compatible = "simple-bus";
 242                 #address-cells = <2>;
 243                 #size-cells = <1>;
 244                 ranges = <0 0 0 0 0xffffffff>;
 245
 246                 gic: interrupt-controller@f9010000 {
 247                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 248                         #interrupt-cells = <3>;
 249                         reg = <0x0 0xf9010000 0x10000>,
 250                               <0x0 0xf9020000 0x20000>,
 251                               <0x0 0xf9040000 0x20000>,
 252                               <0x0 0xf9060000 0x20000>;
 253                         interrupt-controller;
 254                         interrupt-parent = <&gic>;
 255                         interrupts = <1 9 0xf04>;
 256                 };
 257         };
 258
 259         amba: amba@0 {
 260                 compatible = "simple-bus";
 261                 u-boot,dm-pre-reloc;
 262                 #address-cells = <2>;
 263                 #size-cells = <1>;
 264                 ranges = <0 0 0 0 0xffffffff>;
 265
 266                 can0: can@ff060000 {
 267                         compatible = "xlnx,zynq-can-1.0";
 268                         status = "disabled";
 269                         clock-names = "can_clk", "pclk";
 270                         reg = <0x0 0xff060000 0x1000>;
 271                         interrupts = <0 23 4>;
 272                         interrupt-parent = <&gic>;
 273                         tx-fifo-depth = <0x40>;
 274                         rx-fifo-depth = <0x40>;
 275                         power-domains = <&pd_can0>;
 276                 };
 277
 278                 can1: can@ff070000 {
 279                         compatible = "xlnx,zynq-can-1.0";
 280                         status = "disabled";
 281                         clock-names = "can_clk", "pclk";
 282                         reg = <0x0 0xff070000 0x1000>;
 283                         interrupts = <0 24 4>;
 284                         interrupt-parent = <&gic>;
 285                         tx-fifo-depth = <0x40>;
 286                         rx-fifo-depth = <0x40>;
 287                         power-domains = <&pd_can1>;
 288                 };
 289
 290                 cci: cci@fd6e0000 {
 291                         compatible = "arm,cci-400";
 292                         reg = <0x0 0xfd6e0000 0x9000>;
 293                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 294                         #address-cells = <1>;
 295                         #size-cells = <1>;
 296
 297                         pmu@9000 {
 298                                 compatible = "arm,cci-400-pmu,r1";
 299                                 reg = <0x9000 0x5000>;
 300                                 interrupt-parent = <&gic>;
 301                                 interrupts = <0 123 4>,
 302                                              <0 123 4>,
 303                                              <0 123 4>,
 304                                              <0 123 4>,
 305                                              <0 123 4>;
 306                         };
 307                 };
 308
 309                 /* GDMA */
 310                 fpd_dma_chan1: dma@fd500000 {
 311                         status = "disabled";
 312                         compatible = "xlnx,zynqmp-dma-1.0";
 313                         reg = <0x0 0xfd500000 0x1000>;
 314                         interrupt-parent = <&gic>;
 315                         interrupts = <0 124 4>;
 316                         clock-names = "clk_main", "clk_apb";
 317                         xlnx,bus-width = <128>;
 318                         power-domains = <&pd_gdma>;
 319                 };
 320
 321                 fpd_dma_chan2: dma@fd510000 {
 322                         status = "disabled";
 323                         compatible = "xlnx,zynqmp-dma-1.0";
 324                         reg = <0x0 0xfd510000 0x1000>;
 325                         interrupt-parent = <&gic>;
 326                         interrupts = <0 125 4>;
 327                         clock-names = "clk_main", "clk_apb";
 328                         xlnx,bus-width = <128>;
 329                         power-domains = <&pd_gdma>;
 330                 };
 331
 332                 fpd_dma_chan3: dma@fd520000 {
 333                         status = "disabled";
 334                         compatible = "xlnx,zynqmp-dma-1.0";
 335                         reg = <0x0 0xfd520000 0x1000>;
 336                         interrupt-parent = <&gic>;
 337                         interrupts = <0 126 4>;
 338                         clock-names = "clk_main", "clk_apb";
 339                         xlnx,bus-width = <128>;
 340                         power-domains = <&pd_gdma>;
 341                 };
 342
 343                 fpd_dma_chan4: dma@fd530000 {
 344                         status = "disabled";
 345                         compatible = "xlnx,zynqmp-dma-1.0";
 346                         reg = <0x0 0xfd530000 0x1000>;
 347                         interrupt-parent = <&gic>;
 348                         interrupts = <0 127 4>;
 349                         clock-names = "clk_main", "clk_apb";
 350                         xlnx,bus-width = <128>;
 351                         power-domains = <&pd_gdma>;
 352                 };
 353
 354                 fpd_dma_chan5: dma@fd540000 {
 355                         status = "disabled";
 356                         compatible = "xlnx,zynqmp-dma-1.0";
 357                         reg = <0x0 0xfd540000 0x1000>;
 358                         interrupt-parent = <&gic>;
 359                         interrupts = <0 128 4>;
 360                         clock-names = "clk_main", "clk_apb";
 361                         xlnx,bus-width = <128>;
 362                         power-domains = <&pd_gdma>;
 363                 };
 364
 365                 fpd_dma_chan6: dma@fd550000 {
 366                         status = "disabled";
 367                         compatible = "xlnx,zynqmp-dma-1.0";
 368                         reg = <0x0 0xfd550000 0x1000>;
 369                         interrupt-parent = <&gic>;
 370                         interrupts = <0 129 4>;
 371                         clock-names = "clk_main", "clk_apb";
 372                         xlnx,bus-width = <128>;
 373                         power-domains = <&pd_gdma>;
 374                 };
 375
 376                 fpd_dma_chan7: dma@fd560000 {
 377                         status = "disabled";
 378                         compatible = "xlnx,zynqmp-dma-1.0";
 379                         reg = <0x0 0xfd560000 0x1000>;
 380                         interrupt-parent = <&gic>;
 381                         interrupts = <0 130 4>;
 382                         clock-names = "clk_main", "clk_apb";
 383                         xlnx,bus-width = <128>;
 384                         power-domains = <&pd_gdma>;
 385                 };
 386
 387                 fpd_dma_chan8: dma@fd570000 {
 388                         status = "disabled";
 389                         compatible = "xlnx,zynqmp-dma-1.0";
 390                         reg = <0x0 0xfd570000 0x1000>;
 391                         interrupt-parent = <&gic>;
 392                         interrupts = <0 131 4>;
 393                         clock-names = "clk_main", "clk_apb";
 394                         xlnx,bus-width = <128>;
 395                         power-domains = <&pd_gdma>;
 396                 };
 397
 398                 gpu: gpu@fd4b0000 {
 399                         status = "disabled";
 400                         compatible = "arm,mali-400", "arm,mali-utgard";
 401                         reg = <0x0 0xfd4b0000 0x30000>;
 402                         interrupt-parent = <&gic>;
 403                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 404                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 405                         power-domains = <&pd_gpu>;
 406                 };
 407
 408                 /* ADMA */
 409                 lpd_dma_chan1: dma@ffa80000 {
 410                         status = "disabled";
 411                         compatible = "xlnx,zynqmp-dma-1.0";
 412                         reg = <0x0 0xffa80000 0x1000>;
 413                         interrupt-parent = <&gic>;
 414                         interrupts = <0 77 4>;
 415                         xlnx,bus-width = <64>;
 416                         power-domains = <&pd_adma>;
 417                 };
 418
 419                 lpd_dma_chan2: dma@ffa90000 {
 420                         status = "disabled";
 421                         compatible = "xlnx,zynqmp-dma-1.0";
 422                         reg = <0x0 0xffa90000 0x1000>;
 423                         interrupt-parent = <&gic>;
 424                         interrupts = <0 78 4>;
 425                         xlnx,bus-width = <64>;
 426                         power-domains = <&pd_adma>;
 427                 };
 428
 429                 lpd_dma_chan3: dma@ffaa0000 {
 430                         status = "disabled";
 431                         compatible = "xlnx,zynqmp-dma-1.0";
 432                         reg = <0x0 0xffaa0000 0x1000>;
 433                         interrupt-parent = <&gic>;
 434                         interrupts = <0 79 4>;
 435                         xlnx,bus-width = <64>;
 436                         power-domains = <&pd_adma>;
 437                 };
 438
 439                 lpd_dma_chan4: dma@ffab0000 {
 440                         status = "disabled";
 441                         compatible = "xlnx,zynqmp-dma-1.0";
 442                         reg = <0x0 0xffab0000 0x1000>;
 443                         interrupt-parent = <&gic>;
 444                         interrupts = <0 80 4>;
 445                         xlnx,bus-width = <64>;
 446                         power-domains = <&pd_adma>;
 447                 };
 448
 449                 lpd_dma_chan5: dma@ffac0000 {
 450                         status = "disabled";
 451                         compatible = "xlnx,zynqmp-dma-1.0";
 452                         reg = <0x0 0xffac0000 0x1000>;
 453                         interrupt-parent = <&gic>;
 454                         interrupts = <0 81 4>;
 455                         xlnx,bus-width = <64>;
 456                         power-domains = <&pd_adma>;
 457                 };
 458
 459                 lpd_dma_chan6: dma@ffad0000 {
 460                         status = "disabled";
 461                         compatible = "xlnx,zynqmp-dma-1.0";
 462                         reg = <0x0 0xffad0000 0x1000>;
 463                         interrupt-parent = <&gic>;
 464                         interrupts = <0 82 4>;
 465                         xlnx,bus-width = <64>;
 466                         power-domains = <&pd_adma>;
 467                 };
 468
 469                 lpd_dma_chan7: dma@ffae0000 {
 470                         status = "disabled";
 471                         compatible = "xlnx,zynqmp-dma-1.0";
 472                         reg = <0x0 0xffae0000 0x1000>;
 473                         interrupt-parent = <&gic>;
 474                         interrupts = <0 83 4>;
 475                         xlnx,bus-width = <64>;
 476                         power-domains = <&pd_adma>;
 477                 };
 478
 479                 lpd_dma_chan8: dma@ffaf0000 {
 480                         status = "disabled";
 481                         compatible = "xlnx,zynqmp-dma-1.0";
 482                         reg = <0x0 0xffaf0000 0x1000>;
 483                         interrupt-parent = <&gic>;
 484                         interrupts = <0 84 4>;
 485                         xlnx,bus-width = <64>;
 486                         power-domains = <&pd_adma>;
 487                 };
 488
 489                 mc: memory-controller@fd070000 {
 490                         compatible = "xlnx,zynqmp-ddrc-2.40a";
 491                         reg = <0x0 0xfd070000 0x30000>;
 492                         interrupt-parent = <&gic>;
 493                         interrupts = <0 112 4>;
 494                 };
 495
 496                 nand0: nand@ff100000 {
 497                         compatible = "arasan,nfc-v3p10";
 498                         status = "disabled";
 499                         reg = <0x0 0xff100000 0x1000>;
 500                         clock-names = "clk_sys", "clk_flash";
 501                         interrupt-parent = <&gic>;
 502                         interrupts = <0 14 4>;
 503                         #address-cells = <2>;
 504                         #size-cells = <1>;
 505                         power-domains = <&pd_nand>;
 506                 };
 507
 508                 gem0: ethernet@ff0b0000 {
 509                         compatible = "cdns,zynqmp-gem";
 510                         status = "disabled";
 511                         interrupt-parent = <&gic>;
 512                         interrupts = <0 57 4>, <0 57 4>;
 513                         reg = <0x0 0xff0b0000 0x1000>;
 514                         clock-names = "pclk", "hclk", "tx_clk";
 515                         #address-cells = <1>;
 516                         #size-cells = <0>;
 517                         #stream-id-cells = <1>;
 518                         power-domains = <&pd_eth0>;
 519                 };
 520
 521                 gem1: ethernet@ff0c0000 {
 522                         compatible = "cdns,zynqmp-gem";
 523                         status = "disabled";
 524                         interrupt-parent = <&gic>;
 525                         interrupts = <0 59 4>, <0 59 4>;
 526                         reg = <0x0 0xff0c0000 0x1000>;
 527                         clock-names = "pclk", "hclk", "tx_clk";
 528                         #address-cells = <1>;
 529                         #size-cells = <0>;
 530                         #stream-id-cells = <1>;
 531                         power-domains = <&pd_eth1>;
 532                 };
 533
 534                 gem2: ethernet@ff0d0000 {
 535                         compatible = "cdns,zynqmp-gem";
 536                         status = "disabled";
 537                         interrupt-parent = <&gic>;
 538                         interrupts = <0 61 4>, <0 61 4>;
 539                         reg = <0x0 0xff0d0000 0x1000>;
 540                         clock-names = "pclk", "hclk", "tx_clk";
 541                         #address-cells = <1>;
 542                         #size-cells = <0>;
 543                         #stream-id-cells = <1>;
 544                         power-domains = <&pd_eth2>;
 545                 };
 546
 547                 gem3: ethernet@ff0e0000 {
 548                         compatible = "cdns,zynqmp-gem";
 549                         status = "disabled";
 550                         interrupt-parent = <&gic>;
 551                         interrupts = <0 63 4>, <0 63 4>;
 552                         reg = <0x0 0xff0e0000 0x1000>;
 553                         clock-names = "pclk", "hclk", "tx_clk";
 554                         #address-cells = <1>;
 555                         #size-cells = <0>;
 556                         #stream-id-cells = <1>;
 557                         power-domains = <&pd_eth3>;
 558                 };
 559
 560                 gpio: gpio@ff0a0000 {
 561                         compatible = "xlnx,zynqmp-gpio-1.0";
 562                         status = "disabled";
 563                         #gpio-cells = <0x2>;
 564                         interrupt-parent = <&gic>;
 565                         interrupts = <0 16 4>;
 566                         interrupt-controller;
 567                         #interrupt-cells = <2>;
 568                         reg = <0x0 0xff0a0000 0x1000>;
 569                         power-domains = <&pd_gpio>;
 570                 };
 571
 572                 i2c0: i2c@ff020000 {
 573                         compatible = "cdns,i2c-r1p10";
 574                         status = "disabled";
 575                         interrupt-parent = <&gic>;
 576                         interrupts = <0 17 4>;
 577                         reg = <0x0 0xff020000 0x1000>;
 578                         #address-cells = <1>;
 579                         #size-cells = <0>;
 580                         power-domains = <&pd_i2c0>;
 581                 };
 582
 583                 i2c1: i2c@ff030000 {
 584                         compatible = "cdns,i2c-r1p10";
 585                         status = "disabled";
 586                         interrupt-parent = <&gic>;
 587                         interrupts = <0 18 4>;
 588                         reg = <0x0 0xff030000 0x1000>;
 589                         #address-cells = <1>;
 590                         #size-cells = <0>;
 591                         power-domains = <&pd_i2c1>;
 592                 };
 593
 594                 pcie: pcie@fd0e0000 {
 595                         compatible = "xlnx,nwl-pcie-2.11";
 596                         status = "disabled";
 597                         #address-cells = <3>;
 598                         #size-cells = <2>;
 599                         #interrupt-cells = <1>;
 600                         msi-controller;
 601                         device_type = "pci";
 602                         interrupt-parent = <&gic>;
 603                         interrupts = <0 118 4>,
 604                                      <0 117 4>,
 605                                      <0 116 4>,
 606                                      <0 115 4>, /* MSI_1 [63...32] */
 607                                      <0 114 4>; /* MSI_0 [31...0] */
 608                         interrupt-names = "misc","dummy","intx", "msi1", "msi0";
 609                         msi-parent = <&pcie>;
 610                         reg = <0x0 0xfd0e0000 0x1000>,
 611                               <0x0 0xfd480000 0x1000>,
 612                               <0x0 0xe0000000 0x1000000>;
 613                         reg-names = "breg", "pcireg", "cfg";
 614                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 615                         interrupt-map-mask = <0x0 0x0 0x0 0x7>;
 616                         interrupt-map = <0x0 0x0 0x0 0x1 &pcie_intc 0x1>,
 617                                         <0x0 0x0 0x0 0x2 &pcie_intc 0x2>,
 618                                         <0x0 0x0 0x0 0x3 &pcie_intc 0x3>,
 619                                         <0x0 0x0 0x0 0x4 &pcie_intc 0x4>;
 620                         power-domains = <&pd_pcie>;
 621                         pcie_intc: legacy-interrupt-controller {
 622                                 interrupt-controller;
 623                                 #address-cells = <0>;
 624                                 #interrupt-cells = <1>;
 625                         };
 626                 };
 627
 628                 qspi: spi@ff0f0000 {
 629                         compatible = "xlnx,zynqmp-qspi-1.0";
 630                         status = "disabled";
 631                         clock-names = "ref_clk", "pclk";
 632                         interrupts = <0 15 4>;
 633                         interrupt-parent = <&gic>;
 634                         num-cs = <1>;
 635                         reg = <0x0 0xff0f0000 0x1000>,
 636                               <0x0 0xc0000000 0x8000000>;
 637                         #address-cells = <1>;
 638                         #size-cells = <0>;
 639                         power-domains = <&pd_qspi>;
 640                 };
 641
 642                 rtc: rtc@ffa60000 {
 643                         compatible = "xlnx,zynqmp-rtc";
 644                         status = "disabled";
 645                         reg = <0x0 0xffa60000 0x100>;
 646                         interrupt-parent = <&gic>;
 647                         interrupts = <0 26 4>, <0 27 4>;
 648                         interrupt-names = "alarm", "sec";
 649                 };
 650
 651                 sata: ahci@fd0c0000 {
 652                         compatible = "ceva,ahci-1v84";
 653                         status = "disabled";
 654                         reg = <0x0 0xfd0c0000 0x2000>;
 655                         interrupt-parent = <&gic>;
 656                         interrupts = <0 133 4>;
 657                         power-domains = <&pd_sata>;
 658                 };
 659
 660                 sdhci0: sdhci@ff160000 {
 661                         u-boot,dm-pre-reloc;
 662                         compatible = "arasan,sdhci-8.9a";
 663                         status = "disabled";
 664                         interrupt-parent = <&gic>;
 665                         interrupts = <0 48 4>;
 666                         reg = <0x0 0xff160000 0x1000>;
 667                         clock-names = "clk_xin", "clk_ahb";
 668                         broken-tuning;
 669                         power-domains = <&pd_sd0>;
 670                 };
 671
 672                 sdhci1: sdhci@ff170000 {
 673                         u-boot,dm-pre-reloc;
 674                         compatible = "arasan,sdhci-8.9a";
 675                         status = "disabled";
 676                         interrupt-parent = <&gic>;
 677                         interrupts = <0 49 4>;
 678                         reg = <0x0 0xff170000 0x1000>;
 679                         clock-names = "clk_xin", "clk_ahb";
 680                         broken-tuning;
 681                         power-domains = <&pd_sd1>;
 682                 };
 683
 684                 smmu: smmu@fd800000 {
 685                         compatible = "arm,mmu-500";
 686                         reg = <0x0 0xfd800000 0x20000>;
 687                         #global-interrupts = <1>;
 688                         interrupt-parent = <&gic>;
 689                         interrupts = <0 155 4>,
 690                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 691                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 692                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 693                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 694                         mmu-masters = < &gem0 0x874
 695                                         &gem1 0x875
 696                                         &gem2 0x876
 697                                         &gem3 0x877 >;
 698                 };
 699
 700                 spi0: spi@ff040000 {
 701                         compatible = "cdns,spi-r1p6";
 702                         status = "disabled";
 703                         interrupt-parent = <&gic>;
 704                         interrupts = <0 19 4>;
 705                         reg = <0x0 0xff040000 0x1000>;
 706                         clock-names = "ref_clk", "pclk";
 707                         #address-cells = <1>;
 708                         #size-cells = <0>;
 709                         power-domains = <&pd_spi0>;
 710                 };
 711
 712                 spi1: spi@ff050000 {
 713                         compatible = "cdns,spi-r1p6";
 714                         status = "disabled";
 715                         interrupt-parent = <&gic>;
 716                         interrupts = <0 20 4>;
 717                         reg = <0x0 0xff050000 0x1000>;
 718                         clock-names = "ref_clk", "pclk";
 719                         #address-cells = <1>;
 720                         #size-cells = <0>;
 721                         power-domains = <&pd_spi1>;
 722                 };
 723
 724                 ttc0: timer@ff110000 {
 725                         compatible = "cdns,ttc";
 726                         status = "disabled";
 727                         interrupt-parent = <&gic>;
 728                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 729                         reg = <0x0 0xff110000 0x1000>;
 730                         timer-width = <32>;
 731                         power-domains = <&pd_ttc0>;
 732                 };
 733
 734                 ttc1: timer@ff120000 {
 735                         compatible = "cdns,ttc";
 736                         status = "disabled";
 737                         interrupt-parent = <&gic>;
 738                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 739                         reg = <0x0 0xff120000 0x1000>;
 740                         timer-width = <32>;
 741                         power-domains = <&pd_ttc1>;
 742                 };
 743
 744                 ttc2: timer@ff130000 {
 745                         compatible = "cdns,ttc";
 746                         status = "disabled";
 747                         interrupt-parent = <&gic>;
 748                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 749                         reg = <0x0 0xff130000 0x1000>;
 750                         timer-width = <32>;
 751                         power-domains = <&pd_ttc2>;
 752                 };
 753
 754                 ttc3: timer@ff140000 {
 755                         compatible = "cdns,ttc";
 756                         status = "disabled";
 757                         interrupt-parent = <&gic>;
 758                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 759                         reg = <0x0 0xff140000 0x1000>;
 760                         timer-width = <32>;
 761                         power-domains = <&pd_ttc3>;
 762                 };
 763
 764                 uart0: serial@ff000000 {
 765                         u-boot,dm-pre-reloc;
 766                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 767                         status = "disabled";
 768                         interrupt-parent = <&gic>;
 769                         interrupts = <0 21 4>;
 770                         reg = <0x0 0xff000000 0x1000>;
 771                         clock-names = "uart_clk", "pclk";
 772                         power-domains = <&pd_uart0>;
 773                 };
 774
 775                 uart1: serial@ff010000 {
 776                         u-boot,dm-pre-reloc;
 777                         compatible = "cdns,uart-r1p12", "xlnx,xuartps";
 778                         status = "disabled";
 779                         interrupt-parent = <&gic>;
 780                         interrupts = <0 22 4>;
 781                         reg = <0x0 0xff010000 0x1000>;
 782                         clock-names = "uart_clk", "pclk";
 783                         power-domains = <&pd_uart1>;
 784                 };
 785
 786                 usb0: usb0 {
 787                         #address-cells = <2>;
 788                         #size-cells = <1>;
 789                         status = "disabled";
 790                         compatible = "xlnx,zynqmp-dwc3";
 791                         clock-names = "bus_clk", "ref_clk";
 792                         clocks = <&clk125>, <&clk125>;
 793                         power-domains = <&pd_usb0>;
 794                         ranges;
 795
 796                         dwc3_0: dwc3@fe200000 {
 797                                 compatible = "snps,dwc3";
 798                                 status = "disabled";
 799                                 reg = <0x0 0xfe200000 0x40000>;
 800                                 interrupt-parent = <&gic>;
 801                                 interrupts = <0 65 4>;
 802                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 803                                 snps,refclk_fladj;
 804                         };
 805                 };
 806
 807                 usb1: usb1 {
 808                         #address-cells = <2>;
 809                         #size-cells = <1>;
 810                         status = "disabled";
 811                         compatible = "xlnx,zynqmp-dwc3";
 812                         clock-names = "bus_clk", "ref_clk";
 813                         clocks = <&clk125>, <&clk125>;
 814                         power-domains = <&pd_usb1>;
 815                         ranges;
 816
 817                         dwc3_1: dwc3@fe300000 {
 818                                 compatible = "snps,dwc3";
 819                                 status = "disabled";
 820                                 reg = <0x0 0xfe300000 0x40000>;
 821                                 interrupt-parent = <&gic>;
 822                                 interrupts = <0 70 4>;
 823                                 /* snps,quirk-frame-length-adjustment = <0x20>; */
 824                                 snps,refclk_fladj;
 825                         };
 826                 };
 827
 828                 watchdog0: watchdog@fd4d0000 {
 829                         compatible = "cdns,wdt-r1p2";
 830                         status = "disabled";
 831                         interrupt-parent = <&gic>;
 832                         interrupts = <0 113 1>;
 833                         reg = <0x0 0xfd4d0000 0x1000>;
 834                         timeout-sec = <10>;
 835                 };
 836
 837                 xilinx_drm: xilinx_drm {
 838                         compatible = "xlnx,drm";
 839                         status = "disabled";
 840                         xlnx,encoder-slave = <&xlnx_dp>;
 841                         xlnx,connector-type = "DisplayPort";
 842                         xlnx,dp-sub = <&xlnx_dp_sub>;
 843                         planes {
 844                                 xlnx,pixel-format = "rgb565";
 845                                 plane0 {
 846                                         dmas = <&xlnx_dpdma 3>;
 847                                         dma-names = "dma0";
 848                                 };
 849                                 plane1 {
 850                                         dmas = <&xlnx_dpdma 0>,
 851                                                <&xlnx_dpdma 1>,
 852                                                <&xlnx_dpdma 2>;
 853                                         dma-names = "dma0", "dma1", "dma2";
 854                                 };
 855                         };
 856                 };
 857
 858                 xlnx_dp: dp@fd4a0000 {
 859                         compatible = "xlnx,v-dp";
 860                         status = "disabled";
 861                         reg = <0x0 0xfd4a0000 0x1000>;
 862                         interrupts = <0 119 4>;
 863                         interrupt-parent = <&gic>;
 864                         clock-names = "aclk", "aud_clk";
 865                         xlnx,dp-version = "v1.2";
 866                         xlnx,max-lanes = <2>;
 867                         xlnx,max-link-rate = <540000>;
 868                         xlnx,max-bpc = <16>;
 869                         xlnx,enable-ycrcb;
 870                         xlnx,colormetry = "rgb";
 871                         xlnx,bpc = <8>;
 872                         xlnx,audio-chan = <2>;
 873                         xlnx,dp-sub = <&xlnx_dp_sub>;
 874                         xlnx,max-pclock-frequency = <300000>;
 875                 };
 876
 877                 xlnx_dp_snd_card: dp_snd_card {
 878                         compatible = "xlnx,dp-snd-card";
 879                         status = "disabled";
 880                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 881                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 882                 };
 883
 884                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 885                         compatible = "xlnx,dp-snd-codec";
 886                         status = "disabled";
 887                         clock-names = "aud_clk";
 888                 };
 889
 890                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 891                         compatible = "xlnx,dp-snd-pcm";
 892                         status = "disabled";
 893                         dmas = <&xlnx_dpdma 4>;
 894                         dma-names = "tx";
 895                 };
 896
 897                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 898                         compatible = "xlnx,dp-snd-pcm";
 899                         status = "disabled";
 900                         dmas = <&xlnx_dpdma 5>;
 901                         dma-names = "tx";
 902                 };
 903
 904                 xlnx_dp_sub: dp_sub@fd4aa000 {
 905                         compatible = "xlnx,dp-sub";
 906                         status = "disabled";
 907                         reg = <0x0 0xfd4aa000 0x1000>,
 908                               <0x0 0xfd4ab000 0x1000>,
 909                               <0x0 0xfd4ac000 0x1000>;
 910                         reg-names = "blend", "av_buf", "aud";
 911                         xlnx,output-fmt = "rgb";
 912                         xlnx,vid-fmt = "yuyv";
 913                         xlnx,gfx-fmt = "rgb565";
 914                 };
 915
 916                 xlnx_dpdma: dma@fd4c0000 {
 917                         compatible = "xlnx,dpdma";
 918                         status = "disabled";
 919                         reg = <0x0 0xfd4c0000 0x1000>;
 920                         interrupts = <0 122 4>;
 921                         interrupt-parent = <&gic>;
 922                         clock-names = "axi_clk";
 923                         dma-channels = <6>;
 924                         #dma-cells = <1>;
 925                         dma-video0channel {
 926                                 compatible = "xlnx,video0";
 927                         };
 928                         dma-video1channel {
 929                                 compatible = "xlnx,video1";
 930                         };
 931                         dma-video2channel {
 932                                 compatible = "xlnx,video2";
 933                         };
 934                         dma-graphicschannel {
 935                                 compatible = "xlnx,graphics";
 936                         };
 937                         dma-audio0channel {
 938                                 compatible = "xlnx,audio0";
 939                         };
 940                         dma-audio1channel {
 941                                 compatible = "xlnx,audio1";
 942                         };
 943                 };
 944         };
 945 };