git.sur5r.net Git - u-boot/blob - arch/arm/dts/zynqmp.dtsi

   1 /*
   2  * dts file for Xilinx ZynqMP
   3  *
   4  * (C) Copyright 2014 - 2015, Xilinx, Inc.
   5  *
   6  * Michal Simek <michal.simek@xilinx.com>
   7  *
   8  * SPDX-License-Identifier:     GPL-2.0+
   9  */
  10 / {
  11         compatible = "xlnx,zynqmp";
  12         #address-cells = <2>;
  13         #size-cells = <1>;
  14
  15         cpus {
  16                 #address-cells = <1>;
  17                 #size-cells = <0>;
  18
  19                 cpu@0 {
  20                         compatible = "arm,cortex-a53", "arm,armv8";
  21                         device_type = "cpu";
  22                         enable-method = "psci";
  23                         reg = <0x0>;
  24                 };
  25
  26                 cpu@1 {
  27                         compatible = "arm,cortex-a53", "arm,armv8";
  28                         device_type = "cpu";
  29                         enable-method = "psci";
  30                         reg = <0x1>;
  31                 };
  32
  33                 cpu@2 {
  34                         compatible = "arm,cortex-a53", "arm,armv8";
  35                         device_type = "cpu";
  36                         enable-method = "psci";
  37                         reg = <0x2>;
  38                 };
  39
  40                 cpu@3 {
  41                         compatible = "arm,cortex-a53", "arm,armv8";
  42                         device_type = "cpu";
  43                         enable-method = "psci";
  44                         reg = <0x3>;
  45                 };
  46         };
  47
  48         power-domains {
  49                 compatible = "xlnx,zynqmp-genpd";
  50
  51                 pd_usb0: pd-usb0 {
  52                         #power-domain-cells = <0x0>;
  53                         pd-id = <0x16>;
  54                 };
  55
  56                 pd_usb1: pd-usb1 {
  57                         #power-domain-cells = <0x0>;
  58                         pd-id = <0x17>;
  59                 };
  60
  61                 pd_sata: pd-sata {
  62                         #power-domain-cells = <0x0>;
  63                         pd-id = <0x1c>;
  64                 };
  65
  66                 pd_spi0: pd-spi0 {
  67                         #power-domain-cells = <0x0>;
  68                         pd-id = <0x23>;
  69                 };
  70
  71                 pd_spi1: pd-spi1 {
  72                         #power-domain-cells = <0x0>;
  73                         pd-id = <0x24>;
  74                 };
  75
  76                 pd_uart0: pd-uart0 {
  77                         #power-domain-cells = <0x0>;
  78                         pd-id = <0x21>;
  79                 };
  80
  81                 pd_uart1: pd-uart1 {
  82                         #power-domain-cells = <0x0>;
  83                         pd-id = <0x22>;
  84                 };
  85
  86                 pd_eth0: pd-eth0 {
  87                         #power-domain-cells = <0x0>;
  88                         pd-id = <0x1d>;
  89                 };
  90
  91                 pd_eth1: pd-eth1 {
  92                         #power-domain-cells = <0x0>;
  93                         pd-id = <0x1e>;
  94                 };
  95
  96                 pd_eth2: pd-eth2 {
  97                         #power-domain-cells = <0x0>;
  98                         pd-id = <0x1f>;
  99                 };
 100
 101                 pd_eth3: pd-eth3 {
 102                         #power-domain-cells = <0x0>;
 103                         pd-id = <0x20>;
 104                 };
 105
 106                 pd_i2c0: pd-i2c0 {
 107                         #power-domain-cells = <0x0>;
 108                         pd-id = <0x25>;
 109                 };
 110
 111                 pd_i2c1: pd-i2c1 {
 112                         #power-domain-cells = <0x0>;
 113                         pd-id = <0x26>;
 114                 };
 115
 116                 pd_dp: pd-dp {
 117                         /* fixme: what to attach to */
 118                         #power-domain-cells = <0x0>;
 119                         pd-id = <0x29>;
 120                 };
 121
 122                 pd_gdma: pd-gdma {
 123                         #power-domain-cells = <0x0>;
 124                         pd-id = <0x2a>;
 125                 };
 126
 127                 pd_adma: pd-adma {
 128                         #power-domain-cells = <0x0>;
 129                         pd-id = <0x2b>;
 130                 };
 131
 132                 pd_ttc0: pd-ttc0 {
 133                         #power-domain-cells = <0x0>;
 134                         pd-id = <0x18>;
 135                 };
 136
 137                 pd_ttc1: pd-ttc1 {
 138                         #power-domain-cells = <0x0>;
 139                         pd-id = <0x19>;
 140                 };
 141
 142                 pd_ttc2: pd-ttc2 {
 143                         #power-domain-cells = <0x0>;
 144                         pd-id = <0x1a>;
 145                 };
 146
 147                 pd_ttc3: pd-ttc3 {
 148                         #power-domain-cells = <0x0>;
 149                         pd-id = <0x1b>;
 150                 };
 151
 152                 pd_sd0: pd-sd0 {
 153                         #power-domain-cells = <0x0>;
 154                         pd-id = <0x27>;
 155                 };
 156
 157                 pd_sd1: pd-sd1 {
 158                         #power-domain-cells = <0x0>;
 159                         pd-id = <0x28>;
 160                 };
 161
 162                 pd_nand: pd-nand {
 163                         #power-domain-cells = <0x0>;
 164                         pd-id = <0x2c>;
 165                 };
 166
 167                 pd_qspi: pd-qspi {
 168                         #power-domain-cells = <0x0>;
 169                         pd-id = <0x2d>;
 170                 };
 171
 172                 pd_gpio: pd-gpio {
 173                         #power-domain-cells = <0x0>;
 174                         pd-id = <0x2e>;
 175                 };
 176
 177                 pd_can0: pd-can0 {
 178                         #power-domain-cells = <0x0>;
 179                         pd-id = <0x2f>;
 180                 };
 181
 182                 pd_can1: pd-can1 {
 183                         #power-domain-cells = <0x0>;
 184                         pd-id = <0x30>;
 185                 };
 186
 187                 pd_ddr: pd-ddr {
 188                         #power-domain-cells = <0x0>;
 189                         pd-id = <0x37>;
 190                 };
 191
 192                 pd_apll: pd-apll {
 193                         #power-domain-cells = <0x0>;
 194                         pd-id = <0x32>;
 195                 };
 196
 197                 pd_vpll: pd-vpll {
 198                         #power-domain-cells = <0x0>;
 199                         pd-id = <0x33>;
 200                 };
 201
 202                 pd_dpll: pd-dpll {
 203                         #power-domain-cells = <0x0>;
 204                         pd-id = <0x34>;
 205                 };
 206
 207                 pd_rpll: pd-rpll {
 208                         #power-domain-cells = <0x0>;
 209                         pd-id = <0x35>;
 210                 };
 211
 212                 pd_iopll: pd-iopll {
 213                         #power-domain-cells = <0x0>;
 214                         pd-id = <0x36>;
 215                 };
 216         };
 217
 218         pmu {
 219                 compatible = "arm,armv8-pmuv3";
 220                 interrupt-parent = <&gic>;
 221                 interrupts = <0 143 4>,
 222                              <0 144 4>,
 223                              <0 145 4>,
 224                              <0 146 4>;
 225         };
 226
 227         psci {
 228                 compatible = "arm,psci-0.2";
 229                 method = "smc";
 230         };
 231
 232         firmware {
 233                 compatible = "xlnx,zynqmp-pm";
 234                 method = "smc";
 235         };
 236
 237         timer {
 238                 compatible = "arm,armv8-timer";
 239                 interrupt-parent = <&gic>;
 240                 interrupts = <1 13 0xf01>,
 241                              <1 14 0xf01>,
 242                              <1 11 0xf01>,
 243                              <1 10 0xf01>;
 244         };
 245
 246         amba_apu: amba_apu {
 247                 compatible = "simple-bus";
 248                 #address-cells = <2>;
 249                 #size-cells = <1>;
 250                 ranges;
 251
 252                 gic: interrupt-controller@f9010000 {
 253                         compatible = "arm,gic-400", "arm,cortex-a15-gic";
 254                         #interrupt-cells = <3>;
 255                         reg = <0x0 0xf9010000 0x10000>,
 256                               <0x0 0xf902f000 0x2000>,
 257                               <0x0 0xf9040000 0x20000>,
 258                               <0x0 0xf906f000 0x2000>;
 259                         interrupt-controller;
 260                         interrupt-parent = <&gic>;
 261                         interrupts = <1 9 0xf04>;
 262                 };
 263         };
 264
 265         amba: amba {
 266                 compatible = "simple-bus";
 267                 #address-cells = <2>;
 268                 #size-cells = <1>;
 269                 ranges;
 270
 271                 can0: can@ff060000 {
 272                         compatible = "xlnx,zynq-can-1.0";
 273                         status = "disabled";
 274                         clock-names = "can_clk", "pclk";
 275                         reg = <0x0 0xff060000 0x1000>;
 276                         interrupts = <0 23 4>;
 277                         interrupt-parent = <&gic>;
 278                         tx-fifo-depth = <0x40>;
 279                         rx-fifo-depth = <0x40>;
 280                         power-domains = <&pd_can0>;
 281                 };
 282
 283                 can1: can@ff070000 {
 284                         compatible = "xlnx,zynq-can-1.0";
 285                         status = "disabled";
 286                         clock-names = "can_clk", "pclk";
 287                         reg = <0x0 0xff070000 0x1000>;
 288                         interrupts = <0 24 4>;
 289                         interrupt-parent = <&gic>;
 290                         tx-fifo-depth = <0x40>;
 291                         rx-fifo-depth = <0x40>;
 292                         power-domains = <&pd_can1>;
 293                 };
 294
 295                 cci: cci@fd6e0000 {
 296                         compatible = "arm,cci-400";
 297                         reg = <0x0 0xfd6e0000 0x9000>;
 298                         ranges = <0x0 0x0 0xfd6e0000 0x10000>;
 299                         #address-cells = <1>;
 300                         #size-cells = <1>;
 301
 302                         pmu@9000 {
 303                                 compatible = "arm,cci-400-pmu,r1";
 304                                 reg = <0x9000 0x5000>;
 305                                 interrupt-parent = <&gic>;
 306                                 interrupts = <0 123 4>,
 307                                              <0 123 4>,
 308                                              <0 123 4>,
 309                                              <0 123 4>,
 310                                              <0 123 4>;
 311                         };
 312                 };
 313
 314                 /* GDMA */
 315                 fpd_dma_chan1: dma@fd500000 {
 316                         status = "disabled";
 317                         compatible = "xlnx,zynqmp-dma-1.0";
 318                         reg = <0x0 0xfd500000 0x1000>;
 319                         interrupt-parent = <&gic>;
 320                         interrupts = <0 124 4>;
 321                         xlnx,id = <0>;
 322                         xlnx,bus-width = <128>;
 323                         power-domains = <&pd_gdma>;
 324                 };
 325
 326                 fpd_dma_chan2: dma@fd510000 {
 327                         status = "disabled";
 328                         compatible = "xlnx,zynqmp-dma-1.0";
 329                         reg = <0x0 0xfd510000 0x1000>;
 330                         interrupt-parent = <&gic>;
 331                         interrupts = <0 125 4>;
 332                         xlnx,id = <1>;
 333                         xlnx,bus-width = <128>;
 334                         power-domains = <&pd_gdma>;
 335                 };
 336
 337                 fpd_dma_chan3: dma@fd520000 {
 338                         status = "disabled";
 339                         compatible = "xlnx,zynqmp-dma-1.0";
 340                         reg = <0x0 0xfd520000 0x1000>;
 341                         interrupt-parent = <&gic>;
 342                         interrupts = <0 126 4>;
 343                         xlnx,id = <2>;
 344                         xlnx,bus-width = <128>;
 345                         power-domains = <&pd_gdma>;
 346                 };
 347
 348                 fpd_dma_chan4: dma@fd530000 {
 349                         status = "disabled";
 350                         compatible = "xlnx,zynqmp-dma-1.0";
 351                         reg = <0x0 0xfd530000 0x1000>;
 352                         interrupt-parent = <&gic>;
 353                         interrupts = <0 127 4>;
 354                         xlnx,id = <3>;
 355                         xlnx,bus-width = <128>;
 356                         power-domains = <&pd_gdma>;
 357                 };
 358
 359                 fpd_dma_chan5: dma@fd540000 {
 360                         status = "disabled";
 361                         compatible = "xlnx,zynqmp-dma-1.0";
 362                         reg = <0x0 0xfd540000 0x1000>;
 363                         interrupt-parent = <&gic>;
 364                         interrupts = <0 128 4>;
 365                         xlnx,id = <4>;
 366                         xlnx,bus-width = <128>;
 367                         power-domains = <&pd_gdma>;
 368                 };
 369
 370                 fpd_dma_chan6: dma@fd550000 {
 371                         status = "disabled";
 372                         compatible = "xlnx,zynqmp-dma-1.0";
 373                         reg = <0x0 0xfd550000 0x1000>;
 374                         interrupt-parent = <&gic>;
 375                         interrupts = <0 129 4>;
 376                         xlnx,id = <5>;
 377                         xlnx,bus-width = <128>;
 378                         power-domains = <&pd_gdma>;
 379                 };
 380
 381                 fpd_dma_chan7: dma@fd560000 {
 382                         status = "disabled";
 383                         compatible = "xlnx,zynqmp-dma-1.0";
 384                         reg = <0x0 0xfd560000 0x1000>;
 385                         interrupt-parent = <&gic>;
 386                         interrupts = <0 130 4>;
 387                         xlnx,id = <6>;
 388                         xlnx,bus-width = <128>;
 389                         power-domains = <&pd_gdma>;
 390                 };
 391
 392                 fpd_dma_chan8: dma@fd570000 {
 393                         status = "disabled";
 394                         compatible = "xlnx,zynqmp-dma-1.0";
 395                         reg = <0x0 0xfd570000 0x1000>;
 396                         interrupt-parent = <&gic>;
 397                         interrupts = <0 131 4>;
 398                         xlnx,id = <7>;
 399                         xlnx,bus-width = <128>;
 400                         power-domains = <&pd_gdma>;
 401                 };
 402
 403                 gpu: gpu@fd4b0000 {
 404                         status = "disabled";
 405                         compatible = "arm,mali-400", "arm,mali-utgard";
 406                         reg = <0x0 0xfd4b0000 0x30000>;
 407                         interrupt-parent = <&gic>;
 408                         interrupts = <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>, <0 132 4>;
 409                         interrupt-names = "IRQGP", "IRQGPMMU", "IRQPP0", "IRQPPMMU0", "IRQPP1", "IRQPPMMU1";
 410                 };
 411
 412                 /* ADMA */
 413                 lpd_dma_chan1: dma@ffa80000 {
 414                         status = "disabled";
 415                         compatible = "xlnx,zynqmp-dma-1.0";
 416                         reg = <0x0 0xffa80000 0x1000>;
 417                         interrupt-parent = <&gic>;
 418                         interrupts = <0 77 4>;
 419                         xlnx,id = <0>;
 420                         xlnx,bus-width = <64>;
 421                         power-domains = <&pd_adma>;
 422                 };
 423
 424                 lpd_dma_chan2: dma@ffa90000 {
 425                         status = "disabled";
 426                         compatible = "xlnx,zynqmp-dma-1.0";
 427                         reg = <0x0 0xffa90000 0x1000>;
 428                         interrupt-parent = <&gic>;
 429                         interrupts = <0 78 4>;
 430                         xlnx,id = <1>;
 431                         xlnx,bus-width = <64>;
 432                         power-domains = <&pd_adma>;
 433                 };
 434
 435                 lpd_dma_chan3: dma@ffaa0000 {
 436                         status = "disabled";
 437                         compatible = "xlnx,zynqmp-dma-1.0";
 438                         reg = <0x0 0xffaa0000 0x1000>;
 439                         interrupt-parent = <&gic>;
 440                         interrupts = <0 79 4>;
 441                         xlnx,id = <2>;
 442                         xlnx,bus-width = <64>;
 443                         power-domains = <&pd_adma>;
 444                 };
 445
 446                 lpd_dma_chan4: dma@ffab0000 {
 447                         status = "disabled";
 448                         compatible = "xlnx,zynqmp-dma-1.0";
 449                         reg = <0x0 0xffab0000 0x1000>;
 450                         interrupt-parent = <&gic>;
 451                         interrupts = <0 80 4>;
 452                         xlnx,id = <3>;
 453                         xlnx,bus-width = <64>;
 454                         power-domains = <&pd_adma>;
 455                 };
 456
 457                 lpd_dma_chan5: dma@ffac0000 {
 458                         status = "disabled";
 459                         compatible = "xlnx,zynqmp-dma-1.0";
 460                         reg = <0x0 0xffac0000 0x1000>;
 461                         interrupt-parent = <&gic>;
 462                         interrupts = <0 81 4>;
 463                         xlnx,id = <4>;
 464                         xlnx,bus-width = <64>;
 465                         power-domains = <&pd_adma>;
 466                 };
 467
 468                 lpd_dma_chan6: dma@ffad0000 {
 469                         status = "disabled";
 470                         compatible = "xlnx,zynqmp-dma-1.0";
 471                         reg = <0x0 0xffad0000 0x1000>;
 472                         interrupt-parent = <&gic>;
 473                         interrupts = <0 82 4>;
 474                         xlnx,id = <5>;
 475                         xlnx,bus-width = <64>;
 476                         power-domains = <&pd_adma>;
 477                 };
 478
 479                 lpd_dma_chan7: dma@ffae0000 {
 480                         status = "disabled";
 481                         compatible = "xlnx,zynqmp-dma-1.0";
 482                         reg = <0x0 0xffae0000 0x1000>;
 483                         interrupt-parent = <&gic>;
 484                         interrupts = <0 83 4>;
 485                         xlnx,id = <6>;
 486                         xlnx,bus-width = <64>;
 487                         power-domains = <&pd_adma>;
 488                 };
 489
 490                 lpd_dma_chan8: dma@ffaf0000 {
 491                         status = "disabled";
 492                         compatible = "xlnx,zynqmp-dma-1.0";
 493                         reg = <0x0 0xffaf0000 0x1000>;
 494                         interrupt-parent = <&gic>;
 495                         interrupts = <0 84 4>;
 496                         xlnx,id = <7>;
 497                         xlnx,bus-width = <64>;
 498                         power-domains = <&pd_adma>;
 499                 };
 500
 501                 nand0: nand@ff100000 {
 502                         compatible = "arasan,nfc-v3p10";
 503                         status = "disabled";
 504                         reg = <0x0 0xff100000 0x1000>;
 505                         clock-names = "clk_sys", "clk_flash";
 506                         interrupt-parent = <&gic>;
 507                         interrupts = <0 14 4>;
 508                         #address-cells = <2>;
 509                         #size-cells = <1>;
 510                         power-domains = <&pd_nand>;
 511                 };
 512
 513                 gem0: ethernet@ff0b0000 {
 514                         compatible = "cdns,zynqmp-gem";
 515                         status = "disabled";
 516                         interrupt-parent = <&gic>;
 517                         interrupts = <0 57 4>, <0 57 4>;
 518                         reg = <0x0 0xff0b0000 0x1000>;
 519                         clock-names = "pclk", "hclk", "tx_clk";
 520                         #address-cells = <1>;
 521                         #size-cells = <0>;
 522                         #stream-id-cells = <1>;
 523                         power-domains = <&pd_eth0>;
 524                 };
 525
 526                 gem1: ethernet@ff0c0000 {
 527                         compatible = "cdns,zynqmp-gem";
 528                         status = "disabled";
 529                         interrupt-parent = <&gic>;
 530                         interrupts = <0 59 4>, <0 59 4>;
 531                         reg = <0x0 0xff0c0000 0x1000>;
 532                         clock-names = "pclk", "hclk", "tx_clk";
 533                         #address-cells = <1>;
 534                         #size-cells = <0>;
 535                         #stream-id-cells = <1>;
 536                         power-domains = <&pd_eth1>;
 537                 };
 538
 539                 gem2: ethernet@ff0d0000 {
 540                         compatible = "cdns,zynqmp-gem";
 541                         status = "disabled";
 542                         interrupt-parent = <&gic>;
 543                         interrupts = <0 61 4>, <0 61 4>;
 544                         reg = <0x0 0xff0d0000 0x1000>;
 545                         clock-names = "pclk", "hclk", "tx_clk";
 546                         #address-cells = <1>;
 547                         #size-cells = <0>;
 548                         #stream-id-cells = <1>;
 549                         power-domains = <&pd_eth2>;
 550                 };
 551
 552                 gem3: ethernet@ff0e0000 {
 553                         compatible = "cdns,zynqmp-gem";
 554                         status = "disabled";
 555                         interrupt-parent = <&gic>;
 556                         interrupts = <0 63 4>, <0 63 4>;
 557                         reg = <0x0 0xff0e0000 0x1000>;
 558                         clock-names = "pclk", "hclk", "tx_clk";
 559                         #address-cells = <1>;
 560                         #size-cells = <0>;
 561                         #stream-id-cells = <1>;
 562                         power-domains = <&pd_eth3>;
 563                 };
 564
 565                 gpio: gpio@ff0a0000 {
 566                         compatible = "xlnx,zynqmp-gpio-1.0";
 567                         status = "disabled";
 568                         #gpio-cells = <0x2>;
 569                         interrupt-parent = <&gic>;
 570                         interrupts = <0 16 4>;
 571                         reg = <0x0 0xff0a0000 0x1000>;
 572                         power-domains = <&pd_gpio>;
 573                 };
 574
 575                 i2c0: i2c@ff020000 {
 576                         compatible = "cdns,i2c-r1p10";
 577                         status = "disabled";
 578                         interrupt-parent = <&gic>;
 579                         interrupts = <0 17 4>;
 580                         reg = <0x0 0xff020000 0x1000>;
 581                         #address-cells = <1>;
 582                         #size-cells = <0>;
 583                         power-domains = <&pd_i2c0>;
 584                 };
 585
 586                 i2c1: i2c@ff030000 {
 587                         compatible = "cdns,i2c-r1p10";
 588                         status = "disabled";
 589                         interrupt-parent = <&gic>;
 590                         interrupts = <0 18 4>;
 591                         reg = <0x0 0xff030000 0x1000>;
 592                         #address-cells = <1>;
 593                         #size-cells = <0>;
 594                         power-domains = <&pd_i2c1>;
 595                 };
 596
 597                 pcie: pcie@fd0e0000 {
 598                         compatible = "xlnx,nwl-pcie-2.11";
 599                         status = "disabled";
 600                         #address-cells = <3>;
 601                         #size-cells = <2>;
 602                         #interrupt-cells = <1>;
 603                         device_type = "pci";
 604                         interrupt-parent = <&gic>;
 605                         interrupts = < 0 118 4>,
 606                                      < 0 116 4>,
 607                                      < 0 115 4>,        /* MSI_1 [63...32] */
 608                                      < 0 114 4 >;       /* MSI_0 [31...0] */
 609                         interrupt-names = "misc", "intx", "msi_1", "msi_0";
 610                         reg = <0x0 0xfd0e0000 0x1000>,
 611                               <0x0 0xfd480000 0x1000>,
 612                               <0x0 0xe0000000 0x1000000>;
 613                         reg-names = "breg", "pcireg", "cfg";
 614                         ranges = <0x02000000 0x00000000 0xe1000000 0x00000000 0xe1000000 0 0x0f000000>;
 615                 };
 616
 617                 qspi: spi@ff0f0000 {
 618                         compatible = "xlnx,zynqmp-qspi-1.0";
 619                         status = "disabled";
 620                         clock-names = "ref_clk", "pclk";
 621                         interrupts = <0 15 4>;
 622                         interrupt-parent = <&gic>;
 623                         num-cs = <1>;
 624                         reg = <0x0 0xff0f0000 0x1000 0x0 0xc0000000 0x8000000>;
 625                         #address-cells = <1>;
 626                         #size-cells = <0>;
 627                         power-domains = <&pd_qspi>;
 628                 };
 629
 630                 rtc: rtc@ffa60000 {
 631                         compatible = "xlnx,zynqmp-rtc";
 632                         status = "disabled";
 633                         reg = <0x0 0xffa60000 0x100>;
 634                         interrupt-parent = <&gic>;
 635                         interrupts = <0 26 4>, <0 27 4>;
 636                         interrupt-names = "alarm", "sec";
 637                 };
 638
 639                 sata: ahci@fd0c0000 {
 640                         compatible = "ceva,ahci-1v84";
 641                         status = "disabled";
 642                         reg = <0x0 0xfd0c0000 0x2000>;
 643                         interrupt-parent = <&gic>;
 644                         interrupts = <0 133 4>;
 645                         power-domains = <&pd_sata>;
 646                 };
 647
 648                 sdhci0: sdhci@ff160000 {
 649                         compatible = "arasan,sdhci-8.9a";
 650                         status = "disabled";
 651                         interrupt-parent = <&gic>;
 652                         interrupts = <0 48 4>;
 653                         reg = <0x0 0xff160000 0x1000>;
 654                         clock-names = "clk_xin", "clk_ahb";
 655                         broken-tuning;
 656                         power-domains = <&pd_sd0>;
 657                 };
 658
 659                 sdhci1: sdhci@ff170000 {
 660                         compatible = "arasan,sdhci-8.9a";
 661                         status = "disabled";
 662                         interrupt-parent = <&gic>;
 663                         interrupts = <0 49 4>;
 664                         reg = <0x0 0xff170000 0x1000>;
 665                         clock-names = "clk_xin", "clk_ahb";
 666                         broken-tuning;
 667                         power-domains = <&pd_sd1>;
 668                 };
 669
 670                 smmu: smmu@fd800000 {
 671                         compatible = "arm,mmu-500";
 672                         reg = <0x0 0xfd800000 0x20000>;
 673                         #global-interrupts = <1>;
 674                         interrupt-parent = <&gic>;
 675                         interrupts = <0 155 4>,
 676                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 677                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 678                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>,
 679                                 <0 155 4>, <0 155 4>, <0 155 4>, <0 155 4>;
 680                         mmu-masters = < &gem0 0x874
 681                                         &gem1 0x875
 682                                         &gem2 0x876
 683                                         &gem3 0x877 >;
 684                 };
 685
 686                 spi0: spi@ff040000 {
 687                         compatible = "cdns,spi-r1p6";
 688                         status = "disabled";
 689                         interrupt-parent = <&gic>;
 690                         interrupts = <0 19 4>;
 691                         reg = <0x0 0xff040000 0x1000>;
 692                         clock-names = "ref_clk", "pclk";
 693                         #address-cells = <1>;
 694                         #size-cells = <0>;
 695                         power-domains = <&pd_spi0>;
 696                 };
 697
 698                 spi1: spi@ff050000 {
 699                         compatible = "cdns,spi-r1p6";
 700                         status = "disabled";
 701                         interrupt-parent = <&gic>;
 702                         interrupts = <0 20 4>;
 703                         reg = <0x0 0xff050000 0x1000>;
 704                         clock-names = "ref_clk", "pclk";
 705                         #address-cells = <1>;
 706                         #size-cells = <0>;
 707                         power-domains = <&pd_spi1>;
 708                 };
 709
 710                 ttc0: timer@ff110000 {
 711                         compatible = "cdns,ttc";
 712                         status = "disabled";
 713                         interrupt-parent = <&gic>;
 714                         interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
 715                         reg = <0x0 0xff110000 0x1000>;
 716                         timer-width = <32>;
 717                         power-domains = <&pd_ttc0>;
 718                 };
 719
 720                 ttc1: timer@ff120000 {
 721                         compatible = "cdns,ttc";
 722                         status = "disabled";
 723                         interrupt-parent = <&gic>;
 724                         interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
 725                         reg = <0x0 0xff120000 0x1000>;
 726                         timer-width = <32>;
 727                         power-domains = <&pd_ttc1>;
 728                 };
 729
 730                 ttc2: timer@ff130000 {
 731                         compatible = "cdns,ttc";
 732                         status = "disabled";
 733                         interrupt-parent = <&gic>;
 734                         interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
 735                         reg = <0x0 0xff130000 0x1000>;
 736                         timer-width = <32>;
 737                         power-domains = <&pd_ttc2>;
 738                 };
 739
 740                 ttc3: timer@ff140000 {
 741                         compatible = "cdns,ttc";
 742                         status = "disabled";
 743                         interrupt-parent = <&gic>;
 744                         interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
 745                         reg = <0x0 0xff140000 0x1000>;
 746                         timer-width = <32>;
 747                         power-domains = <&pd_ttc3>;
 748                 };
 749
 750                 uart0: serial@ff000000 {
 751                         compatible = "cdns,uart-r1p12";
 752                         status = "disabled";
 753                         interrupt-parent = <&gic>;
 754                         interrupts = <0 21 4>;
 755                         reg = <0x0 0xff000000 0x1000>;
 756                         clock-names = "uart_clk", "pclk";
 757                         power-domains = <&pd_uart0>;
 758                 };
 759
 760                 uart1: serial@ff010000 {
 761                         compatible = "cdns,uart-r1p12";
 762                         status = "disabled";
 763                         interrupt-parent = <&gic>;
 764                         interrupts = <0 22 4>;
 765                         reg = <0x0 0xff010000 0x1000>;
 766                         clock-names = "uart_clk", "pclk";
 767                         power-domains = <&pd_uart1>;
 768                 };
 769
 770                 usb0: usb@fe200000 {
 771                         compatible = "snps,dwc3";
 772                         status = "disabled";
 773                         interrupt-parent = <&gic>;
 774                         interrupts = <0 65 4>;
 775                         reg = <0x0 0xfe200000 0x40000>;
 776                         clock-names = "clk_xin", "clk_ahb";
 777                         power-domains = <&pd_usb0>;
 778                 };
 779
 780                 usb1: usb@fe300000 {
 781                         compatible = "snps,dwc3";
 782                         status = "disabled";
 783                         interrupt-parent = <&gic>;
 784                         interrupts = <0 70 4>;
 785                         reg = <0x0 0xfe300000 0x40000>;
 786                         clock-names = "clk_xin", "clk_ahb";
 787                         power-domains = <&pd_usb1>;
 788                 };
 789
 790                 watchdog0: watchdog@fd4d0000 {
 791                         compatible = "cdns,wdt-r1p2";
 792                         status = "disabled";
 793                         interrupt-parent = <&gic>;
 794                         interrupts = <0 113 1>;
 795                         reg = <0x0 0xfd4d0000 0x1000>;
 796                         timeout-sec = <10>;
 797                 };
 798
 799                 xilinx_drm: xilinx_drm {
 800                         compatible = "xlnx,drm";
 801                         status = "disabled";
 802                         xlnx,encoder-slave = <&xlnx_dp>;
 803                         xlnx,connector-type = "DisplayPort";
 804                         xlnx,dp-sub = <&xlnx_dp_sub>;
 805                         planes {
 806                                 xlnx,pixel-format = "rgb565";
 807                                 plane0 {
 808                                         dmas = <&xlnx_dpdma 3>;
 809                                         dma-names = "dma";
 810                                 };
 811                                 plane1 {
 812                                         dmas = <&xlnx_dpdma 0>;
 813                                         dma-names = "dma";
 814                                 };
 815                         };
 816                 };
 817
 818                 xlnx_dp: dp@43c00000 {
 819                         compatible = "xlnx,v-dp";
 820                         status = "disabled";
 821                         reg = <0x0 0xfd4a0000 0x1000>;
 822                         interrupts = <0 119 4>;
 823                         interrupt-parent = <&gic>;
 824                         clock-names = "aclk", "aud_clk";
 825                         xlnx,dp-version = "v1.2";
 826                         xlnx,max-lanes = <2>;
 827                         xlnx,max-link-rate = <540000>;
 828                         xlnx,max-bpc = <16>;
 829                         xlnx,enable-ycrcb;
 830                         xlnx,colormetry = "rgb";
 831                         xlnx,bpc = <8>;
 832                         xlnx,audio-chan = <2>;
 833                         xlnx,dp-sub = <&xlnx_dp_sub>;
 834                 };
 835
 836                 xlnx_dp_snd_card: dp_snd_card {
 837                         compatible = "xlnx,dp-snd-card";
 838                         status = "disabled";
 839                         xlnx,dp-snd-pcm = <&xlnx_dp_snd_pcm0>, <&xlnx_dp_snd_pcm1>;
 840                         xlnx,dp-snd-codec = <&xlnx_dp_snd_codec0>;
 841                 };
 842
 843                 xlnx_dp_snd_codec0: dp_snd_codec0 {
 844                         compatible = "xlnx,dp-snd-codec";
 845                         status = "disabled";
 846                         clock-names = "aud_clk";
 847                 };
 848
 849                 xlnx_dp_snd_pcm0: dp_snd_pcm0 {
 850                         compatible = "xlnx,dp-snd-pcm";
 851                         status = "disabled";
 852                         dmas = <&xlnx_dpdma 4>;
 853                         dma-names = "tx";
 854                 };
 855
 856                 xlnx_dp_snd_pcm1: dp_snd_pcm1 {
 857                         compatible = "xlnx,dp-snd-pcm";
 858                         status = "disabled";
 859                         dmas = <&xlnx_dpdma 5>;
 860                         dma-names = "tx";
 861                 };
 862
 863                 xlnx_dp_sub: dp_sub@43c0a000 {
 864                         compatible = "xlnx,dp-sub";
 865                         status = "disabled";
 866                         reg = <0x0 0xfd4aa000 0x1000>, <0x0 0xfd4ab000 0x1000>, <0x0 0xfd4ac000 0x1000>;
 867                         reg-names = "blend", "av_buf", "aud";
 868                         xlnx,output-fmt = "rgb";
 869                 };
 870
 871                 xlnx_dpdma: dma@fd4c0000 {
 872                         compatible = "xlnx,dpdma";
 873                         status = "disabled";
 874                         reg = <0x0 0xfd4c0000 0x1000>;
 875                         interrupts = <0 122 4>;
 876                         interrupt-parent = <&gic>;
 877                         clock-names = "axi_clk";
 878                         dma-channels = <6>;
 879                         #dma-cells = <1>;
 880                         dma-video0channel@43c10000 {
 881                                 compatible = "xlnx,video0";
 882                         };
 883                         dma-video1channel@43c10000 {
 884                                 compatible = "xlnx,video1";
 885                         };
 886                         dma-video2channel@43c10000 {
 887                                 compatible = "xlnx,video2";
 888                         };
 889                         dma-graphicschannel@43c10000 {
 890                                 compatible = "xlnx,graphics";
 891                         };
 892                         dma-audio0channel@43c10000 {
 893                                 compatible = "xlnx,audio0";
 894                         };
 895                         dma-audio1channel@43c10000 {
 896                                 compatible = "xlnx,audio1";
 897                         };
 898                 };
 899         };
 900 };