2 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
11 #include <asm/system.h>
12 #include <asm/arch/clock.h>
13 #include <asm/arch/sys_proto.h>
14 #include <asm/imx-common/hab.h>
16 /* -------- start of HAB API updates ------------*/
18 #define hab_rvt_report_event_p \
21 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
22 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
23 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
24 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
25 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) : \
26 ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT) \
29 #define hab_rvt_report_status_p \
32 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
33 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
34 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
35 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
36 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
37 ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS) \
40 #define hab_rvt_authenticate_image_p \
43 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
44 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
45 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
46 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
47 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
48 ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE) \
51 #define hab_rvt_entry_p \
54 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
55 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
56 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
57 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
58 ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) : \
59 ((hab_rvt_entry_t *)HAB_RVT_ENTRY) \
62 #define hab_rvt_exit_p \
65 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
66 (is_mx6dq() && (soc_rev() >= CHIP_REV_1_5)) ? \
67 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
68 (is_mx6sdl() && (soc_rev() >= CHIP_REV_1_2)) ? \
69 ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) : \
70 ((hab_rvt_exit_t *)HAB_RVT_EXIT) \
74 #define ALIGN_SIZE 0x1000
75 #define CSF_PAD_SIZE 0x2000
76 #define MX6DQ_PU_IROM_MMU_EN_VAR 0x009024a8
77 #define MX6DLS_PU_IROM_MMU_EN_VAR 0x00901dd0
78 #define MX6SL_PU_IROM_MMU_EN_VAR 0x00900a18
79 #define IS_HAB_ENABLED_BIT \
80 (is_soc_type(MXC_SOC_MX7) ? 0x2000000 : 0x2)
83 * +------------+ 0x0 (DDR_UIMAGE_START) -
85 * +------------+ 0x40 |
92 * . | > Stuff to be authenticated ----+
100 * +------------+ Align to ALIGN_SIZE | |
102 * +------------+ + IVT_SIZE - |
104 * | CSF DATA | <---------------------------------------------------------+
110 * +------------+ + CSF_PAD_SIZE
113 #define MAX_RECORD_BYTES (8*1024) /* 4 kbytes */
116 uint8_t tag; /* Tag */
117 uint8_t len[2]; /* Length */
118 uint8_t par; /* Version */
119 uint8_t contents[MAX_RECORD_BYTES];/* Record Data */
123 char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
124 "RSN = HAB_ENG_FAIL (0x30)\n",
125 "RSN = HAB_INV_ADDRESS (0x22)\n",
126 "RSN = HAB_INV_ASSERTION (0x0C)\n",
127 "RSN = HAB_INV_CALL (0x28)\n",
128 "RSN = HAB_INV_CERTIFICATE (0x21)\n",
129 "RSN = HAB_INV_COMMAND (0x06)\n",
130 "RSN = HAB_INV_CSF (0x11)\n",
131 "RSN = HAB_INV_DCD (0x27)\n",
132 "RSN = HAB_INV_INDEX (0x0F)\n",
133 "RSN = HAB_INV_IVT (0x05)\n",
134 "RSN = HAB_INV_KEY (0x1D)\n",
135 "RSN = HAB_INV_RETURN (0x1E)\n",
136 "RSN = HAB_INV_SIGNATURE (0x18)\n",
137 "RSN = HAB_INV_SIZE (0x17)\n",
138 "RSN = HAB_MEM_FAIL (0x2E)\n",
139 "RSN = HAB_OVR_COUNT (0x2B)\n",
140 "RSN = HAB_OVR_STORAGE (0x2D)\n",
141 "RSN = HAB_UNS_ALGORITHM (0x12)\n",
142 "RSN = HAB_UNS_COMMAND (0x03)\n",
143 "RSN = HAB_UNS_ENGINE (0x0A)\n",
144 "RSN = HAB_UNS_ITEM (0x24)\n",
145 "RSN = HAB_UNS_KEY (0x1B)\n",
146 "RSN = HAB_UNS_PROTOCOL (0x14)\n",
147 "RSN = HAB_UNS_STATE (0x09)\n",
151 char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
152 "STS = HAB_FAILURE (0x33)\n",
153 "STS = HAB_WARNING (0x69)\n",
157 char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
158 "ENG = HAB_ENG_SCC (0x03)\n",
159 "ENG = HAB_ENG_RTIC (0x05)\n",
160 "ENG = HAB_ENG_SAHARA (0x06)\n",
161 "ENG = HAB_ENG_CSU (0x0A)\n",
162 "ENG = HAB_ENG_SRTC (0x0C)\n",
163 "ENG = HAB_ENG_DCP (0x1B)\n",
164 "ENG = HAB_ENG_CAAM (0x1D)\n",
165 "ENG = HAB_ENG_SNVS (0x1E)\n",
166 "ENG = HAB_ENG_OCOTP (0x21)\n",
167 "ENG = HAB_ENG_DTCP (0x22)\n",
168 "ENG = HAB_ENG_ROM (0x36)\n",
169 "ENG = HAB_ENG_HDCP (0x24)\n",
170 "ENG = HAB_ENG_RTL (0x77)\n",
171 "ENG = HAB_ENG_SW (0xFF)\n",
175 char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
176 "CTX = HAB_CTX_FAB (0xFF)\n",
177 "CTX = HAB_CTX_ENTRY (0xE1)\n",
178 "CTX = HAB_CTX_TARGET (0x33)\n",
179 "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
180 "CTX = HAB_CTX_DCD (0xDD)\n",
181 "CTX = HAB_CTX_CSF (0xCF)\n",
182 "CTX = HAB_CTX_COMMAND (0xC0)\n",
183 "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
184 "CTX = HAB_CTX_ASSERT (0xA0)\n",
185 "CTX = HAB_CTX_EXIT (0xEE)\n",
189 uint8_t hab_statuses[5] = {
197 uint8_t hab_reasons[26] = {
226 uint8_t hab_contexts[12] = {
231 HAB_CTX_AUTHENTICATE,
241 uint8_t hab_engines[16] = {
260 bool is_hab_enabled(void)
262 struct imx_sec_config_fuse_t *fuse =
263 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
267 ret = fuse_read(fuse->bank, fuse->word, ®);
269 puts("\nSecure boot fuse read error\n");
273 return (reg & IS_HAB_ENABLED_BIT) == IS_HAB_ENABLED_BIT;
276 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
279 uint8_t element = list[idx];
280 while (element != -1) {
283 element = list[++idx];
288 void process_event_record(uint8_t *event_data, size_t bytes)
290 struct record *rec = (struct record *)event_data;
292 printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
293 printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
294 printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
295 printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
298 void display_event(uint8_t *event_data, size_t bytes)
302 if (!(event_data && bytes > 0))
305 for (i = 0; i < bytes; i++) {
307 printf("\t0x%02x", event_data[i]);
308 else if ((i % 8) == 0)
309 printf("\n\t0x%02x", event_data[i]);
311 printf(" 0x%02x", event_data[i]);
314 process_event_record(event_data, bytes);
317 int get_hab_status(void)
319 uint32_t index = 0; /* Loop index */
320 uint8_t event_data[128]; /* Event data buffer */
321 size_t bytes = sizeof(event_data); /* Event size in bytes */
322 enum hab_config config = 0;
323 enum hab_state state = 0;
324 hab_rvt_report_event_t *hab_rvt_report_event;
325 hab_rvt_report_status_t *hab_rvt_report_status;
327 hab_rvt_report_event = hab_rvt_report_event_p;
328 hab_rvt_report_status = hab_rvt_report_status_p;
330 if (is_hab_enabled())
331 puts("\nSecure boot enabled\n");
333 puts("\nSecure boot disabled\n");
335 /* Check HAB status */
336 if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
337 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
340 /* Display HAB Error events */
341 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
342 &bytes) == HAB_SUCCESS) {
344 printf("--------- HAB Event %d -----------------\n",
346 puts("event data:\n");
347 display_event(event_data, bytes);
349 bytes = sizeof(event_data);
353 /* Display message if no HAB events are found */
355 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
357 puts("No HAB Events Found!\n\n");
362 uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
364 uint32_t load_addr = 0;
366 ptrdiff_t ivt_offset = 0;
369 hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
370 hab_rvt_entry_t *hab_rvt_entry;
371 hab_rvt_exit_t *hab_rvt_exit;
373 hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
374 hab_rvt_entry = hab_rvt_entry_p;
375 hab_rvt_exit = hab_rvt_exit_p;
377 if (is_hab_enabled()) {
378 printf("\nAuthenticate image from DDR location 0x%x...\n",
381 hab_caam_clock_enable(1);
383 if (hab_rvt_entry() == HAB_SUCCESS) {
384 /* If not already aligned, Align to ALIGN_SIZE */
385 ivt_offset = (image_size + ALIGN_SIZE - 1) &
389 bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
391 printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
392 ivt_offset, ddr_start + ivt_offset);
393 puts("Dumping IVT\n");
394 print_buffer(ddr_start + ivt_offset,
395 (void *)(ddr_start + ivt_offset),
398 puts("Dumping CSF Header\n");
399 print_buffer(ddr_start + ivt_offset+IVT_SIZE,
400 (void *)(ddr_start + ivt_offset+IVT_SIZE),
405 puts("\nCalling authenticate_image in ROM\n");
406 printf("\tivt_offset = 0x%x\n", ivt_offset);
407 printf("\tstart = 0x%08lx\n", start);
408 printf("\tbytes = 0x%x\n", bytes);
411 * If the MMU is enabled, we have to notify the ROM
412 * code, or it won't flush the caches when needed.
413 * This is done, by setting the "pu_irom_mmu_enabled"
414 * word to 1. You can find its address by looking in
415 * the ROM map. This is critical for
416 * authenticate_image(). If MMU is enabled, without
417 * setting this bit, authentication will fail and may
420 /* Check MMU enabled */
421 if (is_soc_type(MXC_SOC_MX6) && get_cr() & CR_M) {
424 * This won't work on Rev 1.0.0 of
425 * i.MX6Q/D, since their ROM doesn't
426 * do cache flushes. don't think any
427 * exist, so we ignore them.
430 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
431 } else if (is_mx6sdl()) {
432 writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
433 } else if (is_mx6sl()) {
434 writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
438 load_addr = (uint32_t)hab_rvt_authenticate_image(
440 ivt_offset, (void **)&start,
441 (size_t *)&bytes, NULL);
442 if (hab_rvt_exit() != HAB_SUCCESS) {
443 puts("hab exit function fail\n");
447 puts("hab entry function fail\n");
450 hab_caam_clock_enable(0);
454 puts("hab fuse not enabled\n");
457 if ((!is_hab_enabled()) || (load_addr != 0))
463 int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
475 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
478 ulong addr, ivt_offset;
482 return CMD_RET_USAGE;
484 addr = simple_strtoul(argv[1], NULL, 16);
485 ivt_offset = simple_strtoul(argv[2], NULL, 16);
487 rcode = authenticate_image(addr, ivt_offset);
493 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
494 "display HAB status",
499 hab_auth_img, 3, 0, do_authenticate_image,
500 "authenticate image via HAB",
502 "addr - image hex address\n"
503 "ivt_offset - hex offset of IVT in the image"