git.sur5r.net Git - u-boot/blob - arch/arm/imx-common/hab.c

   1 /*
   2  * Copyright (C) 2010-2015 Freescale Semiconductor, Inc.
   3  *
   4  * SPDX-License-Identifier:    GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <config.h>
   9 #include <fuse.h>
  10 #include <asm/io.h>
  11 #include <asm/system.h>
  12 #include <asm/arch/clock.h>
  13 #include <asm/arch/sys_proto.h>
  14 #include <asm/imx-common/hab.h>
  15
  16 /* -------- start of HAB API updates ------------*/
  17
  18 #define hab_rvt_report_event_p                                  \
  19 (                                                               \
  20         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  21           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  22           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  23         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
  24         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  25          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  26         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT_NEW) :  \
  27         ((hab_rvt_report_event_t *)HAB_RVT_REPORT_EVENT)        \
  28 )
  29
  30 #define hab_rvt_report_status_p                                 \
  31 (                                                               \
  32         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  33           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  34           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  35         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  36         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  37          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  38         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS_NEW) :\
  39         ((hab_rvt_report_status_t *)HAB_RVT_REPORT_STATUS)      \
  40 )
  41
  42 #define hab_rvt_authenticate_image_p                            \
  43 (                                                               \
  44         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  45           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  46           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  47         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  48         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  49          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  50         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE_NEW) : \
  51         ((hab_rvt_authenticate_image_t *)HAB_RVT_AUTHENTICATE_IMAGE)    \
  52 )
  53
  54 #define hab_rvt_entry_p                                         \
  55 (                                                               \
  56         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  57           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  58           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  59         ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
  60         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  61          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  62         ((hab_rvt_entry_t *)HAB_RVT_ENTRY_NEW) :                \
  63         ((hab_rvt_entry_t *)HAB_RVT_ENTRY)                      \
  64 )
  65
  66 #define hab_rvt_exit_p                                          \
  67 (                                                               \
  68         ((is_cpu_type(MXC_CPU_MX6Q) ||                          \
  69           is_cpu_type(MXC_CPU_MX6D)) &&                         \
  70           (soc_rev() >= CHIP_REV_1_5)) ?                        \
  71         ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
  72         (is_cpu_type(MXC_CPU_MX6DL) &&                          \
  73          (soc_rev() >= CHIP_REV_1_2)) ?                         \
  74         ((hab_rvt_exit_t *)HAB_RVT_EXIT_NEW) :                  \
  75         ((hab_rvt_exit_t *)HAB_RVT_EXIT)                        \
  76 )
  77
  78 #define IVT_SIZE                0x20
  79 #define ALIGN_SIZE              0x1000
  80 #define CSF_PAD_SIZE            0x2000
  81 #define MX6DQ_PU_IROM_MMU_EN_VAR        0x009024a8
  82 #define MX6DLS_PU_IROM_MMU_EN_VAR       0x00901dd0
  83 #define MX6SL_PU_IROM_MMU_EN_VAR        0x00900a18
  84
  85 /*
  86  * +------------+  0x0 (DDR_UIMAGE_START) -
  87  * |   Header   |                          |
  88  * +------------+  0x40                    |
  89  * |            |                          |
  90  * |            |                          |
  91  * |            |                          |
  92  * |            |                          |
  93  * | Image Data |                          |
  94  * .            |                          |
  95  * .            |                           > Stuff to be authenticated ----+
  96  * .            |                          |                                |
  97  * |            |                          |                                |
  98  * |            |                          |                                |
  99  * +------------+                          |                                |
 100  * |            |                          |                                |
 101  * | Fill Data  |                          |                                |
 102  * |            |                          |                                |
 103  * +------------+ Align to ALIGN_SIZE      |                                |
 104  * |    IVT     |                          |                                |
 105  * +------------+ + IVT_SIZE              -                                 |
 106  * |            |                                                           |
 107  * |  CSF DATA  | <---------------------------------------------------------+
 108  * |            |
 109  * +------------+
 110  * |            |
 111  * | Fill Data  |
 112  * |            |
 113  * +------------+ + CSF_PAD_SIZE
 114  */
 115
 116 #define MAX_RECORD_BYTES     (8*1024) /* 4 kbytes */
 117
 118 struct record {
 119         uint8_t  tag;                                           /* Tag */
 120         uint8_t  len[2];                                        /* Length */
 121         uint8_t  par;                                           /* Version */
 122         uint8_t  contents[MAX_RECORD_BYTES];/* Record Data */
 123         bool     any_rec_flag;
 124 };
 125
 126 char *rsn_str[] = {"RSN = HAB_RSN_ANY (0x00)\n",
 127                                    "RSN = HAB_ENG_FAIL (0x30)\n",
 128                                    "RSN = HAB_INV_ADDRESS (0x22)\n",
 129                                    "RSN = HAB_INV_ASSERTION (0x0C)\n",
 130                                    "RSN = HAB_INV_CALL (0x28)\n",
 131                                    "RSN = HAB_INV_CERTIFICATE (0x21)\n",
 132                                    "RSN = HAB_INV_COMMAND (0x06)\n",
 133                                    "RSN = HAB_INV_CSF (0x11)\n",
 134                                    "RSN = HAB_INV_DCD (0x27)\n",
 135                                    "RSN = HAB_INV_INDEX (0x0F)\n",
 136                                    "RSN = HAB_INV_IVT (0x05)\n",
 137                                    "RSN = HAB_INV_KEY (0x1D)\n",
 138                                    "RSN = HAB_INV_RETURN (0x1E)\n",
 139                                    "RSN = HAB_INV_SIGNATURE (0x18)\n",
 140                                    "RSN = HAB_INV_SIZE (0x17)\n",
 141                                    "RSN = HAB_MEM_FAIL (0x2E)\n",
 142                                    "RSN = HAB_OVR_COUNT (0x2B)\n",
 143                                    "RSN = HAB_OVR_STORAGE (0x2D)\n",
 144                                    "RSN = HAB_UNS_ALGORITHM (0x12)\n",
 145                                    "RSN = HAB_UNS_COMMAND (0x03)\n",
 146                                    "RSN = HAB_UNS_ENGINE (0x0A)\n",
 147                                    "RSN = HAB_UNS_ITEM (0x24)\n",
 148                                    "RSN = HAB_UNS_KEY (0x1B)\n",
 149                                    "RSN = HAB_UNS_PROTOCOL (0x14)\n",
 150                                    "RSN = HAB_UNS_STATE (0x09)\n",
 151                                    "RSN = INVALID\n",
 152                                    NULL};
 153
 154 char *sts_str[] = {"STS = HAB_SUCCESS (0xF0)\n",
 155                                    "STS = HAB_FAILURE (0x33)\n",
 156                                    "STS = HAB_WARNING (0x69)\n",
 157                                    "STS = INVALID\n",
 158                                    NULL};
 159
 160 char *eng_str[] = {"ENG = HAB_ENG_ANY (0x00)\n",
 161                                    "ENG = HAB_ENG_SCC (0x03)\n",
 162                                    "ENG = HAB_ENG_RTIC (0x05)\n",
 163                                    "ENG = HAB_ENG_SAHARA (0x06)\n",
 164                                    "ENG = HAB_ENG_CSU (0x0A)\n",
 165                                    "ENG = HAB_ENG_SRTC (0x0C)\n",
 166                                    "ENG = HAB_ENG_DCP (0x1B)\n",
 167                                    "ENG = HAB_ENG_CAAM (0x1D)\n",
 168                                    "ENG = HAB_ENG_SNVS (0x1E)\n",
 169                                    "ENG = HAB_ENG_OCOTP (0x21)\n",
 170                                    "ENG = HAB_ENG_DTCP (0x22)\n",
 171                                    "ENG = HAB_ENG_ROM (0x36)\n",
 172                                    "ENG = HAB_ENG_HDCP (0x24)\n",
 173                                    "ENG = HAB_ENG_RTL (0x77)\n",
 174                                    "ENG = HAB_ENG_SW (0xFF)\n",
 175                                    "ENG = INVALID\n",
 176                                    NULL};
 177
 178 char *ctx_str[] = {"CTX = HAB_CTX_ANY(0x00)\n",
 179                                    "CTX = HAB_CTX_FAB (0xFF)\n",
 180                                    "CTX = HAB_CTX_ENTRY (0xE1)\n",
 181                                    "CTX = HAB_CTX_TARGET (0x33)\n",
 182                                    "CTX = HAB_CTX_AUTHENTICATE (0x0A)\n",
 183                                    "CTX = HAB_CTX_DCD (0xDD)\n",
 184                                    "CTX = HAB_CTX_CSF (0xCF)\n",
 185                                    "CTX = HAB_CTX_COMMAND (0xC0)\n",
 186                                    "CTX = HAB_CTX_AUT_DAT (0xDB)\n",
 187                                    "CTX = HAB_CTX_ASSERT (0xA0)\n",
 188                                    "CTX = HAB_CTX_EXIT (0xEE)\n",
 189                                    "CTX = INVALID\n",
 190                                    NULL};
 191
 192 uint8_t hab_statuses[5] = {
 193         HAB_STS_ANY,
 194         HAB_FAILURE,
 195         HAB_WARNING,
 196         HAB_SUCCESS,
 197         -1
 198 };
 199
 200 uint8_t hab_reasons[26] = {
 201         HAB_RSN_ANY,
 202         HAB_ENG_FAIL,
 203         HAB_INV_ADDRESS,
 204         HAB_INV_ASSERTION,
 205         HAB_INV_CALL,
 206         HAB_INV_CERTIFICATE,
 207         HAB_INV_COMMAND,
 208         HAB_INV_CSF,
 209         HAB_INV_DCD,
 210         HAB_INV_INDEX,
 211         HAB_INV_IVT,
 212         HAB_INV_KEY,
 213         HAB_INV_RETURN,
 214         HAB_INV_SIGNATURE,
 215         HAB_INV_SIZE,
 216         HAB_MEM_FAIL,
 217         HAB_OVR_COUNT,
 218         HAB_OVR_STORAGE,
 219         HAB_UNS_ALGORITHM,
 220         HAB_UNS_COMMAND,
 221         HAB_UNS_ENGINE,
 222         HAB_UNS_ITEM,
 223         HAB_UNS_KEY,
 224         HAB_UNS_PROTOCOL,
 225         HAB_UNS_STATE,
 226         -1
 227 };
 228
 229 uint8_t hab_contexts[12] = {
 230         HAB_CTX_ANY,
 231         HAB_CTX_FAB,
 232         HAB_CTX_ENTRY,
 233         HAB_CTX_TARGET,
 234         HAB_CTX_AUTHENTICATE,
 235         HAB_CTX_DCD,
 236         HAB_CTX_CSF,
 237         HAB_CTX_COMMAND,
 238         HAB_CTX_AUT_DAT,
 239         HAB_CTX_ASSERT,
 240         HAB_CTX_EXIT,
 241         -1
 242 };
 243
 244 uint8_t hab_engines[16] = {
 245         HAB_ENG_ANY,
 246         HAB_ENG_SCC,
 247         HAB_ENG_RTIC,
 248         HAB_ENG_SAHARA,
 249         HAB_ENG_CSU,
 250         HAB_ENG_SRTC,
 251         HAB_ENG_DCP,
 252         HAB_ENG_CAAM,
 253         HAB_ENG_SNVS,
 254         HAB_ENG_OCOTP,
 255         HAB_ENG_DTCP,
 256         HAB_ENG_ROM,
 257         HAB_ENG_HDCP,
 258         HAB_ENG_RTL,
 259         HAB_ENG_SW,
 260         -1
 261 };
 262
 263 bool is_hab_enabled(void)
 264 {
 265         struct imx_sec_config_fuse_t *fuse =
 266                 (struct imx_sec_config_fuse_t *)&imx_sec_config_fuse;
 267         uint32_t reg;
 268         int ret;
 269
 270         ret = fuse_read(fuse->bank, fuse->word, &reg);
 271         if (ret) {
 272                 puts("\nSecure boot fuse read error\n");
 273                 return ret;
 274         }
 275
 276         return (reg & 0x2) == 0x2;
 277 }
 278
 279 static inline uint8_t get_idx(uint8_t *list, uint8_t tgt)
 280 {
 281         uint8_t idx = 0;
 282         uint8_t element = list[idx];
 283         while (element != -1) {
 284                 if (element == tgt)
 285                         return idx;
 286                 element = list[++idx];
 287         }
 288         return -1;
 289 }
 290
 291 void process_event_record(uint8_t *event_data, size_t bytes)
 292 {
 293         struct record *rec = (struct record *)event_data;
 294
 295         printf("\n\n%s", sts_str[get_idx(hab_statuses, rec->contents[0])]);
 296         printf("%s", rsn_str[get_idx(hab_reasons, rec->contents[1])]);
 297         printf("%s", ctx_str[get_idx(hab_contexts, rec->contents[2])]);
 298         printf("%s", eng_str[get_idx(hab_engines, rec->contents[3])]);
 299 }
 300
 301 void display_event(uint8_t *event_data, size_t bytes)
 302 {
 303         uint32_t i;
 304
 305         if (!(event_data && bytes > 0))
 306                 return;
 307
 308         for (i = 0; i < bytes; i++) {
 309                 if (i == 0)
 310                         printf("\t0x%02x", event_data[i]);
 311                 else if ((i % 8) == 0)
 312                         printf("\n\t0x%02x", event_data[i]);
 313                 else
 314                         printf(" 0x%02x", event_data[i]);
 315         }
 316
 317         process_event_record(event_data, bytes);
 318 }
 319
 320 int get_hab_status(void)
 321 {
 322         uint32_t index = 0; /* Loop index */
 323         uint8_t event_data[128]; /* Event data buffer */
 324         size_t bytes = sizeof(event_data); /* Event size in bytes */
 325         enum hab_config config = 0;
 326         enum hab_state state = 0;
 327         hab_rvt_report_event_t *hab_rvt_report_event;
 328         hab_rvt_report_status_t *hab_rvt_report_status;
 329
 330         hab_rvt_report_event = hab_rvt_report_event_p;
 331         hab_rvt_report_status = hab_rvt_report_status_p;
 332
 333         if (is_hab_enabled())
 334                 puts("\nSecure boot enabled\n");
 335         else
 336                 puts("\nSecure boot disabled\n");
 337
 338         /* Check HAB status */
 339         if (hab_rvt_report_status(&config, &state) != HAB_SUCCESS) {
 340                 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 341                        config, state);
 342
 343                 /* Display HAB Error events */
 344                 while (hab_rvt_report_event(HAB_FAILURE, index, event_data,
 345                                         &bytes) == HAB_SUCCESS) {
 346                         puts("\n");
 347                         printf("--------- HAB Event %d -----------------\n",
 348                                index + 1);
 349                         puts("event data:\n");
 350                         display_event(event_data, bytes);
 351                         puts("\n");
 352                         bytes = sizeof(event_data);
 353                         index++;
 354                 }
 355         }
 356         /* Display message if no HAB events are found */
 357         else {
 358                 printf("\nHAB Configuration: 0x%02x, HAB State: 0x%02x\n",
 359                        config, state);
 360                 puts("No HAB Events Found!\n\n");
 361         }
 362         return 0;
 363 }
 364
 365 uint32_t authenticate_image(uint32_t ddr_start, uint32_t image_size)
 366 {
 367         uint32_t load_addr = 0;
 368         size_t bytes;
 369         ptrdiff_t ivt_offset = 0;
 370         int result = 0;
 371         ulong start;
 372         hab_rvt_authenticate_image_t *hab_rvt_authenticate_image;
 373         hab_rvt_entry_t *hab_rvt_entry;
 374         hab_rvt_exit_t *hab_rvt_exit;
 375
 376         hab_rvt_authenticate_image = hab_rvt_authenticate_image_p;
 377         hab_rvt_entry = hab_rvt_entry_p;
 378         hab_rvt_exit = hab_rvt_exit_p;
 379
 380         if (is_hab_enabled()) {
 381                 printf("\nAuthenticate image from DDR location 0x%x...\n",
 382                        ddr_start);
 383
 384                 hab_caam_clock_enable(1);
 385
 386                 if (hab_rvt_entry() == HAB_SUCCESS) {
 387                         /* If not already aligned, Align to ALIGN_SIZE */
 388                         ivt_offset = (image_size + ALIGN_SIZE - 1) &
 389                                         ~(ALIGN_SIZE - 1);
 390
 391                         start = ddr_start;
 392                         bytes = ivt_offset + IVT_SIZE + CSF_PAD_SIZE;
 393 #ifdef DEBUG
 394                         printf("\nivt_offset = 0x%x, ivt addr = 0x%x\n",
 395                                ivt_offset, ddr_start + ivt_offset);
 396                         puts("Dumping IVT\n");
 397                         print_buffer(ddr_start + ivt_offset,
 398                                      (void *)(ddr_start + ivt_offset),
 399                                      4, 0x8, 0);
 400
 401                         puts("Dumping CSF Header\n");
 402                         print_buffer(ddr_start + ivt_offset+IVT_SIZE,
 403                                      (void *)(ddr_start + ivt_offset+IVT_SIZE),
 404                                      4, 0x10, 0);
 405
 406                         get_hab_status();
 407
 408                         puts("\nCalling authenticate_image in ROM\n");
 409                         printf("\tivt_offset = 0x%x\n", ivt_offset);
 410                         printf("\tstart = 0x%08lx\n", start);
 411                         printf("\tbytes = 0x%x\n", bytes);
 412 #endif
 413                         /*
 414                          * If the MMU is enabled, we have to notify the ROM
 415                          * code, or it won't flush the caches when needed.
 416                          * This is done, by setting the "pu_irom_mmu_enabled"
 417                          * word to 1. You can find its address by looking in
 418                          * the ROM map. This is critical for
 419                          * authenticate_image(). If MMU is enabled, without
 420                          * setting this bit, authentication will fail and may
 421                          * crash.
 422                          */
 423                         /* Check MMU enabled */
 424                         if (get_cr() & CR_M) {
 425                                 if (is_cpu_type(MXC_CPU_MX6Q) ||
 426                                     is_cpu_type(MXC_CPU_MX6D)) {
 427                                         /*
 428                                          * This won't work on Rev 1.0.0 of
 429                                          * i.MX6Q/D, since their ROM doesn't
 430                                          * do cache flushes. don't think any
 431                                          * exist, so we ignore them.
 432                                          */
 433                                         if (!is_mx6dqp())
 434                                                 writel(1, MX6DQ_PU_IROM_MMU_EN_VAR);
 435                                 } else if (is_cpu_type(MXC_CPU_MX6DL) ||
 436                                            is_cpu_type(MXC_CPU_MX6SOLO)) {
 437                                         writel(1, MX6DLS_PU_IROM_MMU_EN_VAR);
 438                                 } else if (is_cpu_type(MXC_CPU_MX6SL)) {
 439                                         writel(1, MX6SL_PU_IROM_MMU_EN_VAR);
 440                                 }
 441                         }
 442
 443                         load_addr = (uint32_t)hab_rvt_authenticate_image(
 444                                         HAB_CID_UBOOT,
 445                                         ivt_offset, (void **)&start,
 446                                         (size_t *)&bytes, NULL);
 447                         if (hab_rvt_exit() != HAB_SUCCESS) {
 448                                 puts("hab exit function fail\n");
 449                                 load_addr = 0;
 450                         }
 451                 } else {
 452                         puts("hab entry function fail\n");
 453                 }
 454
 455                 hab_caam_clock_enable(0);
 456
 457                 get_hab_status();
 458         } else {
 459                 puts("hab fuse not enabled\n");
 460         }
 461
 462         if ((!is_hab_enabled()) || (load_addr != 0))
 463                 result = 1;
 464
 465         return result;
 466 }
 467
 468 int do_hab_status(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
 469 {
 470         if ((argc != 1)) {
 471                 cmd_usage(cmdtp);
 472                 return 1;
 473         }
 474
 475         get_hab_status();
 476
 477         return 0;
 478 }
 479
 480 static int do_authenticate_image(cmd_tbl_t *cmdtp, int flag, int argc,
 481                                 char * const argv[])
 482 {
 483         ulong   addr, ivt_offset;
 484         int     rcode = 0;
 485
 486         if (argc < 3)
 487                 return CMD_RET_USAGE;
 488
 489         addr = simple_strtoul(argv[1], NULL, 16);
 490         ivt_offset = simple_strtoul(argv[2], NULL, 16);
 491
 492         rcode = authenticate_image(addr, ivt_offset);
 493
 494         return rcode;
 495 }
 496
 497 U_BOOT_CMD(
 498                 hab_status, CONFIG_SYS_MAXARGS, 1, do_hab_status,
 499                 "display HAB status",
 500                 ""
 501           );
 502
 503 U_BOOT_CMD(
 504                 hab_auth_img, 3, 0, do_authenticate_image,
 505                 "authenticate image via HAB",
 506                 "addr ivt_offset\n"
 507                 "addr - image hex address\n"
 508                 "ivt_offset - hex offset of IVT in the image"
 509           );