3 * Sascha Hauer, Pengutronix
5 * (C) Copyright 2009 Freescale Semiconductor, Inc.
7 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/arch/imx-regs.h>
14 #include <asm/arch/clock.h>
15 #include <asm/arch/sys_proto.h>
17 /* General purpose timers registers */
20 unsigned int prescaler;
22 unsigned int nouse[6];
26 static struct mxc_gpt *cur_gpt = (struct mxc_gpt *)GPT1_BASE_ADDR;
28 /* General purpose timers bitfields */
29 #define GPTCR_SWR (1 << 15) /* Software reset */
30 #define GPTCR_24MEN (1 << 10) /* Enable 24MHz clock input */
31 #define GPTCR_FRR (1 << 9) /* Freerun / restart */
32 #define GPTCR_CLKSOURCE_32 (4 << 6) /* Clock source 32khz */
33 #define GPTCR_CLKSOURCE_OSC (5 << 6) /* Clock source OSC */
34 #define GPTCR_CLKSOURCE_PRE (1 << 6) /* Clock source PRECLK */
35 #define GPTCR_CLKSOURCE_MASK (0x7 << 6)
36 #define GPTCR_TEN 1 /* Timer enable */
38 #define GPTPR_PRESCALER24M_SHIFT 12
39 #define GPTPR_PRESCALER24M_MASK (0xF << GPTPR_PRESCALER24M_SHIFT)
41 DECLARE_GLOBAL_DATA_PTR;
43 static inline int gpt_has_clk_source_osc(void)
45 #if defined(CONFIG_MX6)
46 if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) ||
47 is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul())
56 static inline ulong gpt_get_clk(void)
58 #ifdef CONFIG_MXC_GPT_HCLK
59 if (gpt_has_clk_source_osc())
62 return mxc_get_clock(MXC_IPG_PERCLK);
72 /* setup GP Timer 1 */
73 __raw_writel(GPTCR_SWR, &cur_gpt->control);
75 /* We have no udelay by now */
76 for (i = 0; i < 100; i++)
77 __raw_writel(0, &cur_gpt->control);
79 i = __raw_readl(&cur_gpt->control);
80 i &= ~GPTCR_CLKSOURCE_MASK;
82 #ifdef CONFIG_MXC_GPT_HCLK
83 if (gpt_has_clk_source_osc()) {
84 i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN;
86 /* For DL/S, SX, UL, set 24Mhz OSC Enable bit and prescaler */
87 if (is_mx6sdl() || is_mx6sx() || is_mx6ul()) {
90 /* Produce 3Mhz clock */
91 __raw_writel((7 << GPTPR_PRESCALER24M_SHIFT),
95 i |= GPTCR_CLKSOURCE_PRE | GPTCR_TEN;
98 __raw_writel(0, &cur_gpt->prescaler); /* 32Khz */
99 i |= GPTCR_CLKSOURCE_32 | GPTCR_TEN;
101 __raw_writel(i, &cur_gpt->control);
103 gd->arch.tbl = __raw_readl(&cur_gpt->counter);
109 unsigned long timer_read_counter(void)
111 return __raw_readl(&cur_gpt->counter); /* current tick value */
115 * This function is derived from PowerPC code (timebase clock frequency).
116 * On ARM it returns the number of timer ticks per second.
118 ulong get_tbclk(void)
120 return gpt_get_clk();