3 * SPDX-License-Identifier: GPL-2.0+
6 #ifndef __AT91RM9200_H__
7 #define __AT91RM9200_H__
9 #define CONFIG_AT91FAMILY /* it's a member of AT91 family */
10 #define CONFIG_ARCH_CPU_INIT /* we need arch_cpu_init() for hw timers */
11 #define CONFIG_AT91_GPIO /* and require always gpio features */
13 /* Periperial Identifiers */
15 #define ATMEL_ID_SYS 1 /* System Peripheral */
16 #define ATMEL_ID_PIOA 2 /* PIO port A */
17 #define ATMEL_ID_PIOB 3 /* PIO port B */
18 #define ATMEL_ID_PIOC 4 /* PIO port C */
19 #define ATMEL_ID_PIOD 5 /* PIO port D BGA only */
20 #define ATMEL_ID_USART0 6 /* USART 0 */
21 #define ATMEL_ID_USART1 7 /* USART 1 */
22 #define ATMEL_ID_USART2 8 /* USART 2 */
23 #define ATMEL_ID_USART3 9 /* USART 3 */
24 #define ATMEL_ID_MCI 10 /* Multimedia Card Interface */
25 #define ATMEL_ID_UDP 11 /* USB Device Port */
26 #define ATMEL_ID_TWI 12 /* Two Wire Interface */
27 #define ATMEL_ID_SPI 13 /* Serial Peripheral Interface */
28 #define ATMEL_ID_SSC0 14 /* Synch. Serial Controller 0 */
29 #define ATMEL_ID_SSC1 15 /* Synch. Serial Controller 1 */
30 #define ATMEL_ID_SSC2 16 /* Synch. Serial Controller 2 */
31 #define ATMEL_ID_TC0 17 /* Timer Counter 0 */
32 #define ATMEL_ID_TC1 18 /* Timer Counter 1 */
33 #define ATMEL_ID_TC2 19 /* Timer Counter 2 */
34 #define ATMEL_ID_TC3 20 /* Timer Counter 3 */
35 #define ATMEL_ID_TC4 21 /* Timer Counter 4 */
36 #define ATMEL_ID_TC5 22 /* Timer Counter 5 */
37 #define ATMEL_ID_UHP 23 /* OHCI USB Host Port */
38 #define ATMEL_ID_EMAC 24 /* Ethernet MAC */
39 #define ATMEL_ID_IRQ0 25 /* Advanced Interrupt Controller */
40 #define ATMEL_ID_IRQ1 26 /* Advanced Interrupt Controller */
41 #define ATMEL_ID_IRQ2 27 /* Advanced Interrupt Controller */
42 #define ATMEL_ID_IRQ3 28 /* Advanced Interrupt Controller */
43 #define ATMEL_ID_IRQ4 29 /* Advanced Interrupt Controller */
44 #define ATMEL_ID_IRQ5 30 /* Advanced Interrupt Controller */
45 #define ATMEL_ID_IRQ6 31 /* Advanced Interrupt Controller */
47 #define ATMEL_USB_HOST_BASE 0x00300000
49 #define ATMEL_BASE_TC 0xFFFA0000
50 #define ATMEL_BASE_UDP 0xFFFB0000
51 #define ATMEL_BASE_MCI 0xFFFB4000
52 #define ATMEL_BASE_TWI 0xFFFB8000
53 #define ATMEL_BASE_EMAC 0xFFFBC000
54 #define ATMEL_BASE_USART 0xFFFC0000 /* 4x 0x4000 Offset */
55 #define ATMEL_BASE_USART0 ATMEL_BASE_USART
56 #define ATMEL_BASE_USART1 (ATMEL_BASE_USART + 0x4000)
57 #define ATMEL_BASE_USART2 (ATMEL_BASE_USART + 0x8000)
58 #define ATMEL_BASE_USART3 (ATMEL_BASE_USART + 0xC000)
60 #define ATMEL_BASE_SCC 0xFFFD0000 /* 4x 0x4000 Offset */
61 #define ATMEL_BASE_SPI 0xFFFE0000
63 #define ATMEL_BASE_AIC 0xFFFFF000
64 #define ATMEL_BASE_DBGU 0xFFFFF200
65 #define ATMEL_BASE_PIO 0xFFFFF400 /* 4x 0x200 Offset */
66 #define ATMEL_BASE_PIOA 0xFFFFF400
67 #define ATMEL_BASE_PIOB 0xFFFFF600
68 #define ATMEL_BASE_PIOC 0xFFFFF800
69 #define ATMEL_BASE_PIOD 0xFFFFFA00
70 #define ATMEL_BASE_PMC 0xFFFFFC00
71 #define ATMEL_BASE_ST 0xFFFFFD00
72 #define ATMEL_BASE_RTC 0xFFFFFE00
73 #define ATMEL_BASE_MC 0xFFFFFF00
75 #define AT91_PIO_BASE ATMEL_BASE_PIO
77 /* AT91RM9200 Periperial Multiplexing A */
79 #define ATMEL_PMX_AA_EREFCK 0x00000080
80 #define ATMEL_PMX_AA_ETXCK 0x00000080
81 #define ATMEL_PMX_AA_ETXEN 0x00000100
82 #define ATMEL_PMX_AA_ETX0 0x00000200
83 #define ATMEL_PMX_AA_ETX1 0x00000400
84 #define ATMEL_PMX_AA_ECRS 0x00000800
85 #define ATMEL_PMX_AA_ECRSDV 0x00000800
86 #define ATMEL_PMX_AA_ERX0 0x00001000
87 #define ATMEL_PMX_AA_ERX1 0x00002000
88 #define ATMEL_PMX_AA_ERXER 0x00004000
89 #define ATMEL_PMX_AA_EMDC 0x00008000
90 #define ATMEL_PMX_AA_EMDIO 0x00010000
92 #define ATMEL_PMX_AA_TXD2 0x00800000
94 #define ATMEL_PMX_AA_TWD 0x02000000
95 #define ATMEL_PMX_AA_TWCK 0x04000000
98 #define ATMEL_PMX_BA_ERXCK 0x00080000
99 #define ATMEL_PMX_BA_ECOL 0x00040000
100 #define ATMEL_PMX_BA_ERXDV 0x00020000
101 #define ATMEL_PMX_BA_ERX3 0x00010000
102 #define ATMEL_PMX_BA_ERX2 0x00008000
103 #define ATMEL_PMX_BA_ETXER 0x00004000
104 #define ATMEL_PMX_BA_ETX3 0x00002000
105 #define ATMEL_PMX_BA_ETX2 0x00001000
109 #define ATMEL_PMX_CA_BFCK 0x00000001
110 #define ATMEL_PMX_CA_BFRDY 0x00000002
111 #define ATMEL_PMX_CA_SMOE 0x00000002
112 #define ATMEL_PMX_CA_BFAVD 0x00000004
113 #define ATMEL_PMX_CA_BFBAA 0x00000008
114 #define ATMEL_PMX_CA_SMWE 0x00000008
115 #define ATMEL_PMX_CA_BFOE 0x00000010
116 #define ATMEL_PMX_CA_BFWE 0x00000020
117 #define ATMEL_PMX_CA_NWAIT 0x00000040
118 #define ATMEL_PMX_CA_A23 0x00000080
119 #define ATMEL_PMX_CA_A24 0x00000100
120 #define ATMEL_PMX_CA_A25 0x00000200
121 #define ATMEL_PMX_CA_CFRNW 0x00000200
122 #define ATMEL_PMX_CA_NCS4 0x00000400
123 #define ATMEL_PMX_CA_CFCS 0x00000400
124 #define ATMEL_PMX_CA_NCS5 0x00000800
125 #define ATMEL_PMX_CA_CFCE1 0x00001000
126 #define ATMEL_PMX_CA_NCS6 0x00001000
127 #define ATMEL_PMX_CA_CFCE2 0x00002000
128 #define ATMEL_PMX_CA_NCS7 0x00002000
129 #define ATMEL_PMX_CA_D16_31 0xFFFF0000
131 #define ATMEL_PIO_PORTS 4 /* theese SoCs have 4 PIO */
132 #define ATMEL_PMC_UHP AT91RM9200_PMC_UHP
134 #define CONFIG_SYS_ATMEL_CPU_NAME "AT91RM9200"