2 * (C) Copyright 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 #ifndef _EXYNOS4_CPU_H
23 #define _EXYNOS4_CPU_H
25 #define DEVICE_NOT_AVAILABLE 0
27 #define EXYNOS_CPU_NAME "Exynos"
28 #define EXYNOS4_ADDR_BASE 0x10000000
31 #define EXYNOS4_GPIO_PART3_BASE 0x03860000
32 #define EXYNOS4_PRO_ID 0x10000000
33 #define EXYNOS4_SYSREG_BASE 0x10010000
34 #define EXYNOS4_POWER_BASE 0x10020000
35 #define EXYNOS4_SWRESET 0x10020400
36 #define EXYNOS4_CLOCK_BASE 0x10030000
37 #define EXYNOS4_SYSTIMER_BASE 0x10050000
38 #define EXYNOS4_WATCHDOG_BASE 0x10060000
39 #define EXYNOS4_MIU_BASE 0x10600000
40 #define EXYNOS4_DMC0_BASE 0x10400000
41 #define EXYNOS4_DMC1_BASE 0x10410000
42 #define EXYNOS4_GPIO_PART2_BASE 0x11000000
43 #define EXYNOS4_GPIO_PART1_BASE 0x11400000
44 #define EXYNOS4_FIMD_BASE 0x11C00000
45 #define EXYNOS4_MIPI_DSIM_BASE 0x11C80000
46 #define EXYNOS4_USBOTG_BASE 0x12480000
47 #define EXYNOS4_MMC_BASE 0x12510000
48 #define EXYNOS4_SROMC_BASE 0x12570000
49 #define EXYNOS4_USB_HOST_EHCI_BASE 0x12580000
50 #define EXYNOS4_USBPHY_BASE 0x125B0000
51 #define EXYNOS4_UART_BASE 0x13800000
52 #define EXYNOS4_I2C_BASE 0x13860000
53 #define EXYNOS4_ADC_BASE 0x13910000
54 #define EXYNOS4_SPI_BASE 0x13920000
55 #define EXYNOS4_PWMTIMER_BASE 0x139D0000
56 #define EXYNOS4_MODEM_BASE 0x13A00000
57 #define EXYNOS4_USBPHY_CONTROL 0x10020704
58 #define EXYNOS4_I2S_BASE 0xE2100000
60 #define EXYNOS4_GPIO_PART4_BASE DEVICE_NOT_AVAILABLE
61 #define EXYNOS4_DP_BASE DEVICE_NOT_AVAILABLE
62 #define EXYNOS4_SPI_ISP_BASE DEVICE_NOT_AVAILABLE
65 #define EXYNOS5_I2C_SPACING 0x10000
67 #define EXYNOS5_GPIO_PART4_BASE 0x03860000
68 #define EXYNOS5_PRO_ID 0x10000000
69 #define EXYNOS5_CLOCK_BASE 0x10010000
70 #define EXYNOS5_POWER_BASE 0x10040000
71 #define EXYNOS5_SWRESET 0x10040400
72 #define EXYNOS5_SYSREG_BASE 0x10050000
73 #define EXYNOS5_WATCHDOG_BASE 0x101D0000
74 #define EXYNOS5_DMC_PHY0_BASE 0x10C00000
75 #define EXYNOS5_DMC_PHY1_BASE 0x10C10000
76 #define EXYNOS5_GPIO_PART3_BASE 0x10D10000
77 #define EXYNOS5_DMC_CTRL_BASE 0x10DD0000
78 #define EXYNOS5_GPIO_PART1_BASE 0x11400000
79 #define EXYNOS5_MIPI_DSIM_BASE 0x11D00000
80 #define EXYNOS5_USB_HOST_EHCI_BASE 0x12110000
81 #define EXYNOS5_USBPHY_BASE 0x12130000
82 #define EXYNOS5_USBOTG_BASE 0x12140000
83 #define EXYNOS5_MMC_BASE 0x12200000
84 #define EXYNOS5_SROMC_BASE 0x12250000
85 #define EXYNOS5_UART_BASE 0x12C00000
86 #define EXYNOS5_I2C_BASE 0x12C60000
87 #define EXYNOS5_SPI_BASE 0x12D20000
88 #define EXYNOS5_I2S_BASE 0x12D60000
89 #define EXYNOS5_PWMTIMER_BASE 0x12DD0000
90 #define EXYNOS5_SPI_ISP_BASE 0x131A0000
91 #define EXYNOS5_GPIO_PART2_BASE 0x13400000
92 #define EXYNOS5_FIMD_BASE 0x14400000
93 #define EXYNOS5_DP_BASE 0x145B0000
95 #define EXYNOS5_ADC_BASE DEVICE_NOT_AVAILABLE
96 #define EXYNOS5_MODEM_BASE DEVICE_NOT_AVAILABLE
100 /* CPU detection macros */
101 extern unsigned int s5p_cpu_id;
102 extern unsigned int s5p_cpu_rev;
104 static inline int s5p_get_cpu_rev(void)
109 static inline void s5p_set_cpu_id(void)
111 unsigned int pro_id = (readl(EXYNOS4_PRO_ID) & 0x00FFF000) >> 12;
115 /* Exynos4210 EVT0 */
120 /* Exynos4210 EVT1 */
134 static inline char *s5p_get_cpu_name(void)
136 return EXYNOS_CPU_NAME;
139 #define IS_SAMSUNG_TYPE(type, id) \
140 static inline int cpu_is_##type(void) \
142 return (s5p_cpu_id >> 12) == id; \
145 IS_SAMSUNG_TYPE(exynos4, 0x4)
146 IS_SAMSUNG_TYPE(exynos5, 0x5)
148 #define IS_EXYNOS_TYPE(type, id) \
149 static inline int proid_is_##type(void) \
151 return s5p_cpu_id == id; \
154 IS_EXYNOS_TYPE(exynos4210, 0x4210)
155 IS_EXYNOS_TYPE(exynos5250, 0x5250)
157 #define SAMSUNG_BASE(device, base) \
158 static inline unsigned int samsung_get_base_##device(void) \
160 if (cpu_is_exynos4()) \
161 return EXYNOS4_##base; \
162 else if (cpu_is_exynos5()) \
163 return EXYNOS5_##base; \
168 SAMSUNG_BASE(adc, ADC_BASE)
169 SAMSUNG_BASE(clock, CLOCK_BASE)
170 SAMSUNG_BASE(dp, DP_BASE)
171 SAMSUNG_BASE(sysreg, SYSREG_BASE)
172 SAMSUNG_BASE(fimd, FIMD_BASE)
173 SAMSUNG_BASE(i2c, I2C_BASE)
174 SAMSUNG_BASE(i2s, I2S_BASE)
175 SAMSUNG_BASE(mipi_dsim, MIPI_DSIM_BASE)
176 SAMSUNG_BASE(gpio_part1, GPIO_PART1_BASE)
177 SAMSUNG_BASE(gpio_part2, GPIO_PART2_BASE)
178 SAMSUNG_BASE(gpio_part3, GPIO_PART3_BASE)
179 SAMSUNG_BASE(gpio_part4, GPIO_PART4_BASE)
180 SAMSUNG_BASE(pro_id, PRO_ID)
181 SAMSUNG_BASE(mmc, MMC_BASE)
182 SAMSUNG_BASE(modem, MODEM_BASE)
183 SAMSUNG_BASE(sromc, SROMC_BASE)
184 SAMSUNG_BASE(swreset, SWRESET)
185 SAMSUNG_BASE(timer, PWMTIMER_BASE)
186 SAMSUNG_BASE(uart, UART_BASE)
187 SAMSUNG_BASE(usb_phy, USBPHY_BASE)
188 SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
189 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
190 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
191 SAMSUNG_BASE(power, POWER_BASE)
192 SAMSUNG_BASE(spi, SPI_BASE)
193 SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
196 #endif /* _EXYNOS4_CPU_H */