1 /* SPDX-License-Identifier: GPL-2.0+ */
4 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
7 #ifndef __ASM_ARCH_CLOCK_H
8 #define __ASM_ARCH_CLOCK_H
12 #ifdef CONFIG_SYS_MX5_HCLK
13 #define MXC_HCLK CONFIG_SYS_MX5_HCLK
15 #define MXC_HCLK 24000000
18 #ifdef CONFIG_SYS_MX5_CLK32
19 #define MXC_CLK32 CONFIG_SYS_MX5_CLK32
21 #define MXC_CLK32 32768
43 u32 imx_get_uartclk(void);
44 u32 imx_get_fecclk(void);
45 unsigned int mxc_get_clock(enum mxc_clock clk);
46 int mxc_set_clock(u32 ref, u32 freq, u32 clk_type);
47 void set_usb_phy_clk(void);
48 void enable_usb_phy1_clk(bool enable);
49 void enable_usb_phy2_clk(bool enable);
50 void set_usboh3_clk(void);
51 void enable_usboh3_clk(bool enable);
52 void mxc_set_sata_internal_clock(void);
53 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
54 void enable_nfc_clk(unsigned char enable);
55 void enable_efuse_prog_supply(bool enable);
57 #endif /* __ASM_ARCH_CLOCK_H */