3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef __ASM_ARCH_CLOCK_H
9 #define __ASM_ARCH_CLOCK_H
13 #ifdef CONFIG_SYS_MX6_HCLK
14 #define MXC_HCLK CONFIG_SYS_MX6_HCLK
16 #define MXC_HCLK 24000000
19 #ifdef CONFIG_SYS_MX6_CLK32
20 #define MXC_CLK32 CONFIG_SYS_MX6_CLK32
22 #define MXC_CLK32 32768
52 u32 imx_get_uartclk(void);
53 u32 imx_get_fecclk(void);
54 unsigned int mxc_get_clock(enum mxc_clock clk);
55 void setup_gpmi_io_clk(u32 cfg);
56 void hab_caam_clock_enable(unsigned char enable);
57 void enable_ocotp_clk(unsigned char enable);
58 void enable_usboh3_clk(unsigned char enable);
59 void enable_uart_clk(unsigned char enable);
60 int enable_usdhc_clk(unsigned char enable, unsigned bus_num);
61 int enable_sata_clock(void);
62 void disable_sata_clock(void);
63 int enable_pcie_clock(void);
64 int enable_i2c_clk(unsigned char enable, unsigned i2c_num);
65 int enable_spi_clk(unsigned char enable, unsigned spi_num);
66 void enable_ipu_clock(void);
67 int enable_fec_anatop_clock(enum enet_freq freq);
68 void enable_enet_clk(unsigned char enable);
69 void enable_qspi_clk(int qspi_num);
70 void enable_thermal_clk(void);
71 #endif /* __ASM_ARCH_CLOCK_H */