2 * (C) Copyright 2006-2010
3 * Texas Instruments, <www.ti.com>
5 * SPDX-License-Identifier: GPL-2.0+
11 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
12 #include <asm/types.h>
13 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
15 #include <asm/arch/hardware.h>
17 #ifndef __KERNEL_STRICT_NAMES
20 u32 tidr; /* 0x00 r */
22 u32 tiocp_cfg; /* 0x10 rw */
23 u32 tistat; /* 0x14 r */
24 u32 tisr; /* 0x18 rw */
25 u32 tier; /* 0x1c rw */
26 u32 twer; /* 0x20 rw */
27 u32 tclr; /* 0x24 rw */
28 u32 tcrr; /* 0x28 rw */
29 u32 tldr; /* 0x2c rw */
30 u32 ttgr; /* 0x30 rw */
31 u32 twpc; /* 0x34 r */
32 u32 tmar; /* 0x38 rw */
33 u32 tcar1; /* 0x3c r */
34 u32 tcicr; /* 0x40 rw */
35 u32 tcar2; /* 0x44 r */
37 #endif /* __ASSEMBLY__ */
38 #endif /* __KERNEL_STRICT_NAMES */
40 /* enable sys_clk NO-prescale /1 */
41 #define GPT_EN ((0x0 << 2) | (0x1 << 1) | (0x1 << 0))
44 #ifndef __KERNEL_STRICT_NAMES
48 u32 wwps; /* 0x34 r */
50 u32 wspr; /* 0x48 rw */
52 #endif /* __ASSEMBLY__ */
53 #endif /* __KERNEL_STRICT_NAMES */
55 #define WD_UNLOCK1 0xAAAA
56 #define WD_UNLOCK2 0x5555
58 #define TCLR_ST (0x1 << 0)
59 #define TCLR_AR (0x1 << 1)
60 #define TCLR_PRE (0x1 << 5)
63 #define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000)
64 #define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000)
65 #define I2C_BASE3 (OMAP44XX_L4_PER_BASE + 0x60000)
66 #define I2C_BASE4 (OMAP44XX_L4_PER_BASE + 0x350000)
69 #define MUSB_BASE (OMAP44XX_L4_CORE_BASE + 0xAB000)
71 /* OMAP4 GPIO registers */
72 #define OMAP_GPIO_REVISION 0x0000
73 #define OMAP_GPIO_SYSCONFIG 0x0010
74 #define OMAP_GPIO_SYSSTATUS 0x0114
75 #define OMAP_GPIO_IRQSTATUS1 0x0118
76 #define OMAP_GPIO_IRQSTATUS2 0x0128
77 #define OMAP_GPIO_IRQENABLE2 0x012c
78 #define OMAP_GPIO_IRQENABLE1 0x011c
79 #define OMAP_GPIO_WAKE_EN 0x0120
80 #define OMAP_GPIO_CTRL 0x0130
81 #define OMAP_GPIO_OE 0x0134
82 #define OMAP_GPIO_DATAIN 0x0138
83 #define OMAP_GPIO_DATAOUT 0x013c
84 #define OMAP_GPIO_LEVELDETECT0 0x0140
85 #define OMAP_GPIO_LEVELDETECT1 0x0144
86 #define OMAP_GPIO_RISINGDETECT 0x0148
87 #define OMAP_GPIO_FALLINGDETECT 0x014c
88 #define OMAP_GPIO_DEBOUNCE_EN 0x0150
89 #define OMAP_GPIO_DEBOUNCE_VAL 0x0154
90 #define OMAP_GPIO_CLEARIRQENABLE1 0x0160
91 #define OMAP_GPIO_SETIRQENABLE1 0x0164
92 #define OMAP_GPIO_CLEARWKUENA 0x0180
93 #define OMAP_GPIO_SETWKUENA 0x0184
94 #define OMAP_GPIO_CLEARDATAOUT 0x0190
95 #define OMAP_GPIO_SETDATAOUT 0x0194
102 #define PRM_BASE 0x4A306000
103 #define PRM_DEVICE_BASE (PRM_BASE + 0x1B00)
105 #define PRM_RSTCTRL PRM_DEVICE_BASE
106 #define PRM_RSTCTRL_RESET 0x01
107 #define PRM_RSTST (PRM_DEVICE_BASE + 0x4)
108 #define PRM_RSTST_WARM_RESET_MASK 0x07EA