2 * (C) Copyright 2006-2010
3 * Texas Instruments, <www.ti.com>
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
29 #include <asm/types.h>
30 #endif /* !(__KERNEL_STRICT_NAMES || __ASSEMBLY__) */
32 #ifndef __KERNEL_STRICT_NAMES
35 u32 tidr; /* 0x00 r */
37 u32 tiocp_cfg; /* 0x10 rw */
38 u32 tistat; /* 0x14 r */
39 u32 tisr; /* 0x18 rw */
40 u32 tier; /* 0x1c rw */
41 u32 twer; /* 0x20 rw */
42 u32 tclr; /* 0x24 rw */
43 u32 tcrr; /* 0x28 rw */
44 u32 tldr; /* 0x2c rw */
45 u32 ttgr; /* 0x30 rw */
46 u32 twpc; /* 0x34 r */
47 u32 tmar; /* 0x38 rw */
48 u32 tcar1; /* 0x3c r */
49 u32 tcicr; /* 0x40 rw */
50 u32 tcar2; /* 0x44 r */
52 #endif /* __ASSEMBLY__ */
53 #endif /* __KERNEL_STRICT_NAMES */
55 /* enable sys_clk NO-prescale /1 */
56 #define GPT_EN ((0x0 << 2) | (0x1 << 1) | (0x1 << 0))
59 #ifndef __KERNEL_STRICT_NAMES
63 u32 wwps; /* 0x34 r */
65 u32 wspr; /* 0x48 rw */
67 #endif /* __ASSEMBLY__ */
68 #endif /* __KERNEL_STRICT_NAMES */
70 #define WD_UNLOCK1 0xAAAA
71 #define WD_UNLOCK2 0x5555
73 #define SYSCLKDIV_1 (0x1 << 6)
74 #define SYSCLKDIV_2 (0x1 << 7)
76 #define CLKSEL_GPT1 (0x1 << 0)
78 #define EN_GPT1 (0x1 << 0)
79 #define EN_32KSYNC (0x1 << 2)
81 #define ST_WDT2 (0x1 << 5)
83 #define RESETDONE (0x1 << 0)
85 #define TCLR_ST (0x1 << 0)
86 #define TCLR_AR (0x1 << 1)
87 #define TCLR_PRE (0x1 << 5)
90 #define I2C_BASE1 (OMAP44XX_L4_PER_BASE + 0x70000)
91 #define I2C_BASE2 (OMAP44XX_L4_PER_BASE + 0x72000)
92 #define I2C_BASE3 (OMAP44XX_L4_PER_BASE + 0x60000)