2 * Copyright (c) 2015 Google, Inc
4 * Copyright 2014 Rockchip Inc.
6 * SPDX-License-Identifier: GPL-2.0
9 #ifndef _ASM_ARCH_RK3288_SDRAM_H__
10 #define _ASM_ARCH_RK3288_SDRAM_H__
18 struct rk3288_sdram_channel {
20 * bit width in address, eg:
21 * 8 banks using 3 bit to address,
22 * 2 cs using 1 bit to address.
32 #if CONFIG_IS_ENABLED(OF_PLATDATA)
34 * For of-platdata, which would otherwise convert this into two
35 * byte-swapped integers. With a size of 9 bytes, this struct will
36 * appear in of-platdata as a byte array.
38 * If OF_PLATDATA enabled, need to add a dummy byte in dts.(i.e 0xff)
44 struct rk3288_sdram_pctl_timing {
80 check_member(rk3288_sdram_pctl_timing, tdpd, 0x144 - 0xc0);
82 struct rk3288_sdram_phy_timing {
89 struct rk3288_base_params {
96 * DDR Stride is address mapping for DRAM space
97 * Stride Ch 0 range Ch1 range Total
98 * 0x00 0-256MB 256MB-512MB 512MB
99 * 0x05 0-1GB 0-1GB 1GB
100 * 0x09 0-2GB 0-2GB 2GB
101 * 0x0d 0-4GB 0-4GB 4GB
103 * 0x1a 0-4GB 4GB-8GB 8GB