2 * (C) Copyright 2015 Chen-Yu Tsai <wens@csie.org>
4 * SPDX-License-Identifier: GPL-2.0+
12 u32 r0size; /* 0x00 Size of secure RAM region */
13 u32 decport0_status; /* 0x04 Status of decode protection port 0 */
14 u32 decport0_set; /* 0x08 Set decode protection port 0 */
15 u32 decport0_clear; /* 0x0c Clear decode protection port 0 */
16 /* For A80 and later SoCs */
17 u32 decport1_status; /* 0x10 Status of decode protection port 1 */
18 u32 decport1_set; /* 0x14 Set decode protection port 1 */
19 u32 decport1_clear; /* 0x18 Clear decode protection port 1 */
20 u32 decport2_status; /* 0x1c Status of decode protection port 2 */
21 u32 decport2_set; /* 0x20 Set decode protection port 2 */
22 u32 decport2_clear; /* 0x24 Clear decode protection port 2 */
26 #define SUN6I_TZPC_DECPORT0_RTC (1 << 1)
28 #define SUN8I_H3_TZPC_DECPORT0_ALL 0xbe
29 #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff
30 #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f
34 #endif /* _SUNXI_TZPC_H */