2 * NVIDIA Tegra SPI-SLINK controller
4 * Copyright 2010-2013 NVIDIA Corporation
6 * This software may be used and distributed according to the
7 * terms of the GNU Public License, Version 2, incorporated
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * Version 2 as published by the Free Software Foundation.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #ifndef _TEGRA_SLINK_H_
26 #define _TEGRA_SLINK_H_
28 #include <asm/types.h>
31 u32 command; /* SLINK_COMMAND_0 register */
32 u32 command2; /* SLINK_COMMAND2_0 reg */
33 u32 status; /* SLINK_STATUS_0 register */
34 u32 reserved; /* Reserved offset 0C */
35 u32 mas_data; /* SLINK_MAS_DATA_0 reg */
36 u32 slav_data; /* SLINK_SLAVE_DATA_0 reg */
37 u32 dma_ctl; /* SLINK_DMA_CTL_0 register */
38 u32 status2; /* SLINK_STATUS2_0 reg */
39 u32 rsvd[56]; /* 0x20 to 0xFF reserved */
40 u32 tx_fifo; /* SLINK_TX_FIFO_0 reg off 100h */
41 u32 rsvd2[31]; /* 0x104 to 0x17F reserved */
42 u32 rx_fifo; /* SLINK_RX_FIFO_0 reg off 180h */
46 #define SLINK_CMD_ENB (1 << 31)
47 #define SLINK_CMD_GO (1 << 30)
48 #define SLINK_CMD_M_S (1 << 28)
49 #define SLINK_CMD_CK_SDA (1 << 21)
50 #define SLINK_CMD_CS_POL (1 << 13)
51 #define SLINK_CMD_CS_VAL (1 << 12)
52 #define SLINK_CMD_CS_SOFT (1 << 11)
53 #define SLINK_CMD_BIT_LENGTH (1 << 4)
54 #define SLINK_CMD_BIT_LENGTH_MASK 0x0000001F
56 #define SLINK_CMD2_TXEN (1 << 30)
57 #define SLINK_CMD2_RXEN (1 << 31)
58 #define SLINK_CMD2_SS_EN (1 << 18)
59 #define SLINK_CMD2_SS_EN_SHIFT 18
60 #define SLINK_CMD2_SS_EN_MASK 0x000C0000
61 #define SLINK_CMD2_CS_ACTIVE_BETWEEN (1 << 17)
63 #define SLINK_STAT_BSY (1 << 31)
64 #define SLINK_STAT_RDY (1 << 30)
65 #define SLINK_STAT_ERR (1 << 29)
66 #define SLINK_STAT_RXF_FLUSH (1 << 27)
67 #define SLINK_STAT_TXF_FLUSH (1 << 26)
68 #define SLINK_STAT_RXF_OVF (1 << 25)
69 #define SLINK_STAT_TXF_UNR (1 << 24)
70 #define SLINK_STAT_RXF_EMPTY (1 << 23)
71 #define SLINK_STAT_RXF_FULL (1 << 22)
72 #define SLINK_STAT_TXF_EMPTY (1 << 21)
73 #define SLINK_STAT_TXF_FULL (1 << 20)
74 #define SLINK_STAT_TXF_OVF (1 << 19)
75 #define SLINK_STAT_RXF_UNR (1 << 18)
76 #define SLINK_STAT_CUR_BLKCNT (1 << 15)
78 #define SLINK_STAT2_RXF_FULL_CNT (1 << 16)
79 #define SLINK_STAT2_TXF_FULL_CNT (1 << 0)
81 #define SPI_TIMEOUT 1000
82 #define TEGRA_SPI_MAX_FREQ 52000000
84 #endif /* _TEGRA_SLINK_H_ */