2 * Copyright (c) 2010-2013, NVIDIA CORPORATION. All rights reserved.
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * You should have received a copy of the GNU General Public License
14 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 #ifndef _TEGRA114_PINMUX_H_
18 #define _TEGRA114_PINMUX_H_
21 * Pin groups which we adjust. There are three basic attributes of each pin
22 * group which use this enum:
26 * - tristate or normal
29 PINGRP_ULPI_DATA0 = 0, /* offset 0x3000 */
267 PINGRP_PEX_L0_PRSNT_N,
269 PINGRP_PEX_L0_CLKREQ_N,
271 PINGRP_PEX_L1_PRSNT_N,
273 PINGRP_PEX_L1_CLKREQ_N,
274 PINGRP_PEX_L2_PRSNT_N,
276 PINGRP_PEX_L2_CLKREQ_N,
277 PINGRP_HDMI_CEC, /* offset 0x33e0 */
282 PINGRP_USB_VBUS_EN0, /* offset 0x33f4 */
284 PINGRP_SDMMC3_CLK_LB_IN,
285 PINGRP_SDMMC3_CLK_LB_OUT,
286 PINGRP_NAND_GMI_CLK_LB,
292 PDRIVE_PINGROUP_AO1 = 0, /* offset 0x868 */
299 PDRIVE_PINGROUP_CDEV1,
300 PDRIVE_PINGROUP_CDEV2,
301 PDRIVE_PINGROUP_CSUS,
302 PDRIVE_PINGROUP_DAP1,
303 PDRIVE_PINGROUP_DAP2,
304 PDRIVE_PINGROUP_DAP3,
305 PDRIVE_PINGROUP_DAP4,
307 PDRIVE_PINGROUP_LCD1,
308 PDRIVE_PINGROUP_LCD2,
309 PDRIVE_PINGROUP_SDIO2,
310 PDRIVE_PINGROUP_SDIO3,
314 PDRIVE_PINGROUP_UART2,
315 PDRIVE_PINGROUP_UART3,
316 PDRIVE_PINGROUP_VI1 = 24, /* offset 0x8c8 */
317 PDRIVE_PINGROUP_SDIO1 = 33, /* offset 0x8ec */
318 PDRIVE_PINGROUP_CRT = 36, /* offset 0x8f8 */
331 PDRIVE_PINGROUP_DEV3 = 49, /* offset 0x92c */
332 PDRIVE_PINGROUP_CEC = 52, /* offset 0x938 */
334 PDRIVE_PINGROUP_DAP5,
335 PDRIVE_PINGROUP_VBUS,
336 PDRIVE_PINGROUP_COUNT,
340 * Functions which can be assigned to each of the pin groups. The values here
341 * bear no relation to the values programmed into pinmux registers and are
342 * purely a convenience. The translation is done through a table search.
347 PMUX_FUNC_AUDIO_SYNC,
356 PMUX_FUNC_EMC_TEST0_DLL,
357 PMUX_FUNC_EMC_TEST1_DLL,
402 PMUX_FUNC_VI_SENSOR_CLK,
416 PMUX_FUNC_EXTPERIPH1,
417 PMUX_FUNC_EXTPERIPH2,
418 PMUX_FUNC_EXTPERIPH3,
455 PMUX_FUNC_RESET_OUT_N,
460 PMUX_FUNC_RSVD1 = 0x8000,
461 PMUX_FUNC_RSVD2 = 0x8001,
462 PMUX_FUNC_RSVD3 = 0x8002,
463 PMUX_FUNC_RSVD4 = 0x8003,
466 /* return 1 if a pmux_func is in range */
467 #define pmux_func_isvalid(func) ((((func) >= 0) && ((func) < PMUX_FUNC_MAX)) \
468 || (((func) >= PMUX_FUNC_RSVD1) && ((func) <= PMUX_FUNC_RSVD4)))
470 /* return 1 if a pingrp is in range */
471 #define pmux_pingrp_isvalid(pin) (((pin) >= 0) && ((pin) < PINGRP_COUNT))
473 /* The pullup/pulldown state of a pin group */
475 PMUX_PULL_NORMAL = 0,
479 /* return 1 if a pin_pupd_is in range */
480 #define pmux_pin_pupd_isvalid(pupd) (((pupd) >= PMUX_PULL_NORMAL) && \
481 ((pupd) <= PMUX_PULL_UP))
483 /* Defines whether a pin group is tristated or in normal operation */
486 PMUX_TRI_TRISTATE = 1,
488 /* return 1 if a pin_tristate_is in range */
489 #define pmux_pin_tristate_isvalid(tristate) (((tristate) >= PMUX_TRI_NORMAL) \
490 && ((tristate) <= PMUX_TRI_TRISTATE))
496 /* return 1 if a pin_io_is in range */
497 #define pmux_pin_io_isvalid(io) (((io) >= PMUX_PIN_OUTPUT) && \
498 ((io) <= PMUX_PIN_INPUT))
501 PMUX_PIN_LOCK_DEFAULT = 0,
502 PMUX_PIN_LOCK_DISABLE,
503 PMUX_PIN_LOCK_ENABLE,
505 /* return 1 if a pin_lock is in range */
506 #define pmux_pin_lock_isvalid(lock) (((lock) >= PMUX_PIN_LOCK_DEFAULT) && \
507 ((lock) <= PMUX_PIN_LOCK_ENABLE))
510 PMUX_PIN_OD_DEFAULT = 0,
514 /* return 1 if a pin_od is in range */
515 #define pmux_pin_od_isvalid(od) (((od) >= PMUX_PIN_OD_DEFAULT) && \
516 ((od) <= PMUX_PIN_OD_ENABLE))
518 enum pmux_pin_ioreset {
519 PMUX_PIN_IO_RESET_DEFAULT = 0,
520 PMUX_PIN_IO_RESET_DISABLE,
521 PMUX_PIN_IO_RESET_ENABLE,
523 /* return 1 if a pin_ioreset_is in range */
524 #define pmux_pin_ioreset_isvalid(ioreset) \
525 (((ioreset) >= PMUX_PIN_IO_RESET_DEFAULT) && \
526 ((ioreset) <= PMUX_PIN_IO_RESET_ENABLE))
528 /* Available power domains used by pin groups */
549 /* T114 pin drive group and pin mux registers */
550 #define PDRIVE_PINGROUP_OFFSET (0x868 >> 2)
551 #define PMUX_OFFSET ((0x3000 >> 2) - PDRIVE_PINGROUP_OFFSET - \
552 PDRIVE_PINGROUP_COUNT)
553 struct pmux_tri_ctlr {
554 uint pmt_reserved0; /* ABP_MISC_PP_ reserved offset 00 */
555 uint pmt_reserved1; /* ABP_MISC_PP_ reserved offset 04 */
556 uint pmt_strap_opt_a; /* _STRAPPING_OPT_A_0, offset 08 */
557 uint pmt_reserved2; /* ABP_MISC_PP_ reserved offset 0C */
558 uint pmt_reserved3; /* ABP_MISC_PP_ reserved offset 10 */
559 uint pmt_reserved4[4]; /* _TRI_STATE_REG_A/B/C/D in t20 */
560 uint pmt_cfg_ctl; /* _CONFIG_CTL_0, offset 24 */
562 uint pmt_reserved[528]; /* ABP_MISC_PP_ reserved offs 28-864 */
564 uint pmt_drive[PDRIVE_PINGROUP_COUNT]; /* pin drive grps offs 868 */
565 uint pmt_reserved5[PMUX_OFFSET];
566 uint pmt_ctl[PINGRP_COUNT]; /* mux/pupd/tri regs, offset 0x3000 */
570 * This defines the configuration for a pin, including the function assigned,
571 * pull up/down settings and tristate settings. Having set up one of these
572 * you can call pinmux_config_pingroup() to configure a pin in one step. Also
573 * available is pinmux_config_table() to configure a list of pins.
575 struct pingroup_config {
576 enum pmux_pingrp pingroup; /* pin group PINGRP_... */
577 enum pmux_func func; /* function to assign FUNC_... */
578 enum pmux_pull pull; /* pull up/down/normal PMUX_PULL_...*/
579 enum pmux_tristate tristate; /* tristate or normal PMUX_TRI_... */
580 enum pmux_pin_io io; /* input or output PMUX_PIN_... */
581 enum pmux_pin_lock lock; /* lock enable/disable PMUX_PIN... */
582 enum pmux_pin_od od; /* open-drain or push-pull driver */
583 enum pmux_pin_ioreset ioreset; /* input/output reset PMUX_PIN... */
586 /* Set a pin group to tristate */
587 void pinmux_tristate_enable(enum pmux_pingrp pin);
589 /* Set a pin group to normal (non tristate) */
590 void pinmux_tristate_disable(enum pmux_pingrp pin);
592 /* Set the pull up/down feature for a pin group */
593 void pinmux_set_pullupdown(enum pmux_pingrp pin, enum pmux_pull pupd);
595 /* Set the mux function for a pin group */
596 void pinmux_set_func(enum pmux_pingrp pin, enum pmux_func func);
598 /* Set the complete configuration for a pin group */
599 void pinmux_config_pingroup(struct pingroup_config *config);
601 /* Set a pin group to tristate or normal */
602 void pinmux_set_tristate(enum pmux_pingrp pin, int enable);
604 /* Set a pin group as input or output */
605 void pinmux_set_io(enum pmux_pingrp pin, enum pmux_pin_io io);
608 * Configure a list of pin groups
610 * @param config List of config items
611 * @param len Number of config items in list
613 void pinmux_config_table(struct pingroup_config *config, int len);
615 /* Set a group of pins from a table */
616 void pinmux_init(void);
618 #endif /* _TEGRA114_PINMUX_H_ */