2 * Copyright (c) 2011 The Chromium OS Authors.
3 * Copyright (c) 2013 NVIDIA Corporation
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 #ifndef _TEGRA20_USB_H_
24 #define _TEGRA20_USB_H_
26 /* USB Controller (USBx_CONTROLLER_) regs */
62 uint periodic_list_base;
69 uint reserved6; /* is this port_sc1 on some controllers? */
76 uint endpt_nak_enable;
87 uint endpt_setup_stat;
93 uint reserved11[0x80];
97 uint phy_vbus_sensors;
98 uint phy_vbus_wakeup_id;
99 uint phy_alt_vbus_sys;
102 uint usb1_legacy_ctrl;
106 uint ulpi_timing_ctrl_0;
107 uint ulpi_timing_ctrl_1;
111 uint reserved14[64 * 3];
116 uint utmip_xcvr_cfg0;
117 uint utmip_bias_cfg0;
120 uint utmip_hsrx_cfg0;
121 uint utmip_hsrx_cfg1;
122 uint utmip_fslsrx_cfg0;
123 uint utmip_fslsrx_cfg1;
127 uint utmip_misc_cfg0;
128 uint utmip_misc_cfg1;
129 uint utmip_debounce_cfg0;
132 uint utmip_bat_chrg_cfg0;
133 uint utmip_spare_cfg0;
134 uint utmip_xcvr_cfg1;
135 uint utmip_bias_cfg1;
138 /* USB2_IF_ULPI_TIMING_CTRL_0 */
139 #define ULPI_OUTPUT_PINMUX_BYP (1 << 10)
140 #define ULPI_CLKOUT_PINMUX_BYP (1 << 11)
142 /* USB2_IF_ULPI_TIMING_CTRL_1 */
143 #define ULPI_DATA_TRIMMER_LOAD (1 << 0)
144 #define ULPI_DATA_TRIMMER_SEL(x) (((x) & 0x7) << 1)
145 #define ULPI_STPDIRNXT_TRIMMER_LOAD (1 << 16)
146 #define ULPI_STPDIRNXT_TRIMMER_SEL(x) (((x) & 0x7) << 17)
147 #define ULPI_DIR_TRIMMER_LOAD (1 << 24)
148 #define ULPI_DIR_TRIMMER_SEL(x) (((x) & 0x7) << 25)
150 /* PORTSC, USB2, USB3 */
152 #define PTS_MASK (3U << PTS_SHIFT)
154 #define STS (1 << 29)
155 #endif /* _TEGRA20_USB_H_ */