2 * Copyright (C) ST-Ericsson SA 2009
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 #include <asm/types.h>
28 #include <asm/errno.h>
30 #include <asm/arch/sys_proto.h>
31 #include <asm/arch/u8500.h>
33 #define GPIO_TOTAL_PINS 268
35 #define GPIO_PINS_PER_BLOCK 32
36 #define GPIO_BLOCKS_COUNT (GPIO_TOTAL_PINS/GPIO_PINS_PER_BLOCK + 1)
37 #define GPIO_BLOCK(pin) (((pin + GPIO_PINS_PER_BLOCK) >> 5) - 1)
40 struct gpio_register {
41 u32 gpio_dat; /* data register : 0x000 */
42 u32 gpio_dats; /* data Set register : 0x004 */
43 u32 gpio_datc; /* data Clear register : 0x008 */
44 u32 gpio_pdis; /* Pull disable register : 0x00C */
45 u32 gpio_dir; /* data direction register : 0x010 */
46 u32 gpio_dirs; /* data dir Set register : 0x014 */
47 u32 gpio_dirc; /* data dir Clear register : 0x018 */
48 u32 gpio_slpm; /* Sleep mode register : 0x01C */
49 u32 gpio_afsa; /* AltFun A Select reg : 0x020 */
50 u32 gpio_afsb; /* AltFun B Select reg : 0x024 */
51 u32 gpio_lowemi;/* low EMI Select reg : 0x028 */
52 u32 reserved_1[(0x040 - 0x02C) >> 2]; /*0x028-0x3C Reserved*/
53 u32 gpio_rimsc; /* rising edge intr set/clear : 0x040 */
54 u32 gpio_fimsc; /* falling edge intr set/clear register : 0x044 */
55 u32 gpio_mis; /* masked interrupt status register : 0x048 */
56 u32 gpio_ic; /* Interrupt Clear register : 0x04C */
57 u32 gpio_rwimsc;/* Rising-edge Wakeup IMSC register : 0x050 */
58 u32 gpio_fwimsc;/* Falling-edge Wakeup IMSC register : 0x054 */
59 u32 gpio_wks; /* Wakeup Status register : 0x058 */
62 /* Error values returned by functions */
65 GPIO_UNSUPPORTED_HW = -2,
66 GPIO_UNSUPPORTED_FEATURE = -3,
67 GPIO_INVALID_PARAMETER = -4,
68 GPIO_REQUEST_NOT_APPLICABLE = -5,
69 GPIO_REQUEST_PENDING = -6,
70 GPIO_NOT_CONFIGURED = -7,
71 GPIO_INTERNAL_ERROR = -8,
72 GPIO_INTERNAL_EVENT = 1,
73 GPIO_REMAINING_EVENT = 2,
74 GPIO_NO_MORE_PENDING_EVENT = 3,
75 GPIO_INVALID_CLIENT = -25,
76 GPIO_INVALID_PIN = -26,
78 GPIO_PIN_NOT_ALLOCATED = -28,
79 GPIO_WRONG_CLIENT = -29,
80 GPIO_UNSUPPORTED_ALTFUNC = -30,
89 GPIO_DEVICE_ID_INVALID
94 * refered in altfun_table to pointout particular altfun to be enabled
95 * when using GPIO_ALT_FUNCTION A/B/C enable/disable operation
97 enum gpio_alt_function {
98 GPIO_ALT_UART_0_MODEM,
99 GPIO_ALT_UART_0_NO_MODEM,
119 GPIO_ALT_CCIR656_INPUT,
120 GPIO_ALT_CCIR656_OUTPUT,
124 GPIO_ALT_HAMAC_AUDIO_DBG,
125 GPIO_ALT_HAMAC_VIDEO_DBG,
126 GPIO_ALT_CLOCK_RESET,
129 GPIO_ALT_USB_MINIMUM,
135 GPIO_ALT_SRAM_NOR_FLASH,
136 GPIO_ALT_FSMC_ADDLINE_0_TO_15,
143 GPIO_ALT_FSMC_ADD_DATA_0_TO_25,
153 GPIO_ALT_FUNMAX /* Add new alt func before this */
156 /* Defines pin assignment(Software mode or Alternate mode) */
158 GPIO_MODE_LEAVE_UNCHANGED, /* Parameter will be ignored */
159 GPIO_MODE_SOFTWARE, /* Pin connected to GPIO (SW controlled) */
160 GPIO_ALTF_A, /* Pin connected to altfunc 1 (HW periph 1) */
161 GPIO_ALTF_B, /* Pin connected to altfunc 2 (HW periph 2) */
162 GPIO_ALTF_C, /* Pin connected to altfunc 3 (HW periph 3) */
163 GPIO_ALTF_FIND, /* Pin connected to altfunc 3 (HW periph 3) */
164 GPIO_ALTF_DISABLE /* Pin connected to altfunc 3 (HW periph 3) */
167 /* Defines GPIO pin direction */
168 enum gpio_direction {
169 GPIO_DIR_LEAVE_UNCHANGED, /* Parameter will be ignored */
170 GPIO_DIR_INPUT, /* GPIO set as input */
171 GPIO_DIR_OUTPUT /* GPIO set as output */
174 /* Interrupt trigger mode */
176 GPIO_TRIG_LEAVE_UNCHANGED, /* Parameter will be ignored */
177 GPIO_TRIG_DISABLE, /* Trigger no IT */
178 GPIO_TRIG_RISING_EDGE, /* Trigger an IT on rising edge */
179 GPIO_TRIG_FALLING_EDGE, /* Trigger an IT on falling edge */
180 GPIO_TRIG_BOTH_EDGES, /* Trigger an IT on rising and falling edge */
181 GPIO_TRIG_HIGH_LEVEL, /* Trigger an IT on high level */
182 GPIO_TRIG_LOW_LEVEL /* Trigger an IT on low level */
185 /* Configuration parameters for one GPIO pin.*/
188 enum gpio_direction direction;
190 char *dev_name; /* Who owns the gpio pin */
199 /* GPIO behaviour in sleep mode */
200 enum gpio_sleep_mode {
201 GPIO_SLEEP_MODE_LEAVE_UNCHANGED, /* Parameter will be ignored */
202 GPIO_SLEEP_MODE_INPUT_DEFAULTVOLT, /* GPIO is an input with pull
203 up/down enabled when in sleep
205 GPIO_SLEEP_MODE_CONTROLLED_BY_GPIO /* GPIO pin is controlled by
206 GPIO IP. So mode, direction
207 and data values for GPIO pin
208 in sleep mode are determined
209 by configuration set to GPIO
210 pin before entering to sleep
214 /* GPIO ability to wake the system up from sleep mode.*/
216 GPIO_WAKE_LEAVE_UNCHANGED, /* Parameter will be ignored */
217 GPIO_WAKE_DISABLE, /* No wake of system from sleep mode. */
218 GPIO_WAKE_LOW_LEVEL, /* Wake the system up on a LOW level. */
219 GPIO_WAKE_HIGH_LEVEL, /* Wake the system up on a HIGH level. */
220 GPIO_WAKE_RISING_EDGE, /* Wake the system up on a RISING edge. */
221 GPIO_WAKE_FALLING_EDGE, /* Wake the system up on a FALLING edge. */
222 GPIO_WAKE_BOTH_EDGES /* Wake the system up on both RISE and FALL. */
225 /* Configuration parameters for one GPIO pin in sleep mode.*/
226 struct gpio_sleep_config {
227 enum gpio_sleep_mode sleep_mode;/* GPIO behaviour in sleep mode. */
228 enum gpio_wake wake; /* GPIO ability to wake up system. */
231 extern int gpio_setpinconfig(int pin_id, struct gpio_config *pin_config);
232 extern int gpio_resetpinconfig(int pin_id, char *dev_name);
233 extern int gpio_writepin(int pin_id, enum gpio_data value, char *dev_name);
234 extern int gpio_readpin(int pin_id, enum gpio_data *value);
235 extern int gpio_altfuncenable(enum gpio_alt_function altfunc,
237 extern int gpio_altfuncdisable(enum gpio_alt_function altfunc,
240 struct gpio_altfun_data {