2 * (C) Copyright 2014 - 2015 Xilinx, Inc.
3 * Michal Simek <michal.simek@xilinx.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _ASM_ARCH_SYS_PROTO_H
9 #define _ASM_ARCH_SYS_PROTO_H
11 /* Setup clk for network */
12 static inline void zynq_slcr_gem_clk_setup(u32 gem_id, unsigned long clk_rate)
16 int zynq_slcr_get_mio_pin_status(const char *periph);
18 unsigned int zynqmp_get_silicon_version(void);
20 #endif /* _ASM_ARCH_SYS_PROTO_H */