2 * arch/arm/include/asm/assembler.h
4 * Copyright (C) 1996-2000 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 * This file contains arm architecture specific defines
11 * for the different processors.
13 * Do not include any C declarations in this file - it is included by
20 * Endian independent macros for shifting bytes within registers.
25 #define get_byte_0 lsl #0
26 #define get_byte_1 lsr #8
27 #define get_byte_2 lsr #16
28 #define get_byte_3 lsr #24
29 #define put_byte_0 lsl #0
30 #define put_byte_1 lsl #8
31 #define put_byte_2 lsl #16
32 #define put_byte_3 lsl #24
36 #define get_byte_0 lsr #24
37 #define get_byte_1 lsr #16
38 #define get_byte_2 lsr #8
39 #define get_byte_3 lsl #0
40 #define put_byte_0 lsl #24
41 #define put_byte_1 lsl #16
42 #define put_byte_2 lsl #8
43 #define put_byte_3 lsl #0
47 * Data preload for architectures that support it
49 #if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__) || \
50 defined(__ARM_ARCH_6__) || defined(__ARM_ARCH_6J__) || \
51 defined(__ARM_ARCH_6T2__) || defined(__ARM_ARCH_6Z__) || \
52 defined(__ARM_ARCH_6ZK__) || defined(__ARM_ARCH_7A__) || \
53 defined(__ARM_ARCH_7R__)
54 #define PLD(code...) code
59 .irp c,,eq,ne,cs,cc,mi,pl,vs,vc,hi,ls,ge,lt,gt,le,hs,lo
61 #if defined(__ARM_ARCH_5E__) || defined(__ARM_ARCH_5TE__)
74 * Cache aligned, used for optimized memcpy/memset
75 * In the kernel this is only enabled for Feroceon CPU's...
76 * We disable it especially for Thumb builds since those instructions
77 * are not made in a Thumb ready way...
79 #ifdef CONFIG_SYS_THUMB_BUILD
80 #define CALGN(code...)
82 #define CALGN(code...) code