2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
10 #ifdef CONFIG_SECURE_BOOT
12 #ifndef CONFIG_FIT_SIGNATURE
13 #define CONFIG_CHAIN_OF_TRUST
18 #ifdef CONFIG_CHAIN_OF_TRUST
19 #define CONFIG_CMD_ESBC_VALIDATE
20 #define CONFIG_FSL_SEC_MON
21 #define CONFIG_SHA_HW_ACCEL
22 #define CONFIG_SHA_PROG_HW_ACCEL
23 #define CONFIG_RSA_FREESCALE_EXP
25 #ifndef CONFIG_FSL_CAAM
26 #define CONFIG_FSL_CAAM
29 #ifdef CONFIG_SPL_BUILD
30 #define CONFIG_SPL_BOARD_INIT
31 #define CONFIG_SPL_DM 1
32 #define CONFIG_SPL_CRYPTO_SUPPORT
33 #define CONFIG_SPL_HASH_SUPPORT
34 #define CONFIG_SPL_RSA
35 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
37 * Define the key hash for U-Boot here if public/private key pair used to
38 * sign U-boot are different from the SRK hash put in the fuse
39 * Example of defining KEY_HASH is
40 * #define CONFIG_SPL_UBOOT_KEY_HASH \
41 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
42 * else leave it defined as NULL
45 #define CONFIG_SPL_UBOOT_KEY_HASH NULL
46 #endif /* ifdef CONFIG_SPL_BUILD */
48 #ifndef CONFIG_SPL_BUILD
49 #define CONFIG_CMD_BLOB
50 #define CONFIG_CMD_HASH
51 #define CONFIG_KEY_REVOCATION
52 #ifndef CONFIG_SYS_RAMBOOT
53 /* The key used for verification of next level images
54 * is picked up from an Extension Table which has
55 * been verified by the ISBC (Internal Secure boot Code)
56 * in boot ROM of the SoC.
57 * The feature is only applicable in case of NOR boot and is
58 * not applicable in case of RAMBOOT (NAND, SD, SPI).
60 #ifndef CONFIG_ESBC_HDR_LS
61 /* Current Key EXT feature not available in LS ESBC Header */
62 #define CONFIG_FSL_ISBC_KEY_EXT
67 #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
68 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
69 * Similiarly for LS2080
71 #define CONFIG_ESBC_ADDR_64BIT
75 #define CONFIG_EXTRA_ENV \
76 "setenv fdt_high 0xa0000000;" \
77 "setenv initrd_high 0xcfffffff;" \
78 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
80 #define CONFIG_EXTRA_ENV \
81 "setenv fdt_high 0xffffffff;" \
82 "setenv initrd_high 0xffffffff;" \
83 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
86 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
87 * Non-XIP Memory (Nand/SD)*/
88 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
89 defined(CONFIG_SD_BOOT)
90 #define CONFIG_BOOTSCRIPT_COPY_RAM
92 /* The address needs to be modified according to NOR, NAND, SD and
96 #define CONFIG_BS_HDR_ADDR_DEVICE 0x583920000
97 #define CONFIG_BS_ADDR_DEVICE 0x583900000
98 #define CONFIG_BS_HDR_ADDR_RAM 0xa3920000
99 #define CONFIG_BS_ADDR_RAM 0xa3900000
100 #define CONFIG_BS_HDR_SIZE 0x00002000
101 #define CONFIG_BS_SIZE 0x00001000
103 #ifdef CONFIG_SD_BOOT
104 /* For SD boot address and size are assigned in terms of sector
105 * offset and no. of sectors respectively.
107 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000800
108 #define CONFIG_BS_ADDR_DEVICE 0x00000840
109 #define CONFIG_BS_HDR_SIZE 0x00000010
110 #define CONFIG_BS_SIZE 0x00000008
112 #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
113 #define CONFIG_BS_ADDR_DEVICE 0x60060000
114 #define CONFIG_BS_HDR_SIZE 0x00002000
115 #define CONFIG_BS_SIZE 0x00001000
116 #endif /* #ifdef CONFIG_SD_BOOT */
117 #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
118 #define CONFIG_BS_ADDR_RAM 0x81020000
121 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
122 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
123 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
125 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
126 /* BOOTSCRIPT_ADDR is not required */
129 #include <config_fsl_chain_trust.h>
130 #endif /* #ifndef CONFIG_SPL_BUILD */
131 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */