2 * Copyright 2015 Freescale Semiconductor, Inc.
4 * SPDX-License-Identifier: GPL-2.0+
7 #ifndef __FSL_SECURE_BOOT_H
8 #define __FSL_SECURE_BOOT_H
10 #ifdef CONFIG_SECURE_BOOT
12 #ifndef CONFIG_FIT_SIGNATURE
13 #define CONFIG_CHAIN_OF_TRUST
18 #ifdef CONFIG_CHAIN_OF_TRUST
19 #define CONFIG_CMD_ESBC_VALIDATE
20 #define CONFIG_FSL_SEC_MON
21 #define CONFIG_SHA_HW_ACCEL
22 #define CONFIG_SHA_PROG_HW_ACCEL
23 #define CONFIG_RSA_FREESCALE_EXP
25 #ifndef CONFIG_FSL_CAAM
26 #define CONFIG_FSL_CAAM
29 #define CONFIG_SPL_BOARD_INIT
30 #define CONFIG_SPL_CRYPTO_SUPPORT
31 #define CONFIG_SPL_HASH_SUPPORT
32 #define CONFIG_SPL_DRIVERS_MISC_SUPPORT
33 #ifdef CONFIG_SPL_BUILD
35 * Define the key hash for U-Boot here if public/private key pair used to
36 * sign U-boot are different from the SRK hash put in the fuse
37 * Example of defining KEY_HASH is
38 * #define CONFIG_SPL_UBOOT_KEY_HASH \
39 * "41066b564c6ffcef40ccbc1e0a5d0d519604000c785d97bbefd25e4d288d1c8b"
40 * else leave it defined as NULL
43 #define CONFIG_SPL_UBOOT_KEY_HASH NULL
44 #endif /* ifdef CONFIG_SPL_BUILD */
46 #ifndef CONFIG_SPL_BUILD
47 #define CONFIG_CMD_BLOB
48 #define CONFIG_CMD_HASH
49 #define CONFIG_KEY_REVOCATION
50 #ifndef CONFIG_SYS_RAMBOOT
51 /* The key used for verification of next level images
52 * is picked up from an Extension Table which has
53 * been verified by the ISBC (Internal Secure boot Code)
54 * in boot ROM of the SoC.
55 * The feature is only applicable in case of NOR boot and is
56 * not applicable in case of RAMBOOT (NAND, SD, SPI).
58 #ifndef CONFIG_ESBC_HDR_LS
59 /* Current Key EXT feature not available in LS ESBC Header */
60 #define CONFIG_FSL_ISBC_KEY_EXT
65 #if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A)
66 /* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit
67 * Similiarly for LS2080
69 #define CONFIG_ESBC_ADDR_64BIT
73 #define CONFIG_EXTRA_ENV \
74 "setenv fdt_high 0xa0000000;" \
75 "setenv initrd_high 0xcfffffff;" \
76 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
78 #define CONFIG_EXTRA_ENV \
79 "setenv fdt_high 0xffffffff;" \
80 "setenv initrd_high 0xffffffff;" \
81 "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';"
84 /* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from
85 * Non-XIP Memory (Nand/SD)*/
86 #if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) || \
87 defined(CONFIG_SD_BOOT)
88 #define CONFIG_BOOTSCRIPT_COPY_RAM
90 /* The address needs to be modified according to NOR, NAND, SD and
94 #define CONFIG_BS_HDR_ADDR_DEVICE 0x583920000
95 #define CONFIG_BS_ADDR_DEVICE 0x583900000
96 #define CONFIG_BS_HDR_ADDR_RAM 0xa3920000
97 #define CONFIG_BS_ADDR_RAM 0xa3900000
98 #define CONFIG_BS_HDR_SIZE 0x00002000
99 #define CONFIG_BS_SIZE 0x00001000
101 #ifdef CONFIG_SD_BOOT
102 /* For SD boot address and size are assigned in terms of sector
103 * offset and no. of sectors respectively.
105 #define CONFIG_BS_HDR_ADDR_DEVICE 0x00000800
106 #define CONFIG_BS_ADDR_DEVICE 0x00000840
107 #define CONFIG_BS_HDR_SIZE 0x00000010
108 #define CONFIG_BS_SIZE 0x00000008
110 #define CONFIG_BS_HDR_ADDR_DEVICE 0x600a0000
111 #define CONFIG_BS_ADDR_DEVICE 0x60060000
112 #define CONFIG_BS_HDR_SIZE 0x00002000
113 #define CONFIG_BS_SIZE 0x00001000
114 #endif /* #ifdef CONFIG_SD_BOOT */
115 #define CONFIG_BS_HDR_ADDR_RAM 0x81000000
116 #define CONFIG_BS_ADDR_RAM 0x81020000
119 #ifdef CONFIG_BOOTSCRIPT_COPY_RAM
120 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM
121 #define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM
123 #define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_DEVICE
124 /* BOOTSCRIPT_ADDR is not required */
127 #include <config_fsl_chain_trust.h>
128 #endif /* #ifndef CONFIG_SPL_BUILD */
129 #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */