2 * linux/include/asm-arm/io.h
4 * Copyright (C) 1996-2000 Russell King
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 * 16-Sep-1996 RMK Inlined the inx/outx functions & optimised for both
12 * constant addresses and variable addresses.
13 * 04-Dec-1997 RMK Moved a lot of this stuff to the new architecture
14 * specific IO header files.
15 * 27-Mar-1999 PJB Second parameter of memcpy_toio is const..
16 * 04-Apr-1999 PJB Added check_signature.
17 * 12-Dec-1999 RMK More cleanups
18 * 18-Jun-2000 RMK Removed virt_to_* and friends definitions
20 #ifndef __ASM_ARM_IO_H
21 #define __ASM_ARM_IO_H
25 #include <linux/types.h>
26 #include <asm/byteorder.h>
27 #include <asm/memory.h>
29 #include <asm/arch/hardware.h>
30 #endif /* XXX###XXX */
32 static inline void sync(void)
37 * Given a physical address and a length, return a virtual address
38 * that can be used to access the memory range with the caching
39 * properties specified by "flags".
41 #define MAP_NOCACHE (0)
42 #define MAP_WRCOMBINE (0)
43 #define MAP_WRBACK (0)
44 #define MAP_WRTHROUGH (0)
47 map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags)
53 * Take down a mapping set up by map_physmem().
55 static inline void unmap_physmem(void *vaddr, unsigned long flags)
60 static inline phys_addr_t virt_to_phys(void * vaddr)
62 return (phys_addr_t)(vaddr);
66 * Generic virtual read/write. Note that we don't support half-word
67 * read/writes. We define __arch_*[bl] here, and leave __arch_*w
68 * to the architecture specific code.
70 #define __arch_getb(a) (*(volatile unsigned char *)(a))
71 #define __arch_getw(a) (*(volatile unsigned short *)(a))
72 #define __arch_getl(a) (*(volatile unsigned int *)(a))
73 #define __arch_getq(a) (*(volatile unsigned long long *)(a))
75 #define __arch_putb(v,a) (*(volatile unsigned char *)(a) = (v))
76 #define __arch_putw(v,a) (*(volatile unsigned short *)(a) = (v))
77 #define __arch_putl(v,a) (*(volatile unsigned int *)(a) = (v))
78 #define __arch_putq(v,a) (*(volatile unsigned long long *)(a) = (v))
80 extern inline void __raw_writesb(unsigned long addr, const void *data,
83 uint8_t *buf = (uint8_t *)data;
85 __arch_putb(*buf++, addr);
88 extern inline void __raw_writesw(unsigned long addr, const void *data,
91 uint16_t *buf = (uint16_t *)data;
93 __arch_putw(*buf++, addr);
96 extern inline void __raw_writesl(unsigned long addr, const void *data,
99 uint32_t *buf = (uint32_t *)data;
101 __arch_putl(*buf++, addr);
104 extern inline void __raw_readsb(unsigned long addr, void *data, int bytelen)
106 uint8_t *buf = (uint8_t *)data;
108 *buf++ = __arch_getb(addr);
111 extern inline void __raw_readsw(unsigned long addr, void *data, int wordlen)
113 uint16_t *buf = (uint16_t *)data;
115 *buf++ = __arch_getw(addr);
118 extern inline void __raw_readsl(unsigned long addr, void *data, int longlen)
120 uint32_t *buf = (uint32_t *)data;
122 *buf++ = __arch_getl(addr);
125 #define __raw_writeb(v,a) __arch_putb(v,a)
126 #define __raw_writew(v,a) __arch_putw(v,a)
127 #define __raw_writel(v,a) __arch_putl(v,a)
128 #define __raw_writeq(v,a) __arch_putq(v,a)
130 #define __raw_readb(a) __arch_getb(a)
131 #define __raw_readw(a) __arch_getw(a)
132 #define __raw_readl(a) __arch_getl(a)
133 #define __raw_readq(a) __arch_getq(a)
136 * TODO: The kernel offers some more advanced versions of barriers, it might
137 * have some advantages to use them instead of the simple one here.
139 #define dmb() __asm__ __volatile__ ("" : : : "memory")
140 #define __iormb() dmb()
141 #define __iowmb() dmb()
143 #define writeb(v,c) ({ u8 __v = v; __iowmb(); __arch_putb(__v,c); __v; })
144 #define writew(v,c) ({ u16 __v = v; __iowmb(); __arch_putw(__v,c); __v; })
145 #define writel(v,c) ({ u32 __v = v; __iowmb(); __arch_putl(__v,c); __v; })
146 #define writeq(v,c) ({ u64 __v = v; __iowmb(); __arch_putq(__v,c); __v; })
148 #define readb(c) ({ u8 __v = __arch_getb(c); __iormb(); __v; })
149 #define readw(c) ({ u16 __v = __arch_getw(c); __iormb(); __v; })
150 #define readl(c) ({ u32 __v = __arch_getl(c); __iormb(); __v; })
151 #define readq(c) ({ u64 __v = __arch_getq(c); __iormb(); __v; })
154 * The compiler seems to be incapable of optimising constants
155 * properly. Spell it out to the compiler in some cases.
156 * These are only valid for small values of "off" (< 1<<12)
158 #define __raw_base_writeb(val,base,off) __arch_base_putb(val,base,off)
159 #define __raw_base_writew(val,base,off) __arch_base_putw(val,base,off)
160 #define __raw_base_writel(val,base,off) __arch_base_putl(val,base,off)
162 #define __raw_base_readb(base,off) __arch_base_getb(base,off)
163 #define __raw_base_readw(base,off) __arch_base_getw(base,off)
164 #define __raw_base_readl(base,off) __arch_base_getl(base,off)
167 * Clear and set bits in one shot. These macros can be used to clear and
168 * set multiple bits in a register using a single call. These macros can
169 * also be used to set a multiple-bit bit pattern using a mask, by
170 * specifying the mask in the 'clear' parameter and the new bit pattern
171 * in the 'set' parameter.
174 #define out_arch(type,endian,a,v) __raw_write##type(cpu_to_##endian(v),a)
175 #define in_arch(type,endian,a) endian##_to_cpu(__raw_read##type(a))
177 #define out_le64(a,v) out_arch(q,le64,a,v)
178 #define out_le32(a,v) out_arch(l,le32,a,v)
179 #define out_le16(a,v) out_arch(w,le16,a,v)
181 #define in_le64(a) in_arch(q,le64,a)
182 #define in_le32(a) in_arch(l,le32,a)
183 #define in_le16(a) in_arch(w,le16,a)
185 #define out_be32(a,v) out_arch(l,be32,a,v)
186 #define out_be16(a,v) out_arch(w,be16,a,v)
188 #define in_be32(a) in_arch(l,be32,a)
189 #define in_be16(a) in_arch(w,be16,a)
191 #define out_8(a,v) __raw_writeb(v,a)
192 #define in_8(a) __raw_readb(a)
194 #define clrbits(type, addr, clear) \
195 out_##type((addr), in_##type(addr) & ~(clear))
197 #define setbits(type, addr, set) \
198 out_##type((addr), in_##type(addr) | (set))
200 #define clrsetbits(type, addr, clear, set) \
201 out_##type((addr), (in_##type(addr) & ~(clear)) | (set))
203 #define clrbits_be32(addr, clear) clrbits(be32, addr, clear)
204 #define setbits_be32(addr, set) setbits(be32, addr, set)
205 #define clrsetbits_be32(addr, clear, set) clrsetbits(be32, addr, clear, set)
207 #define clrbits_le32(addr, clear) clrbits(le32, addr, clear)
208 #define setbits_le32(addr, set) setbits(le32, addr, set)
209 #define clrsetbits_le32(addr, clear, set) clrsetbits(le32, addr, clear, set)
211 #define clrbits_be16(addr, clear) clrbits(be16, addr, clear)
212 #define setbits_be16(addr, set) setbits(be16, addr, set)
213 #define clrsetbits_be16(addr, clear, set) clrsetbits(be16, addr, clear, set)
215 #define clrbits_le16(addr, clear) clrbits(le16, addr, clear)
216 #define setbits_le16(addr, set) setbits(le16, addr, set)
217 #define clrsetbits_le16(addr, clear, set) clrsetbits(le16, addr, clear, set)
219 #define clrbits_8(addr, clear) clrbits(8, addr, clear)
220 #define setbits_8(addr, set) setbits(8, addr, set)
221 #define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
224 * Now, pick up the machine-defined IO definitions
226 #if 0 /* XXX###XXX */
227 #include <asm/arch/io.h>
228 #endif /* XXX###XXX */
231 * IO port access primitives
232 * -------------------------
234 * The ARM doesn't have special IO access instructions; all IO is memory
235 * mapped. Note that these are defined to perform little endian accesses
236 * only. Their primary purpose is to access PCI and ISA peripherals.
238 * Note that for a big endian machine, this implies that the following
239 * big endian mode connectivity is in place, as described by numerous
242 * PCI: D0-D7 D8-D15 D16-D23 D24-D31
243 * ARM: D24-D31 D16-D23 D8-D15 D0-D7
245 * The machine specific io.h include defines __io to translate an "IO"
246 * address to a memory address.
248 * Note that we prevent GCC re-ordering or caching values in expressions
249 * by introducing sequence points into the in*() definitions. Note that
250 * __raw_* do not guarantee this behaviour.
252 * The {in,out}[bwl] macros are for emulating x86-style PCI/ISA IO space.
255 #define outb(v,p) __raw_writeb(v,__io(p))
256 #define outw(v,p) __raw_writew(cpu_to_le16(v),__io(p))
257 #define outl(v,p) __raw_writel(cpu_to_le32(v),__io(p))
259 #define inb(p) ({ unsigned int __v = __raw_readb(__io(p)); __v; })
260 #define inw(p) ({ unsigned int __v = le16_to_cpu(__raw_readw(__io(p))); __v; })
261 #define inl(p) ({ unsigned int __v = le32_to_cpu(__raw_readl(__io(p))); __v; })
263 #define outsb(p,d,l) __raw_writesb(__io(p),d,l)
264 #define outsw(p,d,l) __raw_writesw(__io(p),d,l)
265 #define outsl(p,d,l) __raw_writesl(__io(p),d,l)
267 #define insb(p,d,l) __raw_readsb(__io(p),d,l)
268 #define insw(p,d,l) __raw_readsw(__io(p),d,l)
269 #define insl(p,d,l) __raw_readsl(__io(p),d,l)
272 #define outb_p(val,port) outb((val),(port))
273 #define outw_p(val,port) outw((val),(port))
274 #define outl_p(val,port) outl((val),(port))
275 #define inb_p(port) inb((port))
276 #define inw_p(port) inw((port))
277 #define inl_p(port) inl((port))
279 #define outsb_p(port,from,len) outsb(port,from,len)
280 #define outsw_p(port,from,len) outsw(port,from,len)
281 #define outsl_p(port,from,len) outsl(port,from,len)
282 #define insb_p(port,to,len) insb(port,to,len)
283 #define insw_p(port,to,len) insw(port,to,len)
284 #define insl_p(port,to,len) insl(port,to,len)
287 * ioremap and friends.
289 * ioremap takes a PCI memory address, as specified in
290 * linux/Documentation/IO-mapping.txt. If you want a
291 * physical address, use __ioremap instead.
293 extern void * __ioremap(unsigned long offset, size_t size, unsigned long flags);
294 extern void __iounmap(void *addr);
297 * Generic ioremap support.
300 * iomem_valid_addr(off,size)
303 #ifdef iomem_valid_addr
304 #define __arch_ioremap(off,sz,nocache) \
306 unsigned long _off = (off), _size = (sz); \
307 void *_ret = (void *)0; \
308 if (iomem_valid_addr(_off, _size)) \
309 _ret = __ioremap(iomem_to_phys(_off),_size,nocache); \
313 #define __arch_iounmap __iounmap
316 #define ioremap(off,sz) __arch_ioremap((off),(sz),0)
317 #define ioremap_nocache(off,sz) __arch_ioremap((off),(sz),1)
318 #define iounmap(_addr) __arch_iounmap(_addr)
321 * DMA-consistent mapping functions. These allocate/free a region of
322 * uncached, unwrite-buffered mapped memory space for use with DMA
323 * devices. This is the "generic" version. The PCI specific version
326 extern void *consistent_alloc(int gfp, size_t size, dma_addr_t *handle);
327 extern void consistent_free(void *vaddr, size_t size, dma_addr_t handle);
328 extern void consistent_sync(void *vaddr, size_t size, int rw);
331 * String version of IO memory access ops:
333 extern void _memcpy_fromio(void *, unsigned long, size_t);
334 extern void _memcpy_toio(unsigned long, const void *, size_t);
335 extern void _memset_io(unsigned long, int, size_t);
337 extern void __readwrite_bug(const char *fn);
340 * If this architecture has PCI memory IO, then define the read/write
341 * macros. These should only be used with the cookie passed from
346 #define readb(c) ({ unsigned int __v = __raw_readb(__mem_pci(c)); __v; })
347 #define readw(c) ({ unsigned int __v = le16_to_cpu(__raw_readw(__mem_pci(c))); __v; })
348 #define readl(c) ({ unsigned int __v = le32_to_cpu(__raw_readl(__mem_pci(c))); __v; })
350 #define writeb(v,c) __raw_writeb(v,__mem_pci(c))
351 #define writew(v,c) __raw_writew(cpu_to_le16(v),__mem_pci(c))
352 #define writel(v,c) __raw_writel(cpu_to_le32(v),__mem_pci(c))
354 #define memset_io(c,v,l) _memset_io(__mem_pci(c),(v),(l))
355 #define memcpy_fromio(a,c,l) _memcpy_fromio((a),__mem_pci(c),(l))
356 #define memcpy_toio(c,a,l) _memcpy_toio(__mem_pci(c),(a),(l))
358 #define eth_io_copy_and_sum(s,c,l,b) \
359 eth_copy_and_sum((s),__mem_pci(c),(l),(b))
362 check_signature(unsigned long io_addr, const unsigned char *signature,
367 if (readb(io_addr) != *signature)
378 #elif !defined(readb)
380 #define readb(addr) (__readwrite_bug("readb"),0)
381 #define readw(addr) (__readwrite_bug("readw"),0)
382 #define readl(addr) (__readwrite_bug("readl"),0)
383 #define writeb(v,addr) __readwrite_bug("writeb")
384 #define writew(v,addr) __readwrite_bug("writew")
385 #define writel(v,addr) __readwrite_bug("writel")
387 #define eth_io_copy_and_sum(a,b,c,d) __readwrite_bug("eth_io_copy_and_sum")
389 #define check_signature(io,sig,len) (0)
391 #endif /* __mem_pci */
394 * If this architecture has ISA IO, then define the isa_read/isa_write
399 #define isa_readb(addr) __raw_readb(__mem_isa(addr))
400 #define isa_readw(addr) __raw_readw(__mem_isa(addr))
401 #define isa_readl(addr) __raw_readl(__mem_isa(addr))
402 #define isa_writeb(val,addr) __raw_writeb(val,__mem_isa(addr))
403 #define isa_writew(val,addr) __raw_writew(val,__mem_isa(addr))
404 #define isa_writel(val,addr) __raw_writel(val,__mem_isa(addr))
405 #define isa_memset_io(a,b,c) _memset_io(__mem_isa(a),(b),(c))
406 #define isa_memcpy_fromio(a,b,c) _memcpy_fromio((a),__mem_isa(b),(c))
407 #define isa_memcpy_toio(a,b,c) _memcpy_toio(__mem_isa((a)),(b),(c))
409 #define isa_eth_io_copy_and_sum(a,b,c,d) \
410 eth_copy_and_sum((a),__mem_isa(b),(c),(d))
413 isa_check_signature(unsigned long io_addr, const unsigned char *signature,
418 if (isa_readb(io_addr) != *signature)
429 #else /* __mem_isa */
431 #define isa_readb(addr) (__readwrite_bug("isa_readb"),0)
432 #define isa_readw(addr) (__readwrite_bug("isa_readw"),0)
433 #define isa_readl(addr) (__readwrite_bug("isa_readl"),0)
434 #define isa_writeb(val,addr) __readwrite_bug("isa_writeb")
435 #define isa_writew(val,addr) __readwrite_bug("isa_writew")
436 #define isa_writel(val,addr) __readwrite_bug("isa_writel")
437 #define isa_memset_io(a,b,c) __readwrite_bug("isa_memset_io")
438 #define isa_memcpy_fromio(a,b,c) __readwrite_bug("isa_memcpy_fromio")
439 #define isa_memcpy_toio(a,b,c) __readwrite_bug("isa_memcpy_toio")
441 #define isa_eth_io_copy_and_sum(a,b,c,d) \
442 __readwrite_bug("isa_eth_io_copy_and_sum")
444 #define isa_check_signature(io,sig,len) (0)
446 #endif /* __mem_isa */
447 #endif /* __KERNEL__ */
451 #endif /* __ASM_ARM_IO_H */