2 * (C) Copyright 2004-2008 Texas Instruments, <www.ti.com>
3 * Rohit Choraria <rohitkc@ti.com>
5 * (C) Copyright 2013 Andreas Bießmann <andreas.devel@googlemail.com>
7 * SPDX-License-Identifier: GPL-2.0+
9 #ifndef __ASM_OMAP_GPMC_H
10 #define __ASM_OMAP_GPMC_H
12 #include <asm/arch/omap_gpmc.h>
14 #define GPMC_BUF_EMPTY 0
15 #define GPMC_BUF_FULL 1
17 #define ECCCLEAR (0x1 << 8)
18 #define ECCRESULTREG1 (0x1 << 0)
19 #define ECCSIZE512BYTE 0xFF
20 #define ECCSIZE1 (ECCSIZE512BYTE << 22)
21 #define ECCSIZE0 (ECCSIZE512BYTE << 12)
22 #define ECCSIZE0SEL (0x000 << 0)
24 /* Generic ECC Layouts */
25 /* Large Page x8 NAND device Layout */
26 #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
27 #define GPMC_NAND_HW_ECC_LAYOUT {\
29 .eccpos = {1, 2, 3, 4, 5, 6, 7, 8,\
37 /* Large Page x16 NAND device Layout */
38 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
39 #define GPMC_NAND_HW_ECC_LAYOUT {\
41 .eccpos = {2, 3, 4, 5, 6, 7, 8, 9,\
49 /* Small Page x8 NAND device Layout */
50 #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
51 #define GPMC_NAND_HW_ECC_LAYOUT {\
60 /* Small Page x16 NAND device Layout */
61 #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
62 #define GPMC_NAND_HW_ECC_LAYOUT {\
72 /* 1-bit ECC calculation by Software, Error detection by Software */
73 OMAP_ECC_HAM1_CODE_SW = 1, /* avoid un-initialized int can be 0x0 */
74 /* 1-bit ECC calculation by GPMC, Error detection by Software */
75 /* ECC layout compatible to legacy ROMCODE. */
76 OMAP_ECC_HAM1_CODE_HW,
77 /* 4-bit ECC calculation by GPMC, Error detection by Software */
78 OMAP_ECC_BCH4_CODE_HW_DETECTION_SW,
79 /* 4-bit ECC calculation by GPMC, Error detection by ELM */
80 OMAP_ECC_BCH4_CODE_HW,
81 /* 8-bit ECC calculation by GPMC, Error detection by Software */
82 OMAP_ECC_BCH8_CODE_HW_DETECTION_SW,
83 /* 8-bit ECC calculation by GPMC, Error detection by ELM */
84 OMAP_ECC_BCH8_CODE_HW,
87 #endif /* __ASM_OMAP_GPMC_H */