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   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Enhanced Direct Memory Access (EDMA3) Controller
   4  *
   5  * (C) Copyright 2014
   6  *     Texas Instruments Incorporated, <www.ti.com>
   7  */
   8
   9 #ifndef _EDMA3_H_
  10 #define _EDMA3_H_
  11
  12 #include <linux/stddef.h>
  13
  14 #define EDMA3_PARSET_NULL_LINK                  0xffff
  15
  16 /*
  17  * All parameter RAM set options
  18  * opt field in edma3_param_set_config structure
  19  */
  20 #define EDMA3_SLOPT_PRIV_LEVEL                  BIT(31)
  21 #define EDMA3_SLOPT_PRIV_ID(id)                 ((0xf & (id)) << 24)
  22 #define EDMA3_SLOPT_INTERM_COMP_CHAIN_ENB       BIT(23)
  23 #define EDMA3_SLOPT_TRANS_COMP_CHAIN_ENB        BIT(22)
  24 #define EDMA3_SLOPT_INTERM_COMP_INT_ENB         BIT(21)
  25 #define EDMA3_SLOPT_TRANS_COMP_INT_ENB          BIT(20)
  26 #define EDMA3_SLOPT_COMP_CODE(code)             ((0x3f & (code)) << 12)
  27 #define EDMA3_SLOPT_FIFO_WIDTH_8                0
  28 #define EDMA3_SLOPT_FIFO_WIDTH_16               (1 << 8)
  29 #define EDMA3_SLOPT_FIFO_WIDTH_32               (2 << 8)
  30 #define EDMA3_SLOPT_FIFO_WIDTH_64               (3 << 8)
  31 #define EDMA3_SLOPT_FIFO_WIDTH_128              (4 << 8)
  32 #define EDMA3_SLOPT_FIFO_WIDTH_256              (5 << 8)
  33 #define EDMA3_SLOPT_FIFO_WIDTH_SET(w)           ((w & 0x7) << 8)
  34 #define EDMA3_SLOPT_STATIC                      BIT(3)
  35 #define EDMA3_SLOPT_AB_SYNC                     BIT(2)
  36 #define EDMA3_SLOPT_DST_ADDR_CONST_MODE         BIT(1)
  37 #define EDMA3_SLOPT_SRC_ADDR_CONST_MODE         BIT(0)
  38
  39 enum edma3_address_mode {
  40         INCR = 0,
  41         FIFO = 1
  42 };
  43
  44 enum edma3_fifo_width {
  45         W8BIT = 0,
  46         W16BIT = 1,
  47         W32BIT = 2,
  48         W64BIT = 3,
  49         W128BIT = 4,
  50         W256BIT = 5
  51 };
  52
  53 enum edma3_sync_dimension {
  54         ASYNC = 0,
  55         ABSYNC = 1
  56 };
  57
  58 /* PaRAM slots are laid out like this */
  59 struct edma3_slot_layout {
  60         u32 opt;
  61         u32 src;
  62         u32 a_b_cnt;
  63         u32 dst;
  64         u32 src_dst_bidx;
  65         u32 link_bcntrld;
  66         u32 src_dst_cidx;
  67         u32 ccnt;
  68 } __packed;
  69
  70 /*
  71  * Use this to assign trigger word number of edma3_slot_layout struct.
  72  * trigger_word_name - is the exact name from edma3_slot_layout.
  73  */
  74 #define EDMA3_TWORD(trigger_word_name)\
  75                 (offsetof(struct edma3_slot_layout, trigger_word_name) / 4)
  76
  77 struct edma3_slot_config {
  78         u32 opt;
  79         u32 src;
  80         u32 dst;
  81         int bcnt;
  82         int acnt;
  83         int ccnt;
  84         int src_bidx;
  85         int dst_bidx;
  86         int src_cidx;
  87         int dst_cidx;
  88         int bcntrld;
  89         int link;
  90 };
  91
  92 struct edma3_channel_config {
  93         int slot;
  94         int chnum;
  95         int complete_code;      /* indicate pending complete interrupt */
  96         int trigger_slot_word;  /* only used for qedma */
  97 };
  98
  99 void qedma3_start(u32 base, struct edma3_channel_config *cfg);
 100 void qedma3_stop(u32 base, struct edma3_channel_config *cfg);
 101 void edma3_slot_configure(u32 base, int slot, struct edma3_slot_config *cfg);
 102 int edma3_check_for_transfer(u32 base, struct edma3_channel_config *cfg);
 103 void edma3_write_slot(u32 base, int slot, struct edma3_slot_layout *param);
 104 void edma3_read_slot(u32 base, int slot, struct edma3_slot_layout *param);
 105
 106 void edma3_set_dest(u32 base, int slot, u32 dst, enum edma3_address_mode mode,
 107                     enum edma3_fifo_width width);
 108 void edma3_set_dest_index(u32 base, unsigned slot, int bidx, int cidx);
 109 void edma3_set_dest_addr(u32 base, int slot, u32 dst);
 110
 111 void edma3_set_src(u32 base, int slot, u32 src, enum edma3_address_mode mode,
 112                    enum edma3_fifo_width width);
 113 void edma3_set_src_index(u32 base, unsigned slot, int bidx, int cidx);
 114 void edma3_set_src_addr(u32 base, int slot, u32 src);
 115
 116 void edma3_set_transfer_params(u32 base, int slot, int acnt,
 117                                int bcnt, int ccnt, u16 bcnt_rld,
 118                                enum edma3_sync_dimension sync_mode);
 119 void edma3_transfer(unsigned long edma3_base_addr, unsigned int
 120                 edma_slot_num, void *dst, void *src, size_t len);
 121 void edma3_fill(unsigned long edma3_base_addr, unsigned int edma_slot_num,
 122                 void *dst, u8 val, size_t len);
 123
 124 #endif