1 #include <linux/linkage.h>
4 @ libgcc1 routines for ARM cpu.
5 @ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
16 .type __udivsi3 ,function
18 .type __aeabi_uidiv ,function
29 @ Unless the divisor is very big, shift it up in multiples of
30 @ four bits, since this is the amount of unwinding in the main
31 @ division loop. Continue shifting until the divisor is
32 @ larger than the dividend.
33 cmp divisor, #0x10000000
34 cmpcc divisor, dividend
35 movcc divisor, divisor, lsl #4
36 movcc curbit, curbit, lsl #4
39 @ For very big divisors, we must shift it a bit at a time, or
40 @ we will be in danger of overflowing.
41 cmp divisor, #0x80000000
42 cmpcc divisor, dividend
43 movcc divisor, divisor, lsl #1
44 movcc curbit, curbit, lsl #1
47 @ Test for possible subtractions, and note which bits
48 @ are done in the result. On the final pass, this may subtract
49 @ too much from the dividend, but the result will be ok, since the
50 @ "bit" will have been shifted out at the bottom.
52 subcs dividend, dividend, divisor
53 orrcs result, result, curbit
54 cmp dividend, divisor, lsr #1
55 subcs dividend, dividend, divisor, lsr #1
56 orrcs result, result, curbit, lsr #1
57 cmp dividend, divisor, lsr #2
58 subcs dividend, dividend, divisor, lsr #2
59 orrcs result, result, curbit, lsr #2
60 cmp dividend, divisor, lsr #3
61 subcs dividend, dividend, divisor, lsr #3
62 orrcs result, result, curbit, lsr #3
63 cmp dividend, #0 @ Early termination?
64 movnes curbit, curbit, lsr #4 @ No, any more bits to do?
65 movne divisor, divisor, lsr #4
73 mov r0, #0 @ about as wrong as it could be
75 .size __udivsi3 , . - __udivsi3
77 ENTRY(__aeabi_uidivmod)
79 stmfd sp!, {r0, r1, ip, lr}
81 ldmfd sp!, {r1, r2, ip, lr}
85 ENDPROC(__aeabi_uidivmod)
87 ENTRY(__aeabi_idivmod)
89 stmfd sp!, {r0, r1, ip, lr}
91 ldmfd sp!, {r1, r2, ip, lr}
95 ENDPROC(__aeabi_idivmod)