2 * vectors - Generic ARM exception table code
4 * Copyright (c) 1998 Dan Malek <dmalek@jlc.net>
5 * Copyright (c) 1999 Magnus Damm <kieraypc01.p.y.kie.era.ericsson.se>
6 * Copyright (c) 2000 Wolfgang Denk <wd@denx.de>
7 * Copyright (c) 2001 Alex Züpke <azu@sysgo.de>
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <garyj@denx.de>
11 * Copyright (c) 2002 Kyle Harris <kharris@nexus-tech.net>
13 * SPDX-License-Identifier: GPL-2.0+
19 *************************************************************************
21 * Symbol _start is referenced elsewhere, so make it global
23 *************************************************************************
29 *************************************************************************
31 * Vectors have their own section so linker script can map them easily
33 *************************************************************************
36 .section ".vectors", "ax"
39 *************************************************************************
41 * Exception vectors as described in ARM reference manuals
43 * Uses indirect branch to allow reaching handlers anywhere in memory.
45 *************************************************************************
50 #ifdef CONFIG_SYS_DV_NOR_BOOT_CFG
51 .word CONFIG_SYS_DV_NOR_BOOT_CFG
55 ldr pc, _undefined_instruction
56 ldr pc, _software_interrupt
57 ldr pc, _prefetch_abort
63 #ifdef CONFIG_ENABLE_ARM_SOC_BOOT0_HOOK
65 * Various SoCs need something special and SoC-specific up front in
66 * order to boot, allow them to set that in their boot0.h file and then
69 #include <asm/arch/boot0.h>
73 *************************************************************************
75 * Indirect vectors table
77 * Symbols referenced here must be defined somewhere else
79 *************************************************************************
82 .globl _undefined_instruction
83 .globl _software_interrupt
84 .globl _prefetch_abort
90 _undefined_instruction: .word undefined_instruction
91 _software_interrupt: .word software_interrupt
92 _prefetch_abort: .word prefetch_abort
93 _data_abort: .word data_abort
94 _not_used: .word not_used
98 .balignl 16,0xdeadbeef
101 *************************************************************************
105 *************************************************************************
108 /* SPL interrupt handling: just hang */
110 #ifdef CONFIG_SPL_BUILD
113 undefined_instruction:
121 bl 1b /* hang and never return */
123 #else /* !CONFIG_SPL_BUILD */
125 /* IRQ stack memory (calculated at run-time) + 8 bytes */
126 .globl IRQ_STACK_START_IN
128 #ifdef IRAM_BASE_ADDR
129 .word IRAM_BASE_ADDR + 0x20
137 #define S_FRAME_SIZE 72
159 #define MODE_SVC 0x13
163 * use bad_save_user_regs for abort/prefetch/undef/swi ...
164 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
167 .macro bad_save_user_regs
168 @ carve out a frame on current user stack
169 sub sp, sp, #S_FRAME_SIZE
170 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
171 ldr r2, IRQ_STACK_START_IN
172 @ get values for "aborted" pc and cpsr (into parm regs)
174 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
177 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
178 mov r0, sp @ save current stack into r0 (param register)
181 .macro irq_save_user_regs
182 sub sp, sp, #S_FRAME_SIZE
183 stmia sp, {r0 - r12} @ Calling r0-r12
184 @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
186 stmdb r8, {sp, lr}^ @ Calling SP, LR
187 str lr, [r8, #0] @ Save calling PC
189 str r6, [r8, #4] @ Save CPSR
190 str r0, [r8, #8] @ Save OLD_R0
194 .macro irq_restore_user_regs
195 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
197 ldr lr, [sp, #S_PC] @ Get PC
198 add sp, sp, #S_FRAME_SIZE
199 subs pc, lr, #4 @ return & move spsr_svc into cpsr
203 ldr r13, IRQ_STACK_START_IN @ setup our mode stack
205 str lr, [r13] @ save caller lr in position 0 of saved stack
206 mrs lr, spsr @ get the spsr
207 str lr, [r13, #4] @ save spsr in position 1 of saved stack
208 mov r13, #MODE_SVC @ prepare SVC-Mode
210 msr spsr, r13 @ switch modes, make sure moves will execute
211 mov lr, pc @ capture return pc
212 movs pc, lr @ jump to next instruction & switch modes.
215 .macro get_irq_stack @ setup IRQ stack
216 ldr sp, IRQ_STACK_START
219 .macro get_fiq_stack @ setup FIQ stack
220 ldr sp, FIQ_STACK_START
228 undefined_instruction:
231 bl do_undefined_instruction
237 bl do_software_interrupt
270 #endif /* CONFIG_SPL_BUILD */