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1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * (C) Copyright 2014 DENX Software Engineering
4  *     Heiko Schocher <hs@denx.de>
5  *
6  * Based on:
7  * Copyright (C) 2013 Atmel Corporation
8  *                    Bo Shen <voice.shen@atmel.com>
9  */
10
11 #include <common.h>
12 #include <asm/io.h>
13 #include <asm/arch/at91_common.h>
14 #include <asm/arch/at91sam9_matrix.h>
15 #include <asm/arch/at91_pit.h>
16 #include <asm/arch/at91_rstc.h>
17 #include <asm/arch/at91_wdt.h>
18 #include <asm/arch/clk.h>
19 #include <spl.h>
20
21 DECLARE_GLOBAL_DATA_PTR;
22
23 static void enable_ext_reset(void)
24 {
25         struct at91_rstc *rstc = (struct at91_rstc *)ATMEL_BASE_RSTC;
26
27         writel(AT91_RSTC_KEY | AT91_RSTC_MR_URSTEN, &rstc->mr);
28 }
29
30 void lowlevel_clock_init(void)
31 {
32         struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC;
33
34         if (!(readl(&pmc->sr) & AT91_PMC_MOSCS)) {
35                 /* Enable Main Oscillator */
36                 writel(AT91_PMC_MOSCS | (0x40 << 8), &pmc->mor);
37
38                 /* Wait until Main Oscillator is stable */
39                 while (!(readl(&pmc->sr) & AT91_PMC_MOSCS))
40                         ;
41         }
42
43         /* After stabilization, switch to Main Oscillator */
44         if ((readl(&pmc->mckr) & AT91_PMC_CSS) == AT91_PMC_CSS_SLOW) {
45                 unsigned long tmp;
46
47                 tmp = readl(&pmc->mckr);
48                 tmp &= ~AT91_PMC_CSS;
49                 tmp |= AT91_PMC_CSS_MAIN;
50                 writel(tmp, &pmc->mckr);
51                 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
52                         ;
53
54                 tmp &= ~AT91_PMC_PRES;
55                 tmp |= AT91_PMC_PRES_1;
56                 writel(tmp, &pmc->mckr);
57                 while (!(readl(&pmc->sr) & AT91_PMC_MCKRDY))
58                         ;
59         }
60
61         return;
62 }
63
64 void __weak matrix_init(void)
65 {
66 }
67
68 void __weak at91_spl_board_init(void)
69 {
70 }
71
72 void __weak spl_board_init(void)
73 {
74 }
75
76 void board_init_f(ulong dummy)
77 {
78         lowlevel_clock_init();
79         at91_disable_wdt();
80
81         /*
82          * At this stage the main oscillator is supposed to be enabled
83          * PCK = MCK = MOSC
84          */
85         at91_pllicpr_init(0x00);
86
87         /* Configure PLLA = MOSC * (PLL_MULA + 1) / PLL_DIVA */
88         at91_plla_init(CONFIG_SYS_AT91_PLLA);
89
90         /* PCK = PLLA = 2 * MCK */
91         at91_mck_init(CONFIG_SYS_MCKR);
92
93         /* Switch MCK on PLLA output */
94         at91_mck_init(CONFIG_SYS_MCKR_CSS);
95
96 #if defined(CONFIG_SYS_AT91_PLLB)
97         /* Configure PLLB */
98         at91_pllb_init(CONFIG_SYS_AT91_PLLB);
99 #endif
100
101         /* Enable External Reset */
102         enable_ext_reset();
103
104         /* Initialize matrix */
105         matrix_init();
106
107         gd->arch.mck_rate_hz = CONFIG_SYS_MASTER_CLOCK;
108         /*
109          * init timer long enough for using in spl.
110          */
111         timer_init();
112
113         /* enable clocks for all PIOs */
114 #if defined(CONFIG_AT91SAM9X5) || defined(CONFIG_AT91SAM9N12)
115         at91_periph_clk_enable(ATMEL_ID_PIOAB);
116         at91_periph_clk_enable(ATMEL_ID_PIOCD);
117 #else
118         at91_periph_clk_enable(ATMEL_ID_PIOA);
119         at91_periph_clk_enable(ATMEL_ID_PIOB);
120         at91_periph_clk_enable(ATMEL_ID_PIOC);
121 #endif
122
123 #if defined(CONFIG_SPL_SERIAL_SUPPORT)
124         /* init console */
125         at91_seriald_hw_init();
126         preloader_console_init();
127 #endif
128
129         mem_init();
130
131         at91_spl_board_init();
132 }