2 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
13 #include <asm/system.h>
14 #include <asm/arch/cpu.h>
15 #include <asm/arch/soc.h>
16 #include <asm/armv8/mmu.h>
18 DECLARE_GLOBAL_DATA_PTR;
21 * Not all memory is mapped in the MMU. So we need to restrict the
22 * memory size so that U-Boot does not try to access it. Also, the
23 * internal registers are located at 0xf000.0000 - 0xffff.ffff.
24 * Currently only 2GiB are mapped for system memory. This is what
25 * we pass to the U-Boot subsystem here.
27 #define USABLE_RAM_SIZE 0x80000000
29 ulong board_get_usable_ram_top(ulong total_size)
31 if (gd->ram_size > USABLE_RAM_SIZE)
32 return USABLE_RAM_SIZE;
38 * On ARMv8, MBus is not configured in U-Boot. To enable compilation
39 * of the already implemented drivers, lets add a dummy version of
40 * this function so that linking does not fail.
42 const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
47 /* DRAM init code ... */
49 int dram_init_banksize(void)
51 fdtdec_setup_memory_banksize();
58 if (fdtdec_setup_memory_size() != 0)
64 int arch_cpu_init(void)
66 /* Nothing to do (yet) */
70 int arch_early_init_r(void)
77 * Loop over all MISC uclass drivers to call the comphy code
78 * and init all CP110 devices enabled in the DT
82 /* Call the comphy code via the MISC uclass driver */
83 ret = uclass_get_device(UCLASS_MISC, i++, &dev);
85 /* We're done, once no further CP110 device is found */
90 /* Cause the SATA device to do its early init */
91 uclass_first_device(UCLASS_AHCI, &dev);
94 /* Trigger PCIe devices detection */