2 * Copyright (C) 2016 Stefan Roese <sr@denx.de>
4 * SPDX-License-Identifier: GPL-2.0+
12 #include <asm/system.h>
13 #include <asm/arch/cpu.h>
14 #include <asm/arch/soc.h>
15 #include <asm/armv8/mmu.h>
17 DECLARE_GLOBAL_DATA_PTR;
20 * On ARMv8, MBus is not configured in U-Boot. To enable compilation
21 * of the already implemented drivers, lets add a dummy version of
22 * this function so that linking does not fail.
24 const struct mbus_dram_target_info *mvebu_mbus_dram_info(void)
29 /* DRAM init code ... */
31 static const void *get_memory_reg_prop(const void *fdt, int *lenp)
35 offset = fdt_path_offset(fdt, "/memory");
39 return fdt_getprop(fdt, offset, "reg", lenp);
44 const void *fdt = gd->fdt_blob;
48 ac = fdt_address_cells(fdt, 0);
49 sc = fdt_size_cells(fdt, 0);
50 if (ac < 0 || sc < 1 || sc > 2) {
51 printf("invalid address/size cells\n");
55 val = get_memory_reg_prop(fdt, &len);
56 if (len / sizeof(*val) < ac + sc)
61 gd->ram_size = fdtdec_get_number(val, sc);
63 debug("DRAM size = %08lx\n", (unsigned long)gd->ram_size);
68 void dram_init_banksize(void)
70 const void *fdt = gd->fdt_blob;
72 int ac, sc, cells, len, i;
74 val = get_memory_reg_prop(fdt, &len);
78 ac = fdt_address_cells(fdt, 0);
79 sc = fdt_size_cells(fdt, 0);
80 if (ac < 1 || sc > 2 || sc < 1 || sc > 2) {
81 printf("invalid address/size cells\n");
89 for (i = 0; i < CONFIG_NR_DRAM_BANKS && len >= cells;
91 gd->bd->bi_dram[i].start = fdtdec_get_number(val, ac);
93 gd->bd->bi_dram[i].size = fdtdec_get_number(val, sc);
96 debug("DRAM bank %d: start = %08lx, size = %08lx\n",
97 i, (unsigned long)gd->bd->bi_dram[i].start,
98 (unsigned long)gd->bd->bi_dram[i].size);
102 int arch_cpu_init(void)
104 /* Nothing to do (yet) */
108 int arch_early_init_r(void)
113 /* Call the comphy code via the MISC uclass driver */
114 ret = uclass_get_device(UCLASS_MISC, 0, &dev);
116 debug("COMPHY init failed: %d\n", ret);
120 /* Cause the SATA device to do its early init */
121 uclass_first_device(UCLASS_AHCI, &dev);