2 * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c
3 * This file is r8a7795 processor support - PFC hardware block.
5 * Copyright (C) 2015-2016 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CPU_32_PORT(fn, pfx, sfx) \
15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
17 PORT_1(fn, pfx##31, sfx)
19 #define CPU_32_PORT1(fn, pfx, sfx) \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
21 PORT_10(fn, pfx##2, sfx)
23 #define CPU_32_PORT2(fn, pfx, sfx) \
24 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx##2, sfx)
27 #define CPU_32_PORT_29(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_1(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##21, sfx), \
32 PORT_1(fn, pfx##22, sfx), \
33 PORT_1(fn, pfx##23, sfx), \
34 PORT_1(fn, pfx##24, sfx), \
35 PORT_1(fn, pfx##25, sfx), \
36 PORT_1(fn, pfx##26, sfx), \
37 PORT_1(fn, pfx##27, sfx), \
38 PORT_1(fn, pfx##28, sfx)
40 #define CPU_32_PORT_28(fn, pfx, sfx) \
41 PORT_10(fn, pfx, sfx), \
42 PORT_10(fn, pfx##1, sfx), \
43 PORT_1(fn, pfx##20, sfx), \
44 PORT_1(fn, pfx##21, sfx), \
45 PORT_1(fn, pfx##22, sfx), \
46 PORT_1(fn, pfx##23, sfx), \
47 PORT_1(fn, pfx##24, sfx), \
48 PORT_1(fn, pfx##25, sfx), \
49 PORT_1(fn, pfx##26, sfx), \
50 PORT_1(fn, pfx##27, sfx)
52 #define CPU_32_PORT_26(fn, pfx, sfx) \
53 PORT_10(fn, pfx, sfx), \
54 PORT_10(fn, pfx##1, sfx), \
55 PORT_1(fn, pfx##20, sfx), \
56 PORT_1(fn, pfx##21, sfx), \
57 PORT_1(fn, pfx##22, sfx), \
58 PORT_1(fn, pfx##23, sfx), \
59 PORT_1(fn, pfx##24, sfx), \
60 PORT_1(fn, pfx##25, sfx)
62 #define CPU_32_PORT_18(fn, pfx, sfx) \
63 PORT_10(fn, pfx, sfx), \
64 PORT_1(fn, pfx##10, sfx), \
65 PORT_1(fn, pfx##11, sfx), \
66 PORT_1(fn, pfx##12, sfx), \
67 PORT_1(fn, pfx##13, sfx), \
68 PORT_1(fn, pfx##14, sfx), \
69 PORT_1(fn, pfx##15, sfx), \
70 PORT_1(fn, pfx##16, sfx), \
71 PORT_1(fn, pfx##17, sfx)
73 #define CPU_32_PORT_16(fn, pfx, sfx) \
74 PORT_10(fn, pfx, sfx), \
75 PORT_1(fn, pfx##10, sfx), \
76 PORT_1(fn, pfx##11, sfx), \
77 PORT_1(fn, pfx##12, sfx), \
78 PORT_1(fn, pfx##13, sfx), \
79 PORT_1(fn, pfx##14, sfx), \
80 PORT_1(fn, pfx##15, sfx)
82 #define CPU_32_PORT_15(fn, pfx, sfx) \
83 PORT_10(fn, pfx, sfx), \
84 PORT_1(fn, pfx##10, sfx), \
85 PORT_1(fn, pfx##11, sfx), \
86 PORT_1(fn, pfx##12, sfx), \
87 PORT_1(fn, pfx##13, sfx), \
88 PORT_1(fn, pfx##14, sfx)
90 #define CPU_32_PORT_4(fn, pfx, sfx) \
91 PORT_1(fn, pfx##0, sfx), \
92 PORT_1(fn, pfx##1, sfx), \
93 PORT_1(fn, pfx##2, sfx), \
94 PORT_1(fn, pfx##3, sfx)
98 /* GP_0_0_DATA -> GP_7_4_DATA */
99 /* except for GP0[16] - [31],
107 #define ES_CPU_ALL_PORT(fn, pfx, sfx) \
108 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
109 CPU_32_PORT_28(fn, pfx##_1_, sfx), \
110 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
111 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
112 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
113 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
114 CPU_32_PORT(fn, pfx##_6_, sfx), \
115 CPU_32_PORT_4(fn, pfx##_7_, sfx)
117 #define CPU_ALL_PORT(fn, pfx, sfx) \
118 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
119 CPU_32_PORT_29(fn, pfx##_1_, sfx), \
120 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
121 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
122 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
123 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
124 CPU_32_PORT(fn, pfx##_6_, sfx), \
125 CPU_32_PORT_4(fn, pfx##_7_, sfx)
127 #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
128 #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
129 GP##pfx##_IN, GP##pfx##_OUT)
131 #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
132 #define _GP_INDT(pfx, sfx) GP##pfx##_DATA
134 #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
135 #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
136 #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
139 #define PORT_10_REV(fn, pfx, sfx) \
140 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
141 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
142 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
143 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
144 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
146 #define CPU_32_PORT_REV(fn, pfx, sfx) \
147 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
148 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
149 PORT_10_REV(fn, pfx, sfx)
151 #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
152 #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
154 #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
155 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
173 PINMUX_FUNCTION_BEGIN,
226 GFN_AVB_AVTP_CAPTURE_A,
227 GFN_AVB_AVTP_MATCH_A,
360 IFN_AVB_AVTP_MATCH_A,
364 IFN_AVB_AVTP_CAPTURE_A,
385 FN_DU_EXODDF_DU_ODDF_DISP_CDE,
397 FN_DU_EXHSYNC_DU_HSYNC,
403 FN_DU_EXVSYNC_DU_VSYNC,
496 FN_AVB_AVTP_CAPTURE_B,
1121 /* sel_msiof3[3](0,1,2,3,4) */
1122 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
1123 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
1125 /* sel_msiof2[2](0,1,2,3) */
1126 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
1127 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
1128 /* sel_msiof1[3](0,1,2,3,4,5,6) */
1129 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
1130 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
1131 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
1133 /* sel_lbsc[1](0,1) */
1134 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
1135 /* sel_iebus[1](0,1) */
1136 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
1137 /* sel_i2c2[1](0,1) */
1138 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
1139 /* sel_i2c1[1](0,1) */
1140 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
1141 /* sel_hscif4[1](0,1) */
1142 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
1143 /* sel_hscif3[2](0,1,2,3) */
1144 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
1145 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
1146 /* sel_hscif1[1](0,1) */
1147 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
1149 /* sel_hscif2[2](0,1,2) */
1150 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
1152 /* sel_etheravb[1](0,1) */
1153 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
1154 /* sel_drif3[1](0,1) */
1155 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
1156 /* sel_drif2[1](0,1) */
1157 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
1158 /* sel_drif1[2](0,1,2) */
1159 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
1161 /* sel_drif0[2](0,1,2) */
1162 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
1164 /* sel_canfd0[1](0,1) */
1165 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
1166 /* sel_adg_a[2](0,1,2) */
1167 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
1172 /* sel_tsif1[2](0,1,2,3) */
1173 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
1174 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
1175 /* sel_tsif0[3](0,1,2,3,4) */
1176 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
1177 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
1179 /* sel_timer_tmu1[1](0,1) */
1180 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
1181 /* sel_ssp1_1[2](0,1,2,3) */
1182 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
1183 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
1184 /* sel_ssp1_0[3](0,1,2,3,4) */
1185 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
1186 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
1188 /* sel_ssi1[1](0,1) */
1189 FN_SEL_SSI_0, FN_SEL_SSI_1,
1190 /* sel_speed_pulse_if[1](0,1) */
1191 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
1192 /* sel_simcard[2](0,1,2,3) */
1193 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
1194 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
1195 /* sel_sdhi2[1](0,1) */
1196 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
1197 /* sel_scif4[2](0,1,2) */
1198 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
1200 /* sel_scif3[1](0,1) */
1201 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
1202 /* sel_scif2[1](0,1) */
1203 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
1204 /* sel_scif1[1](0,1) */
1205 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
1206 /* sel_scif[1](0,1) */
1207 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
1208 /* sel_remocon[1](0,1) */
1209 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
1210 /* reserved[8..7] */
1211 /* sel_rcan0[1](0,1) */
1212 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
1213 /* sel_pwm6[1](0,1) */
1214 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
1215 /* sel_pwm5[1](0,1) */
1216 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
1217 /* sel_pwm4[1](0,1) */
1218 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
1219 /* sel_pwm3[1](0,1) */
1220 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
1221 /* sel_pwm2[1](0,1) */
1222 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
1223 /* sel_pwm1[1](0,1) */
1224 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
1227 /* i2c_sel_5[1](0,1) */
1228 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
1229 /* i2c_sel_3[1](0,1) */
1230 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
1231 /* i2c_sel_0[1](0,1) */
1232 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
1233 /* sel_fm[2](0,1,2,3) */
1234 FN_SEL_FM_0, FN_SEL_FM_1,
1235 FN_SEL_FM_2, FN_SEL_FM_3,
1236 /* sel_scif5[1](0,1) */
1237 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
1238 /* sel_i2c6[3](0,1,2) */
1239 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
1241 /* sel_ndfc[1](0,1) */
1242 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
1243 /* sel_ssi2[1](0,1) */
1244 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
1245 /* sel_ssi9[1](0,1) */
1246 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
1247 /* sel_timer_tmu2[1](0,1) */
1248 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
1249 /* sel_adg_b[1](0,1) */
1250 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
1251 /* sel_adg_c[1](0,1) */
1252 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
1253 /* reserved[16..16] */
1254 /* reserved[15..8] */
1255 /* reserved[7..1] */
1256 /* sel_vin4[1](0,1) */
1257 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
1259 PINMUX_FUNCTION_END,
1313 AVB_AVTP_CAPTURE_A_GMARK,
1314 AVB_AVTP_MATCH_A_GMARK,
1447 AVB_AVTP_MATCH_A_IMARK,
1451 AVB_AVTP_CAPTURE_A_IMARK,
1472 DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
1484 DU_EXHSYNC_DU_HSYNC_MARK,
1490 DU_EXVSYNC_DU_VSYNC_MARK,
1565 AVB_AVTP_MATCH_B_MARK,
1584 AVB_AVTP_CAPTURE_B_MARK,
1769 STP_IVCXO27_0_B_MARK,
1777 STP_ISSYNC_0_B_MARK,
1795 STP_IVCXO27_1_B_MARK,
1807 STP_ISSYNC_1_B_MARK,
1900 STP_ISSYNC_0_C_MARK,
1906 STP_ISSYNC_1_C_MARK,
1908 AUDIO_CLKOUT_C_MARK,
1915 STP_IVCXO27_1_C_MARK,
1988 STP_ISSYNC_0_D_MARK,
1990 AUDIO_CLKOUT1_A_MARK,
1995 STP_IVCXO27_0_D_MARK,
1997 AUDIO_CLKOUT2_A_MARK,
1999 AUDIO_CLKOUT_A_MARK,
2009 STP_IVCXO27_0_C_MARK,
2010 AUDIO_CLKOUT3_A_MARK,
2018 AUDIO_CLKOUT_D_MARK,
2052 STP_IVCXO27_0_A_MARK,
2078 STP_ISSYNC_0_A_MARK,
2116 STP_ISSYNC_1_A_MARK,
2125 STP_IVCXO27_1_A_MARK,
2133 STP_IVCXO27_1_D_MARK,
2168 AUDIO_CLKOUT_B_MARK,
2179 AUDIO_CLKOUT1_B_MARK,
2182 STP_ISSYNC_1_D_MARK,
2183 STP_IVCXO27_0_E_MARK,
2191 static pinmux_enum_t pinmux_data[] = {
2192 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
2195 PINMUX_DATA(D15_GMARK, GFN_D15),
2196 PINMUX_DATA(D14_GMARK, GFN_D14),
2197 PINMUX_DATA(D13_GMARK, GFN_D13),
2198 PINMUX_DATA(D12_GMARK, GFN_D12),
2199 PINMUX_DATA(D11_GMARK, GFN_D11),
2200 PINMUX_DATA(D10_GMARK, GFN_D10),
2201 PINMUX_DATA(D9_GMARK, GFN_D9),
2202 PINMUX_DATA(D8_GMARK, GFN_D8),
2203 PINMUX_DATA(D7_GMARK, GFN_D7),
2204 PINMUX_DATA(D6_GMARK, GFN_D6),
2205 PINMUX_DATA(D5_GMARK, GFN_D5),
2206 PINMUX_DATA(D4_GMARK, GFN_D4),
2207 PINMUX_DATA(D3_GMARK, GFN_D3),
2208 PINMUX_DATA(D2_GMARK, GFN_D2),
2209 PINMUX_DATA(D1_GMARK, GFN_D1),
2210 PINMUX_DATA(D0_GMARK, GFN_D0),
2213 PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),
2214 PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),
2215 PINMUX_DATA(WE1x_GMARK, GFN_WE1x),
2216 PINMUX_DATA(WE0x_GMARK, GFN_WE0x),
2217 PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),
2218 PINMUX_DATA(RDx_GMARK, GFN_RDx),
2219 PINMUX_DATA(BSx_GMARK, GFN_BSx),
2220 PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),
2221 PINMUX_DATA(CS0x_GMARK, GFN_CS0x),
2222 PINMUX_DATA(A19_GMARK, GFN_A19),
2223 PINMUX_DATA(A18_GMARK, GFN_A18),
2224 PINMUX_DATA(A17_GMARK, GFN_A17),
2225 PINMUX_DATA(A16_GMARK, GFN_A16),
2226 PINMUX_DATA(A15_GMARK, GFN_A15),
2227 PINMUX_DATA(A14_GMARK, GFN_A14),
2228 PINMUX_DATA(A13_GMARK, GFN_A13),
2229 PINMUX_DATA(A12_GMARK, GFN_A12),
2230 PINMUX_DATA(A11_GMARK, GFN_A11),
2231 PINMUX_DATA(A10_GMARK, GFN_A10),
2232 PINMUX_DATA(A9_GMARK, GFN_A9),
2233 PINMUX_DATA(A8_GMARK, GFN_A8),
2234 PINMUX_DATA(A7_GMARK, GFN_A7),
2235 PINMUX_DATA(A6_GMARK, GFN_A6),
2236 PINMUX_DATA(A5_GMARK, GFN_A5),
2237 PINMUX_DATA(A4_GMARK, GFN_A4),
2238 PINMUX_DATA(A3_GMARK, GFN_A3),
2239 PINMUX_DATA(A2_GMARK, GFN_A2),
2240 PINMUX_DATA(A1_GMARK, GFN_A1),
2241 PINMUX_DATA(A0_GMARK, GFN_A0),
2244 PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),
2245 PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),
2246 PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),
2247 PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),
2248 PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),
2249 PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),
2250 PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),
2251 PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),
2252 PINMUX_DATA(PWM0_GMARK, GFN_PWM0),
2253 PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),
2254 PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),
2255 PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),
2256 PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),
2257 PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),
2258 PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),
2261 PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),
2262 PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),
2263 PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),
2264 PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),
2265 PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),
2266 PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),
2267 PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),
2268 PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),
2269 PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),
2270 PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),
2271 PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),
2272 PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),
2273 PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),
2274 PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),
2275 PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),
2276 PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),
2279 PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),
2280 PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),
2281 PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),
2282 PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),
2283 PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),
2284 PINMUX_DATA(SD3_DAT3_GMARK, GFN_SD3_DAT3),
2285 PINMUX_DATA(SD3_DAT2_GMARK, GFN_SD3_DAT2),
2286 PINMUX_DATA(SD3_DAT1_GMARK, GFN_SD3_DAT1),
2287 PINMUX_DATA(SD3_DAT0_GMARK, GFN_SD3_DAT0),
2288 PINMUX_DATA(SD3_CMD_GMARK, GFN_SD3_CMD),
2289 PINMUX_DATA(SD3_CLK_GMARK, GFN_SD3_CLK),
2290 PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),
2291 PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),
2292 PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),
2293 PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),
2294 PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),
2295 PINMUX_DATA(SD2_CMD_GMARK, GFN_SD2_CMD),
2296 PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),
2299 PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),
2300 PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),
2301 PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),
2302 PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),
2303 PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),
2304 PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),
2305 PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),
2306 PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),
2307 PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),
2308 PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),
2309 PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),
2310 PINMUX_DATA(HTX0_GMARK, GFN_HTX0),
2311 PINMUX_DATA(HRX0_GMARK, GFN_HRX0),
2312 PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),
2313 PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),
2314 PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),
2315 PINMUX_DATA(SCK2_GMARK, GFN_SCK2),
2316 PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),
2317 PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),
2318 PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),
2319 PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),
2320 PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),
2321 PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),
2322 PINMUX_DATA(TX0_GMARK, GFN_TX0),
2323 PINMUX_DATA(RX0_GMARK, GFN_RX0),
2324 PINMUX_DATA(SCK0_GMARK, GFN_SCK0),
2327 PINMUX_DATA(USB3_OVC_GMARK, GFN_USB3_OVC),
2328 PINMUX_DATA(USB3_PWEN_GMARK, GFN_USB3_PWEN),
2329 PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),
2330 PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),
2331 PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),
2332 PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),
2333 PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),
2334 PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),
2335 PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),
2336 PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),
2337 PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),
2338 PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),
2339 PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),
2340 PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),
2341 PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),
2342 PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),
2343 PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),
2344 PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),
2345 PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),
2346 PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),
2347 PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),
2348 PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),
2349 PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),
2350 PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),
2351 PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),
2352 PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),
2353 PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),
2354 PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),
2355 PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),
2356 PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),
2357 PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),
2358 PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),
2361 PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),
2362 PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),
2363 PINMUX_DATA(AVS2_MARK, FN_AVS2),
2364 PINMUX_DATA(AVS1_MARK, FN_AVS1),
2367 static struct pinmux_gpio pinmux_gpios[] = {
2368 PINMUX_GPIO_GP_ALL(),
2388 GPIO_GFN(EX_WAIT0_A),
2418 GPIO_GFN(AVB_AVTP_CAPTURE_A),
2419 GPIO_GFN(AVB_AVTP_MATCH_A),
2421 GPIO_GFN(AVB_PHY_INT),
2422 GPIO_GFN(AVB_MAGIC),
2476 GPIO_FN(MSIOF0_RXD),
2477 GPIO_GFN(MSIOF0_SS2),
2478 GPIO_FN(MSIOF0_TXD),
2479 GPIO_GFN(MSIOF0_SS1),
2480 GPIO_GFN(MSIOF0_SYNC),
2481 GPIO_FN(MSIOF0_SCK),
2490 GPIO_GFN(RTS1x_TANS),
2494 GPIO_GFN(RTS0x_TANS),
2502 GPIO_GFN(USB3_PWEN),
2503 GPIO_GFN(USB30_OVC),
2504 GPIO_GFN(USB30_PWEN),
2506 GPIO_GFN(USB1_PWEN),
2508 GPIO_GFN(USB0_PWEN),
2509 GPIO_GFN(AUDIO_CLKB_B),
2510 GPIO_GFN(AUDIO_CLKA_A),
2511 GPIO_GFN(SSI_SDATA9_A),
2512 GPIO_GFN(SSI_SDATA8),
2513 GPIO_GFN(SSI_SDATA7),
2515 GPIO_GFN(SSI_SCK78),
2516 GPIO_GFN(SSI_SDATA6),
2519 GPIO_FN(SSI_SDATA5),
2522 GPIO_GFN(SSI_SDATA4),
2525 GPIO_GFN(SSI_SDATA3),
2527 GPIO_GFN(SSI_SCK34),
2528 GPIO_GFN(SSI_SDATA2_A),
2529 GPIO_GFN(SSI_SDATA1_A),
2530 GPIO_GFN(SSI_SDATA0),
2531 GPIO_GFN(SSI_WS01239),
2532 GPIO_GFN(SSI_SCK01239),
2542 GPIO_FN(MSIOF2_SS2_C),
2543 GPIO_IFN(AVB_MAGIC),
2544 GPIO_FN(MSIOF2_SS1_C),
2546 GPIO_IFN(AVB_PHY_INT),
2547 GPIO_FN(MSIOF2_SYNC_C),
2550 GPIO_FN(MSIOF2_SCK_C),
2552 GPIO_IFN(AVB_AVTP_MATCH_A),
2553 GPIO_FN(MSIOF2_RXD_C),
2555 GPIO_FN(FSCLKST2x_A),
2556 GPIO_IFN(AVB_AVTP_CAPTURE_A),
2557 GPIO_FN(MSIOF2_TXD_C),
2558 GPIO_FN(RTS4x_TANS_A),
2562 GPIO_FN(VI4_DATA0_B),
2564 GPIO_FN(CANFD0_TX_B),
2565 GPIO_FN(MSIOF3_SS2_E),
2569 GPIO_FN(VI4_DATA1_B),
2571 GPIO_FN(CANFD0_RX_B),
2572 GPIO_FN(MSIOF3_SS1_E),
2577 GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),
2578 GPIO_FN(VI4_DATA2_B),
2579 GPIO_FN(MSIOF3_SYNC_E),
2583 GPIO_FN(DU_DOTCLKOUT1),
2584 GPIO_FN(VI4_DATA3_B),
2585 GPIO_FN(MSIOF3_SCK_E),
2589 GPIO_FN(DU_EXHSYNC_DU_HSYNC),
2590 GPIO_FN(VI4_DATA4_B),
2591 GPIO_FN(MSIOF3_RXD_E),
2595 GPIO_FN(DU_EXVSYNC_DU_VSYNC),
2596 GPIO_FN(VI4_DATA5_B),
2597 GPIO_FN(FSCLKST2x_B),
2598 GPIO_FN(MSIOF3_TXD_E),
2601 GPIO_FN(AVB_AVTP_PPS),
2602 GPIO_FN(VI4_DATA6_B),
2606 GPIO_FN(VI4_DATA7_B),
2613 GPIO_FN(MSIOF3_SYNC_B),
2621 GPIO_FN(MSIOF3_TXD_B),
2627 GPIO_FN(MSIOF3_SCK_B),
2628 GPIO_FN(VI4_DATA10),
2633 GPIO_FN(MSIOF3_RXD_B),
2634 GPIO_FN(VI4_DATA11),
2639 GPIO_FN(MSIOF3_SS1_B),
2640 GPIO_FN(VI4_DATA12),
2641 GPIO_FN(VI5_DATA12),
2645 GPIO_FN(MSIOF3_SS2_B),
2647 GPIO_FN(VI4_DATA13),
2648 GPIO_FN(VI5_DATA13),
2652 GPIO_FN(MSIOF2_SS1_A),
2654 GPIO_FN(VI4_DATA14),
2655 GPIO_FN(VI5_DATA14),
2659 GPIO_FN(MSIOF2_SS2_A),
2661 GPIO_FN(VI4_DATA15),
2662 GPIO_FN(V15_DATA15),
2666 GPIO_FN(MSIOF2_SYNC_A),
2669 GPIO_FN(AVB_AVTP_MATCH_B),
2674 GPIO_FN(MSIOF2_SCK_A),
2676 GPIO_FN(VI5_VSYNCx),
2678 GPIO_FN(MSIOF2_RXD_A),
2679 GPIO_FN(RTS4n_TANS_B),
2680 GPIO_FN(VI5_HSYNCx),
2683 GPIO_FN(MSIOF2_TXD_A),
2688 GPIO_FN(AVB_AVTP_CAPTURE_B),
2692 GPIO_FN(MSIOF3_SCK_C),
2698 GPIO_FN(MSIOF3_SYNC_C),
2704 GPIO_FN(MSIOF3_RXD_C),
2706 GPIO_FN(VI5_DATA10),
2710 GPIO_FN(MSIOF3_TXD_C),
2712 GPIO_FN(VI5_DATA11),
2722 GPIO_FN(VI4_VSYNCx),
2726 GPIO_FN(VI4_HSYNCx),
2730 GPIO_FN(VI4_CLKENB),
2733 GPIO_FN(VI5_CLKENB),
2736 GPIO_FN(EX_WAIT0_B),
2739 GPIO_FN(MSIOF3_SCK_D),
2746 GPIO_FN(MSIOF3_SYNC_D),
2750 GPIO_FN(CANFD0_TX_A),
2752 GPIO_FN(MSIOF3_RXD_D),
2756 GPIO_FN(CANFD0_RX_A),
2760 GPIO_FN(MSIIOF3_TXD_D),
2767 GPIO_FN(MSIOF3_SS1_D),
2768 GPIO_FN(RTS3x_TANS),
2774 GPIO_IFN(EX_WAIT0_A),
2777 GPIO_FN(DU_DOTCLKOUT0),
2779 GPIO_FN(MSIOF2_SS1_B),
2780 GPIO_FN(MSIOF3_SCK_A),
2781 GPIO_FN(VI4_DATA16),
2784 GPIO_FN(MSIOF2_SS2_B),
2785 GPIO_FN(MSIOF3_SYNC_A),
2786 GPIO_FN(VI4_DATA17),
2789 GPIO_FN(MSIOF3_RXD_A),
2790 GPIO_FN(VI4_DATA18),
2793 GPIO_FN(MSIOF3_TXD_A),
2794 GPIO_FN(VI4_DATA19),
2797 GPIO_FN(MSIOF2_SCK_B),
2798 GPIO_FN(VI4_DATA20),
2803 GPIO_FN(MSIOF2_SYNC_B),
2804 GPIO_FN(VI4_DATA21),
2807 GPIO_FN(MSIOF2_RXD_B),
2808 GPIO_FN(VI4_DATA22),
2811 GPIO_FN(MSIOF2_TXD_B),
2812 GPIO_FN(VI4_DATA23),
2816 GPIO_FN(MSIOF2_SCK_D),
2818 GPIO_FN(VI4_DATA0_A),
2822 GPIO_FN(MSIOF2_SYNC_D),
2823 GPIO_FN(VI4_DATA1_A),
2827 GPIO_FN(MSIOF2_RXD_D),
2829 GPIO_FN(VI4_DATA2_A),
2834 GPIO_FN(MSIOF2_TXD_D),
2836 GPIO_FN(VI4_DATA3_A),
2837 GPIO_FN(RTS4x_TANS_C),
2841 GPIO_FN(MSIOF2_SS1_D),
2843 GPIO_FN(VI4_DATA4_A),
2849 GPIO_FN(MSIOF2_SS2_D),
2851 GPIO_FN(VI4_DATA5_A),
2855 GPIO_FN(MSIOF3_SS1_A),
2857 GPIO_FN(VI4_DATA6_A),
2862 GPIO_FN(MSIOF3_SS2_A),
2864 GPIO_FN(VI4_DATA7_A),
2869 GPIO_FN(MSIOF1_SCK_E),
2870 GPIO_FN(STP_OPWM_0_B),
2872 GPIO_FN(MSIOF1_SYNC_E),
2873 GPIO_FN(STP_IVCXO27_0_B),
2875 GPIO_FN(MSIOF1_RXD_E),
2877 GPIO_FN(STP_ISCLK_0_B),
2879 GPIO_FN(MSIOF1_TXD_E),
2880 GPIO_FN(TS_SPSYNC0_B),
2881 GPIO_FN(STP_ISSYNC_0_B),
2885 GPIO_FN(MSIOF1_SS1_E),
2886 GPIO_FN(TS_SDAT0_B),
2887 GPIO_FN(STP_ISD_0_B),
2889 GPIO_FN(MSIOF1_SS2_E),
2890 GPIO_FN(TS_SDEN0_B),
2891 GPIO_FN(STP_ISEN_0_B),
2893 GPIO_FN(MSIOF1_SCK_G),
2894 GPIO_FN(SIM0_CLK_A),
2896 GPIO_FN(MSIOF1_SYNC_G),
2899 GPIO_FN(STP_IVCXO27_1_B),
2902 GPIO_FN(MSIOF1_RXD_G),
2905 GPIO_FN(STP_ISCLK_1_B),
2908 GPIO_FN(MSIOF1_TXD_G),
2909 GPIO_FN(NFDATA14_B),
2910 GPIO_FN(TS_SPSYNC1_B),
2911 GPIO_FN(STP_ISSYNC_1_B),
2914 GPIO_FN(MSIOF1_SS1_G),
2915 GPIO_FN(NFDATA15_B),
2916 GPIO_FN(TS_SDAT1_B),
2917 GPIO_FN(STP_IOD_1_B),
2920 GPIO_FN(MSIOF1_SS2_G),
2922 GPIO_FN(TS_SDEN1_B),
2923 GPIO_FN(STP_ISEN_1_B),
2940 GPIO_FN(SATA_DEVSLP_B),
2972 GPIO_FN(NFDATA14_A),
2974 GPIO_FN(SIM0_RST_A),
2976 GPIO_FN(NFDATA15_A),
2980 GPIO_FN(SIM0_CLK_B),
2986 GPIO_FN(MSIOF1_SS2_B),
2987 GPIO_FN(AUDIO_CLKC_B),
2989 GPIO_FN(SIM0_RST_B),
2990 GPIO_FN(STP_OPWM_0_C),
2991 GPIO_FN(RIF0_CLK_B),
2997 GPIO_FN(STP_ISCLK_0_C),
3003 GPIO_FN(TS_SPSYNC0_C),
3004 GPIO_FN(STP_ISSYNC_0_C),
3008 GPIO_FN(MSIOF1_SYNC_B),
3009 GPIO_FN(TS_SPSYNC1_C),
3010 GPIO_FN(STP_ISSYNC_1_C),
3011 GPIO_FN(RIF1_SYNC_B),
3012 GPIO_FN(AUDIO_CLKOUT_C),
3013 GPIO_FN(ADICS_SAMP),
3014 GPIO_IFN(RTS0x_TANS),
3016 GPIO_FN(MSIOF1_SS1_B),
3017 GPIO_FN(AUDIO_CLKA_B),
3019 GPIO_FN(STP_IVCXO27_1_C),
3020 GPIO_FN(RIF0_SYNC_B),
3024 GPIO_FN(TS_SDAT0_C),
3025 GPIO_FN(STP_ISD_0_C),
3026 GPIO_FN(RIF1_CLK_C),
3029 GPIO_FN(TS_SDEN0_C),
3030 GPIO_FN(STP_ISEN_0_C),
3034 GPIO_FN(MSIOF1_RXD_B),
3035 GPIO_FN(TS_SDEN1_C),
3036 GPIO_FN(STP_ISEN_1_C),
3039 GPIO_IFN(RTS1x_TANS),
3041 GPIO_FN(MSIOF1_TXD_B),
3042 GPIO_FN(TS_SDAT1_C),
3043 GPIO_FN(STP_ISD_1_C),
3047 GPIO_FN(SCIF_CLK_B),
3048 GPIO_FN(MSIOF1_SCK_B),
3050 GPIO_FN(STP_ISCLK_1_C),
3051 GPIO_FN(RIF1_CLK_B),
3060 GPIO_FN(FSO_CFE_0x),
3065 GPIO_FN(RIF1_SYNC_C),
3066 GPIO_FN(FSO_CFE_1x),
3068 GPIO_FN(MSIOF1_SCK_D),
3069 GPIO_FN(AUDIO_CLKB_A),
3070 GPIO_FN(SSI_SDATA1_B),
3072 GPIO_FN(STP_ISCLK_0_D),
3073 GPIO_FN(RIF0_CLK_C),
3076 GPIO_FN(MSIOF1_RXD_D),
3077 GPIO_FN(SSI_SDATA2_B),
3078 GPIO_FN(TS_SDEN0_D),
3079 GPIO_FN(STP_ISEN_0_D),
3082 GPIO_FN(MSIOF1_TXD_D),
3083 GPIO_FN(SSI_SDATA9_B),
3084 GPIO_FN(TS_SDAT0_D),
3085 GPIO_FN(STP_ISD_0_D),
3089 GPIO_FN(MSIOF1_SYNC_D),
3090 GPIO_FN(SSI_SCK9_A),
3091 GPIO_FN(TS_SPSYNC0_D),
3092 GPIO_FN(STP_ISSYNC_0_D),
3093 GPIO_FN(RIF0_SYNC_C),
3094 GPIO_FN(AUDIO_CLKOUT1_A),
3097 GPIO_FN(MSIOF1_SS1_D),
3099 GPIO_FN(STP_IVCXO27_0_D),
3101 GPIO_FN(AUDIO_CLKOUT2_A),
3102 GPIO_IFN(MSIOF0_SYNC),
3103 GPIO_FN(AUDIO_CLKOUT_A),
3108 GPIO_IFN(MSIOF0_SS1),
3111 GPIO_FN(AUDIO_CLKA_C),
3112 GPIO_FN(SSI_SCK2_A),
3113 GPIO_FN(STP_IVCXO27_0_C),
3114 GPIO_FN(AUDIO_CLKOUT3_A),
3116 GPIO_IFN(MSIOF0_SS2),
3118 GPIO_FN(MSIOF1_SS2_D),
3119 GPIO_FN(AUDIO_CLKC_A),
3121 GPIO_FN(STP_OPWM_0_D),
3122 GPIO_FN(AUDIO_CLKOUT_D),
3125 GPIO_FN(MSIOF1_SCK_F),
3129 GPIO_FN(MSIOF1_SYNC_F),
3133 GPIO_FN(MSIOF1_RXD_F),
3134 GPIO_IFN(SSI_SCK01239),
3135 GPIO_FN(MSIOF1_TXD_F),
3137 GPIO_IFN(SSI_WS01239),
3138 GPIO_FN(MSIOF1_SS1_F),
3140 GPIO_IFN(SSI_SDATA0),
3141 GPIO_FN(MSIOF1_SS2_F),
3145 GPIO_IFN(SSI_SDATA1_A),
3147 GPIO_IFN(SSI_SDATA2_A),
3148 GPIO_FN(SSI_SCK1_B),
3150 GPIO_IFN(SSI_SCK34),
3151 GPIO_FN(MSIOF1_SS1_A),
3152 GPIO_FN(STP_OPWM_0_A),
3155 GPIO_FN(MSIOF1_SS2_A),
3156 GPIO_FN(STP_IVCXO27_0_A),
3157 GPIO_IFN(SSI_SDATA3),
3159 GPIO_FN(MSIOF1_TXD_A),
3161 GPIO_FN(STP_ISCLK_0_A),
3166 GPIO_FN(MSIOF1_SCK_A),
3167 GPIO_FN(TS_SDAT0_A),
3168 GPIO_FN(STP_ISD_0_A),
3169 GPIO_FN(RIF0_CLK_A),
3170 GPIO_FN(RIF2_CLK_A),
3173 GPIO_FN(MSIOF1_SYNC_A),
3174 GPIO_FN(TS_SDEN0_A),
3175 GPIO_FN(STP_ISEN_0_A),
3176 GPIO_FN(RIF0_SYNC_A),
3177 GPIO_FN(RIF2_SYNC_A),
3178 GPIO_IFN(SSI_SDATA4),
3180 GPIO_FN(MSIOF1_RXD_A),
3181 GPIO_FN(TS_SPSYNC0_A),
3182 GPIO_FN(STP_ISSYNC_0_A),
3188 GPIO_FN(SIM0_RST_D),
3191 GPIO_IFN(SSI_SDATA6),
3192 GPIO_FN(SIM0_CLK_D),
3193 GPIO_FN(SATA_DEVSLP_A),
3194 GPIO_IFN(SSI_SCK78),
3196 GPIO_FN(MSIOF1_SCK_C),
3198 GPIO_FN(STP_ISCLK_1_A),
3199 GPIO_FN(RIF1_CLK_A),
3200 GPIO_FN(RIF3_CLK_A),
3203 GPIO_FN(MSIOF1_SYNC_C),
3204 GPIO_FN(TS_SDAT1_A),
3205 GPIO_FN(STP_ISD_1_A),
3206 GPIO_FN(RIF1_SYNC_A),
3207 GPIO_FN(RIF3_SYNC_A),
3208 GPIO_IFN(SSI_SDATA7),
3210 GPIO_FN(MSIOF1_RXD_C),
3211 GPIO_FN(TS_SDEN1_A),
3212 GPIO_FN(STP_ISEN_1_A),
3216 GPIO_IFN(SSI_SDATA8),
3218 GPIO_FN(MSIOF1_TXD_C),
3219 GPIO_FN(TS_SPSYNC1_A),
3220 GPIO_FN(STP_ISSYNC_1_A),
3223 GPIO_IFN(SSI_SDATA9_A),
3225 GPIO_FN(MSIOF1_SS1_C),
3229 GPIO_FN(STP_IVCXO27_1_A),
3233 GPIO_IFN(AUDIO_CLKA_A),
3234 GPIO_FN(CC5_OSCOUT),
3235 GPIO_IFN(AUDIO_CLKB_B),
3236 GPIO_FN(SCIF_CLK_A),
3237 GPIO_FN(STP_IVCXO27_1_D),
3240 GPIO_IFN(USB0_PWEN),
3241 GPIO_FN(SIM0_RST_C),
3243 GPIO_FN(STP_ISCLK_1_D),
3245 GPIO_FN(RIF3_CLK_B),
3249 GPIO_FN(TS_SDAT1_D),
3250 GPIO_FN(STP_ISD_1_D),
3251 GPIO_FN(RIF3_SYNC_B),
3253 GPIO_IFN(USB1_PWEN),
3254 GPIO_FN(SIM0_CLK_C),
3255 GPIO_FN(SSI_SCK1_A),
3257 GPIO_FN(STP_ISCLK_0_E),
3259 GPIO_FN(RIF2_CLK_B),
3263 GPIO_FN(MSIOF1_SS2_C),
3265 GPIO_FN(TS_SDAT0_E),
3266 GPIO_FN(STP_ISD_0_E),
3268 GPIO_FN(RIF2_SYNC_B),
3271 GPIO_IFN(USB30_PWEN),
3272 GPIO_FN(AUDIO_CLKOUT_B),
3273 GPIO_FN(SSI_SCK2_B),
3274 GPIO_FN(TS_SDEN1_D),
3275 GPIO_FN(STP_ISEN_1_D),
3276 GPIO_FN(STP_OPWM_0_E),
3282 GPIO_IFN(USB30_OVC),
3283 GPIO_FN(AUDIO_CLKOUT1_B),
3285 GPIO_FN(TS_SPSYNC1_D),
3286 GPIO_FN(STP_ISSYNC_1_D),
3287 GPIO_FN(STP_IVCXO27_0_E),
3293 static struct pinmux_cfg_reg pinmux_config_regs[] = {
3294 /* GPSR0(0xE6060100) md[3:1] controls initial value */
3295 /* md[3:1] .. 0 : 0x0000FFFF */
3296 /* .. other : 0x00000000 */
3297 { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) {
3316 GP_0_15_FN, GFN_D15,
3317 GP_0_14_FN, GFN_D14,
3318 GP_0_13_FN, GFN_D13,
3319 GP_0_12_FN, GFN_D12,
3320 GP_0_11_FN, GFN_D11,
3321 GP_0_10_FN, GFN_D10,
3333 /* GPSR1(0xE6060104) is md[3:1] controls initial value */
3334 /* md[3:1] .. 0 : 0x0EFFFFFF */
3335 /* .. other : 0x00000000 */
3336 { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) {
3340 GP_1_28_FN, GFN_CLKOUT,
3341 GP_1_27_FN, GFN_EX_WAIT0_A,
3342 GP_1_26_FN, GFN_WE1x,
3343 GP_1_25_FN, GFN_WE0x,
3344 GP_1_24_FN, GFN_RD_WRx,
3345 GP_1_23_FN, GFN_RDx,
3346 GP_1_22_FN, GFN_BSx,
3347 GP_1_21_FN, GFN_CS1x_A26,
3348 GP_1_20_FN, GFN_CS0x,
3349 GP_1_19_FN, GFN_A19,
3350 GP_1_18_FN, GFN_A18,
3351 GP_1_17_FN, GFN_A17,
3352 GP_1_16_FN, GFN_A16,
3353 GP_1_15_FN, GFN_A15,
3354 GP_1_14_FN, GFN_A14,
3355 GP_1_13_FN, GFN_A13,
3356 GP_1_12_FN, GFN_A12,
3357 GP_1_11_FN, GFN_A11,
3358 GP_1_10_FN, GFN_A10,
3370 /* GPSR2(0xE6060108) is md[3:1] controls */
3371 /* md[3:1] .. 0 : 0x000003C0 */
3372 /* .. other : 0x00000200 */
3373 { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) {
3393 GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,
3394 GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,
3395 GP_2_12_FN, GFN_AVB_LINK,
3396 GP_2_11_FN, GFN_AVB_PHY_INT,
3397 GP_2_10_FN, GFN_AVB_MAGIC,
3398 GP_2_9_FN, GFN_AVB_MDC,
3399 GP_2_8_FN, GFN_PWM2_A,
3400 GP_2_7_FN, GFN_PWM1_A,
3401 GP_2_6_FN, GFN_PWM0,
3402 GP_2_5_FN, GFN_IRQ5,
3403 GP_2_4_FN, GFN_IRQ4,
3404 GP_2_3_FN, GFN_IRQ3,
3405 GP_2_2_FN, GFN_IRQ2,
3406 GP_2_1_FN, GFN_IRQ1,
3407 GP_2_0_FN, GFN_IRQ0 }
3411 { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) {
3430 GP_3_15_FN, GFN_SD1_WP,
3431 GP_3_14_FN, GFN_SD1_CD,
3432 GP_3_13_FN, GFN_SD0_WP,
3433 GP_3_12_FN, GFN_SD0_CD,
3434 GP_3_11_FN, GFN_SD1_DAT3,
3435 GP_3_10_FN, GFN_SD1_DAT2,
3436 GP_3_9_FN, GFN_SD1_DAT1,
3437 GP_3_8_FN, GFN_SD1_DAT0,
3438 GP_3_7_FN, GFN_SD1_CMD,
3439 GP_3_6_FN, GFN_SD1_CLK,
3440 GP_3_5_FN, GFN_SD0_DAT3,
3441 GP_3_4_FN, GFN_SD0_DAT2,
3442 GP_3_3_FN, GFN_SD0_DAT1,
3443 GP_3_2_FN, GFN_SD0_DAT0,
3444 GP_3_1_FN, GFN_SD0_CMD,
3445 GP_3_0_FN, GFN_SD0_CLK }
3448 { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) {
3464 GP_4_17_FN, GFN_SD3_DS,
3465 GP_4_16_FN, GFN_SD3_DAT7,
3467 GP_4_15_FN, GFN_SD3_DAT6,
3468 GP_4_14_FN, GFN_SD3_DAT5,
3469 GP_4_13_FN, GFN_SD3_DAT4,
3470 GP_4_12_FN, GFN_SD3_DAT3,
3471 GP_4_11_FN, GFN_SD3_DAT2,
3472 GP_4_10_FN, GFN_SD3_DAT1,
3473 GP_4_9_FN, GFN_SD3_DAT0,
3474 GP_4_8_FN, GFN_SD3_CMD,
3475 GP_4_7_FN, GFN_SD3_CLK,
3476 GP_4_6_FN, GFN_SD2_DS,
3477 GP_4_5_FN, GFN_SD2_DAT3,
3478 GP_4_4_FN, GFN_SD2_DAT2,
3479 GP_4_3_FN, GFN_SD2_DAT1,
3480 GP_4_2_FN, GFN_SD2_DAT0,
3481 GP_4_1_FN, GFN_SD2_CMD,
3482 GP_4_0_FN, GFN_SD2_CLK }
3485 { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) {
3492 GP_5_25_FN, GFN_MLB_DAT,
3493 GP_5_24_FN, GFN_MLB_SIG,
3494 GP_5_23_FN, GFN_MLB_CLK,
3495 GP_5_22_FN, FN_MSIOF0_RXD,
3496 GP_5_21_FN, GFN_MSIOF0_SS2,
3497 GP_5_20_FN, FN_MSIOF0_TXD,
3498 GP_5_19_FN, GFN_MSIOF0_SS1,
3499 GP_5_18_FN, GFN_MSIOF0_SYNC,
3500 GP_5_17_FN, FN_MSIOF0_SCK,
3501 GP_5_16_FN, GFN_HRTS0x,
3502 GP_5_15_FN, GFN_HCTS0x,
3503 GP_5_14_FN, GFN_HTX0,
3504 GP_5_13_FN, GFN_HRX0,
3505 GP_5_12_FN, GFN_HSCK0,
3506 GP_5_11_FN, GFN_RX2_A,
3507 GP_5_10_FN, GFN_TX2_A,
3508 GP_5_9_FN, GFN_SCK2,
3509 GP_5_8_FN, GFN_RTS1x_TANS,
3510 GP_5_7_FN, GFN_CTS1x,
3511 GP_5_6_FN, GFN_TX1_A,
3512 GP_5_5_FN, GFN_RX1_A,
3513 GP_5_4_FN, GFN_RTS0x_TANS,
3514 GP_5_3_FN, GFN_CTS0x,
3517 GP_5_0_FN, GFN_SCK0 }
3520 { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) {
3521 GP_6_31_FN, GFN_USB3_OVC,
3522 GP_6_30_FN, GFN_USB3_PWEN,
3523 GP_6_29_FN, GFN_USB30_OVC,
3524 GP_6_28_FN, GFN_USB30_PWEN,
3525 GP_6_27_FN, GFN_USB1_OVC,
3526 GP_6_26_FN, GFN_USB1_PWEN,
3527 GP_6_25_FN, GFN_USB0_OVC,
3528 GP_6_24_FN, GFN_USB0_PWEN,
3529 GP_6_23_FN, GFN_AUDIO_CLKB_B,
3530 GP_6_22_FN, GFN_AUDIO_CLKA_A,
3531 GP_6_21_FN, GFN_SSI_SDATA9_A,
3532 GP_6_20_FN, GFN_SSI_SDATA8,
3533 GP_6_19_FN, GFN_SSI_SDATA7,
3534 GP_6_18_FN, GFN_SSI_WS78,
3535 GP_6_17_FN, GFN_SSI_SCK78,
3536 GP_6_16_FN, GFN_SSI_SDATA6,
3537 GP_6_15_FN, GFN_SSI_WS6,
3538 GP_6_14_FN, GFN_SSI_SCK6,
3539 GP_6_13_FN, FN_SSI_SDATA5,
3540 GP_6_12_FN, FN_SSI_WS5,
3541 GP_6_11_FN, FN_SSI_SCK5,
3542 GP_6_10_FN, GFN_SSI_SDATA4,
3543 GP_6_9_FN, GFN_SSI_WS4,
3544 GP_6_8_FN, GFN_SSI_SCK4,
3545 GP_6_7_FN, GFN_SSI_SDATA3,
3546 GP_6_6_FN, GFN_SSI_WS34,
3547 GP_6_5_FN, GFN_SSI_SCK34,
3548 GP_6_4_FN, GFN_SSI_SDATA2_A,
3549 GP_6_3_FN, GFN_SSI_SDATA1_A,
3550 GP_6_2_FN, GFN_SSI_SDATA0,
3551 GP_6_1_FN, GFN_SSI_WS01239,
3552 GP_6_0_FN, GFN_SSI_SCK01239 }
3555 { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) {
3587 GP_7_3_FN, FN_HDMI1_CEC,
3588 GP_7_2_FN, FN_HDMI0_CEC,
3590 GP_7_0_FN, FN_AVS1 }
3592 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3593 4, 4, 4, 4, 4, 4, 4, 4) {
3594 /* IPSR0_31_28 [4] */
3595 IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,
3596 FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, FN_MSIOF3_SS1_E,
3599 /* IPSR0_27_24 [4] */
3600 IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,
3601 FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, FN_MSIOF3_SS2_E,
3604 /* IPSR0_23_20 [4] */
3605 IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,
3609 /* IPSR0_19_16 [4] */
3610 IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,
3611 0, FN_FSCLKST2x_A, 0, 0,
3614 /* IPSR0_15_12 [4] */
3615 IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,
3619 /* IPSR0_11_8 [4] */
3620 IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,
3625 IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,
3630 IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,
3636 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3637 4, 4, 4, 4, 4, 4, 4, 4) {
3638 /* IPSR1_31_28 [4] */
3639 IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,
3640 FN_VI4_DATA8, 0, FN_DU_DB0, 0,
3643 /* IPSR1_27_24 [4] */
3644 IFN_PWM2_A, 0, 0, FN_HTX3_D,
3648 /* IPSR1_23_20 [4] */
3649 IFN_PWM1_A, 0, 0, FN_HRX3_D,
3650 FN_VI4_DATA7_B, 0, 0, 0,
3653 /* IPSR1_19_16 [4] */
3654 IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,
3655 FN_VI4_DATA6_B, 0, 0, 0,
3656 0, FN_IECLK_B, 0, 0,
3658 /* IPSR1_15_12 [4] */
3659 IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,
3660 FN_VI4_DATA5_B, FN_FSCLKST2x_B, 0, FN_MSIOF3_TXD_E,
3663 /* IPSR1_11_8 [4] */
3664 IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,
3665 FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,
3669 IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,
3670 FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,
3674 IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,
3675 FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,
3680 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3681 4, 4, 4, 4, 4, 4, 4, 4) {
3682 /* IPSR2_31_28 [4] */
3683 IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,
3685 FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,
3687 /* IPSR2_27_24 [4] */
3688 IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,
3689 FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,
3692 /* IPSR2_23_20 [4] */
3693 IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,
3694 FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,
3697 /* IPSR2_19_16 [4] */
3698 IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,
3699 FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,
3702 /* IPSR2_15_12 [4] */
3703 IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,
3704 FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,
3707 /* IPSR2_11_8 [4] */
3708 IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,
3709 FN_VI4_DATA11, 0, FN_DU_DB3, 0,
3713 IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,
3714 FN_VI4_DATA10, 0, FN_DU_DB2, 0,
3718 IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,
3719 FN_VI4_DATA9, 0, FN_DU_DB1, 0,
3724 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3725 4, 4, 4, 4, 4, 4, 4, 4) {
3726 /* IPSR3_31_28 [4] */
3727 IFN_A16, FN_LCDOUT8, 0, 0,
3728 FN_VI4_FIELD, 0, FN_DU_DG0, 0,
3731 /* IPSR3_27_24 [4] */
3732 IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,
3733 FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,
3736 /* IPSR3_23_20 [4] */
3737 IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,
3738 FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,
3741 /* IPSR3_19_16 [4] */
3742 IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,
3743 FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,
3746 /* IPSR3_15_12 [4] */
3747 IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,
3748 FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,
3751 /* IPSR3_11_8 [4] */
3752 IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,
3753 FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,
3754 FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, 0, 0,
3757 IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,
3758 0, FN_VI5_HSYNCx, 0, 0,
3762 IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,
3763 0, FN_VI5_VSYNCx, 0, 0,
3768 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
3769 4, 4, 4, 4, 4, 4, 4, 4) {
3770 /* IPSR4_31_28 [4] */
3771 IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,
3773 FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,
3775 /* IPSR4_27_24 [4] */
3776 IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,
3778 FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,
3780 /* IPSR4_23_20 [4] */
3781 IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,
3783 FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,
3785 /* IPSR4_19_16 [4] */
3786 IFN_CS1x_A26, 0, 0, 0,
3787 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,
3790 /* IPSR4_15_12 [4] */
3792 0, FN_VI5_CLKENB, 0, 0,
3795 /* IPSR4_11_8 [4] */
3796 IFN_A19, FN_LCDOUT11, 0, 0,
3797 FN_VI4_CLKENB, 0, FN_DU_DG3, 0,
3801 IFN_A18, FN_LCDOUT10, 0, 0,
3802 FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,
3806 IFN_A17, FN_LCDOUT9, 0, 0,
3807 FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,
3812 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
3813 4, 4, 4, 4, 4, 4, 4, 4) {
3814 /* IPSR5_31_28 [4] */
3815 IFN_D4, FN_MSIOF2_SCK_B, 0, 0,
3816 FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,
3819 /* IPSR5_27_24 [4] */
3820 IFN_D3, 0, FN_MSIOF3_TXD_A, 0,
3821 FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,
3824 /* IPSR5_23_20 [4] */
3825 IFN_D2, 0, FN_MSIOF3_RXD_A, 0,
3826 FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,
3829 /* IPSR5_19_16 [4] */
3830 IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,
3831 FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,
3834 /* IPSR5_15_12 [4] */
3835 IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,
3836 FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,
3839 /* IPSR5_11_8 [4] */
3840 IFN_EX_WAIT0_A, FN_QCLK, 0, 0,
3841 FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,
3845 IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,
3846 FN_HRTS3x, 0, 0, FN_SDA6_B,
3847 FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,
3850 IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,
3851 FN_HCTS3x, 0, 0, FN_SCL6_B,
3852 FN_CAN_CLK, 0, FN_IECLK_A, 0,
3856 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
3857 4, 4, 4, 4, 4, 4, 4, 4) {
3858 /* IPSR6_31_28 [4] */
3859 IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,
3860 FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,
3863 /* IPSR6_27_24 [4] */
3864 IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,
3865 FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,
3868 /* IPSR6_23_20 [4] */
3869 IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,
3870 FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,
3873 /* IPSR6_19_16 [4] */
3874 IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,
3875 FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,
3878 /* IPSR6_15_12 [4] */
3879 IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,
3880 FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,
3883 /* IPSR6_11_8 [4] */
3884 IFN_D7, FN_MSIOF2_TXD_B, 0, 0,
3885 FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,
3889 IFN_D6, FN_MSIOF2_RXD_B, 0, 0,
3890 FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,
3894 IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,
3895 FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,
3900 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
3901 4, 4, 4, 4, 4, 4, 4, 4) {
3902 /* IPSR7_31_28 [4] */
3903 IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,
3904 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,
3907 /* IPSR7_27_24 [4] */
3908 IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,
3909 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,
3912 /* IPSR7_23_20 [4] */
3913 IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,
3914 0, 0, FN_STP_IVCXO27_0_B, 0,
3917 /* IPSR7_19_16 [4] */
3918 IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,
3919 0, 0, FN_STP_OPWM_0_B, 0,
3922 /* IPSR7_15_12 [4] */
3923 FN_FSCLKST, 0, 0, 0,
3927 /* IPSR7_11_8 [4] */
3928 IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,
3929 FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,
3933 IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,
3934 FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,
3938 IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,
3939 FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,
3944 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
3945 4, 4, 4, 4, 4, 4, 4, 4) {
3946 /* IPSR8_31_28 [4] */
3947 IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, FN_NFRBx_B,
3948 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,
3951 /* IPSR8_27_24 [4] */
3952 IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, FN_NFDATA15_B,
3953 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,
3956 /* IPSR8_23_20 [4] */
3957 IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, FN_NFDATA14_B,
3958 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,
3961 /* IPSR8_19_16 [4] */
3962 IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, FN_NFWPx_B,
3963 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,
3966 /* IPSR8_15_12 [4] */
3967 IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, FN_NFCEx_B,
3968 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,
3971 /* IPSR8_11_8 [4] */
3972 IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,
3973 0, FN_SIM0_CLK_A, 0, 0,
3977 IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,
3978 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,
3982 IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,
3983 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,
3988 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
3989 4, 4, 4, 4, 4, 4, 4, 4) {
3990 /* IPSR9_31_28 [4] */
3991 IFN_SD3_CLK, 0, FN_NFWEx, 0,
3995 /* IPSR9_27_24 [4] */
3996 IFN_SD2_DS, 0, FN_NFALE, 0,
3998 FN_SATA_DEVSLP_B, 0, 0, 0,
4000 /* IPSR9_23_20 [4] */
4001 IFN_SD2_DAT3, 0, FN_NFDATA13, 0,
4005 /* IPSR9_19_16 [4] */
4006 IFN_SD2_DAT2, 0, FN_NFDATA12, 0,
4010 /* IPSR9_15_12 [4] */
4011 IFN_SD2_DAT1, 0, FN_NFDATA11, 0,
4015 /* IPSR9_11_8 [4] */
4016 IFN_SD2_DAT0, 0, FN_NFDATA10, 0,
4021 IFN_SD2_CMD, 0, FN_NFDATA9, 0,
4026 IFN_SD2_CLK, 0, FN_NFDATA8, 0,
4032 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
4033 4, 4, 4, 4, 4, 4, 4, 4) {
4034 /* IPSR10_31_28 [4] */
4035 IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,
4039 /* IPSR10_27_24 [4] */
4040 IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,
4044 /* IPSR10_23_20 [4] */
4045 IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,
4049 /* IPSR10_19_16 [4] */
4050 IFN_SD3_DAT3, 0, FN_NFDATA3, 0,
4054 /* IPSR10_15_12 [4] */
4055 IFN_SD3_DAT2, 0, FN_NFDATA2, 0,
4059 /* IPSR10_11_8 [4] */
4060 IFN_SD3_DAT1, 0, FN_NFDATA1, 0,
4064 /* IPSR10_7_4 [4] */
4065 IFN_SD3_DAT0, 0, FN_NFDATA0, 0,
4069 /* IPSR10_3_0 [4] */
4070 IFN_SD3_CMD, 0, FN_NFREx, 0,
4076 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
4077 4, 4, 4, 4, 4, 4, 4, 4) {
4078 /* IPSR11_31_28 [4] */
4079 IFN_RX0, FN_HRX1_B, 0, 0,
4080 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,
4083 /* IPSR11_27_24 [4] */
4084 IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,
4085 FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, FN_RIF0_CLK_B,
4086 FN_ADICHS2, FN_SCK5_B, 0, 0,
4088 /* IPSR11_23_20 [4] */
4089 IFN_SD1_WP, 0, FN_NFCEx_A, 0,
4090 0, FN_SIM0_D_B, 0, 0,
4093 /* IPSR11_19_16 [4] */
4094 IFN_SD1_CD, 0, FN_NFRBx_A, 0,
4095 0, FN_SIM0_CLK_B, 0, 0,
4098 /* IPSR11_15_12 [4] */
4099 IFN_SD0_WP, 0, FN_NFDATA15_A, 0,
4103 /* IPSR11_11_8 [4] */
4104 IFN_SD0_CD, 0, FN_NFDATA14_A, 0,
4105 FN_SCL2_B, FN_SIM0_RST_A, 0, 0,
4108 /* IPSR11_7_4 [4] */
4109 IFN_SD3_DS, 0, FN_NFCLE, 0,
4113 /* IPSR11_3_0 [4] */
4114 IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,
4120 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4121 4, 4, 4, 4, 4, 4, 4, 4) {
4122 /* IPSR12_31_28 [4] */
4123 IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,
4124 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,
4127 /* IPSR12_27_24 [4] */
4128 IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,
4129 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,
4130 0, FN_ADICHS0, 0, 0,
4132 /* IPSR12_23_20 [4] */
4133 IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,
4134 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,
4135 0, FN_ADIDATA, 0, 0,
4137 /* IPSR12_19_16 [4] */
4138 IFN_TX1_A, FN_HTX1_A, 0, 0,
4139 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,
4142 /* IPSR12_15_12 [4] */
4143 IFN_RX1_A, FN_HRX1_A, 0, 0,
4144 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,
4147 /* IPSR12_11_8 [4] */
4148 IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,
4149 FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,
4150 0, FN_ADICHS1, 0, 0,
4152 /* IPSR12_7_4 [4] */
4153 IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,
4154 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,
4155 FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,
4157 /* IPSR12_3_0 [4] */
4158 IFN_TX0, FN_HTX1_B, 0, 0,
4159 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,
4163 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
4164 4, 4, 4, 4, 4, 4, 4, 4) {
4165 /* IPSR13_31_28 [4] */
4166 IFN_MSIOF0_SYNC, 0, 0, 0,
4168 FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,
4169 0, FN_BPFCLK_D, 0, 0,
4170 /* IPSR13_27_24 [4] */
4171 IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,
4172 FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,
4173 FN_AUDIO_CLKOUT2_A, 0, 0, 0,
4175 /* IPSR13_23_20 [4] */
4176 IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,
4177 FN_SSI_SCK9_A, FN_TS_SPSYNC0_D,
4178 FN_STP_ISSYNC_0_D, FN_RIF0_SYNC_C,
4179 FN_AUDIO_CLKOUT1_A, 0, 0, 0,
4181 /* IPSR13_19_16 [4] */
4182 IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,
4183 FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,
4186 /* IPSR13_15_12 [4] */
4187 IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,
4188 FN_SSI_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,
4191 /* IPSR13_11_8 [4] */
4192 IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,
4193 FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,
4196 /* IPSR13_7_4 [4] */
4197 IFN_RX2_A, 0, 0, FN_SD2_WP_B,
4198 FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,
4199 0, FN_FSO_CFE_1x, 0, 0,
4201 /* IPSR13_3_0 [4] */
4202 IFN_TX2_A, 0, 0, FN_SD2_CD_B,
4203 FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,
4204 0, FN_FSO_CFE_0x, 0, 0,
4207 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
4208 4, 4, 4, 4, 4, 4, 4, 4) {
4209 /* IPSR14_31_28 [4] */
4210 IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,
4214 /* IPSR14_27_24 [4] */
4215 IFN_SSI_WS01239, 0, FN_MSIOF1_SS1_F, 0,
4216 0, 0, 0, 0, FN_MOUT1,
4219 /* IPSR14_23_20 [4] */
4220 IFN_SSI_SCK01239, 0, FN_MSIOF1_TXD_F, 0,
4224 /* IPSR14_19_16 [4] */
4225 IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,
4229 /* IPSR14_15_12 [4] */
4230 IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,
4234 /* IPSR14_11_8 [4] */
4235 IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,
4239 /* IPSR14_7_4 [4] */
4240 IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,
4241 FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,
4242 FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,
4244 /* IPSR14_3_0 [4] */
4245 IFN_MSIOF0_SS1, FN_RX5_A, FN_NFWPx_A, FN_AUDIO_CLKA_C,
4246 FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,
4247 FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,
4251 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
4252 4, 4, 4, 4, 4, 4, 4, 4) {
4253 /* IPSR15_31_28 [4] */
4254 IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,
4255 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,
4256 FN_RIF2_D1_A, 0, 0, 0,
4258 /* IPSR15_27_24 [4] */
4259 IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,
4260 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,
4261 FN_RIF2_SYNC_A, 0, 0, 0,
4263 /* IPSR15_23_20 [4] */
4264 IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,
4265 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,
4266 FN_RIF2_CLK_A, 0, 0, 0,
4268 /* IPSR15_19_16 [4] */
4269 IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,
4270 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,
4271 FN_RIF2_D0_A, 0, 0, 0,
4273 /* IPSR15_15_12 [4] */
4274 IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,
4275 0, 0, FN_STP_IVCXO27_0_A, 0,
4278 /* IPSR15_11_8 [4] */
4279 IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,
4280 0, 0, FN_STP_OPWM_0_A, 0,
4283 /* IPSR15_7_4 [4] */
4284 IFN_SSI_SDATA2_A, 0, 0, 0,
4285 FN_SSI_SCK1_B, 0, 0, FN_MOUT6,
4288 /* IPSR15_3_0 [4] */
4289 IFN_SSI_SDATA1_A, 0, 0, 0,
4295 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
4296 4, 4, 4, 4, 4, 4, 4, 4) {
4297 /* IPSR16_31_28 [4] */
4298 IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,
4299 FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5_A,
4302 /* IPSR16_27_24 [4] */
4303 IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,
4304 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,
4305 FN_RIF3_D1_A, 0, 0, 0,
4307 /* IPSR16_23_20 [4] */
4308 IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,
4309 0, FN_TS_SDEN1_A, FN_STP_ISEN_1_A, FN_RIF1_D0_A,
4310 FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,
4312 /* IPSR16_19_16 [4] */
4313 IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,
4314 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,
4315 FN_RIF3_SYNC_A, 0, 0, 0,
4317 /* IPSR16_15_12 [4] */
4318 IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,
4319 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,
4320 FN_RIF3_CLK_A, 0, 0, 0,
4322 /* IPSR16_11_8 [4] */
4323 IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,
4325 FN_SATA_DEVSLP_A, 0, 0, 0,
4327 /* IPSR16_7_4 [4] */
4328 IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,
4332 /* IPSR16_3_0 [4] */
4333 IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,
4339 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
4340 4, 4, 4, 4, 4, 4, 4, 4) {
4341 /* IPSR17_31_28 [4] */
4342 IFN_USB30_OVC, 0, 0, FN_AUDIO_CLKOUT1_B,
4343 FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, FN_STP_IVCXO27_0_E,
4344 FN_RIF3_D1_B, 0, FN_FSO_TOEx, FN_TPU0TO1,
4346 /* IPSR17_27_24 [4] */
4347 IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,
4348 FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,
4349 FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,
4350 FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,
4351 /* IPSR17_23_20 [4] */
4352 IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,
4353 FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,
4354 FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,
4355 0, FN_HCTS2x_C, 0, 0,
4356 /* IPSR17_19_16 [4] */
4357 IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,
4358 FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,
4359 FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,
4361 /* IPSR17_15_12 [4] */
4362 IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,
4363 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,
4364 FN_RIF3_SYNC_B, 0, 0, 0,
4366 /* IPSR17_11_8 [4] */
4367 IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,
4368 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,
4369 FN_RIF3_CLK_B, 0, 0, 0,
4370 0, FN_HSCK2_C, 0, 0,
4371 /* IPSR17_7_4 [4] */
4372 IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,
4373 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,
4374 0, 0, FN_TCLK1_A, 0,
4376 /* IPSR17_3_0 [4] */
4377 IFN_AUDIO_CLKA_A, 0, 0, 0,
4379 0, 0, 0, FN_CC5_OSCOUT,
4383 { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32,
4384 1, 1, 1, 1, 1, 1, 1, 1,
4385 1, 1, 1, 1, 1, 1, 1, 1,
4386 1, 1, 1, 1, 1, 1, 1, 1,
4388 /* reserved [31..24] */
4397 /* reserved [23..16] */
4406 /* reserved [15..8] */
4415 /* IPSR18_7_4 [4] */
4416 IFN_USB3_OVC, 0, 0, FN_AUDIO_CLKOUT3_B,
4417 FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,
4418 FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,
4419 FN_FMIN_C, FN_FMIN_D, 0, 0,
4420 /* IPSR18_3_0 [4] */
4421 IFN_USB3_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B,
4422 FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,
4423 FN_RIF2_D0_B, 0, 0, FN_TPU0TO2,
4424 FN_FMCLK_C, FN_FMCLK_D, 0, 0,
4427 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
4428 3, 2, 3, 1, 1, 1, 1, 1, 2, 1,
4429 1, 2, 1, 1, 1, 2, 2, 1, 2, 1, 1, 1) {
4431 /* sel_msiof3[3](0,1,2,3,4) */
4432 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
4433 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
4436 /* sel_msiof2[2](0,1,2,3) */
4437 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
4438 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
4439 /* sel_msiof1[3](0,1,2,3,4,5,6) */
4440 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
4441 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
4442 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
4444 /* sel_lbsc[1](0,1) */
4445 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
4446 /* sel_iebus[1](0,1) */
4447 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
4448 /* sel_i2c2[1](0,1) */
4449 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
4450 /* sel_i2c1[1](0,1) */
4451 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
4452 /* sel_hscif4[1](0,1) */
4453 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
4454 /* sel_hscif3[2](0,1,2,3) */
4455 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
4456 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
4457 /* sel_hscif1[1](0,1) */
4458 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
4461 /* sel_hscif2[2](0,1,2) */
4462 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
4464 /* sel_etheravb[1](0,1) */
4465 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
4466 /* sel_drif3[1](0,1) */
4467 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
4468 /* sel_drif2[1](0,1) */
4469 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
4470 /* sel_drif1[2](0,1,2) */
4471 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
4473 /* sel_drif0[2](0,1,2) */
4474 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
4476 /* sel_canfd0[1](0,1) */
4477 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
4478 /* sel_adg_a[2](0,1,2) */
4479 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
4487 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4490 2, 1, 1, 1, 1, 1, 1,
4491 1, 1, 1, 1, 1, 1, 1, 1) {
4492 /* sel_tsif1[2](0,1,2,3) */
4493 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
4494 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
4495 /* sel_tsif0[3](0,1,2,3,4) */
4496 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
4497 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
4500 /* sel_timer_tmu1[1](0,1) */
4501 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
4502 /* sel_ssp1_1[2](0,1,2,3) */
4503 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
4504 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
4505 /* sel_ssp1_0[3](0,1,2,3,4) */
4506 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
4507 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
4510 /* sel_ssi1[1](0,1) */
4511 FN_SEL_SSI_0, FN_SEL_SSI_1,
4512 /* sel_speed_pulse_if[1](0,1) */
4513 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
4514 /* sel_simcard[2](0,1,2,3) */
4515 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
4516 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
4517 /* sel_sdhi2[1](0,1) */
4518 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
4519 /* sel_scif4[2](0,1,2) */
4520 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
4522 /* sel_scif3[1](0,1) */
4523 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
4524 /* sel_scif2[1](0,1) */
4525 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
4526 /* sel_scif1[1](0,1) */
4527 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
4528 /* sel_scif[1](0,1) */
4529 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
4530 /* sel_remocon[1](0,1) */
4531 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
4532 /* reserved[8..7] */
4535 /* sel_rcan0[1](0,1) */
4536 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
4537 /* sel_pwm6[1](0,1) */
4538 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
4539 /* sel_pwm5[1](0,1) */
4540 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
4541 /* sel_pwm4[1](0,1) */
4542 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
4543 /* sel_pwm3[1](0,1) */
4544 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
4545 /* sel_pwm2[1](0,1) */
4546 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
4547 /* sel_pwm1[1](0,1) */
4548 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
4551 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,
4552 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1,
4553 1, 1, 1, 1, 1, 1, 1, 1,
4554 1, 1, 1, 1, 1, 1, 1, 1) {
4555 /* i2c_sel_5[1](0,1) */
4556 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
4557 /* i2c_sel_3[1](0,1) */
4558 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
4559 /* i2c_sel_0[1](0,1) */
4560 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
4561 /* sel_fm[2](0,1,2,3) */
4562 FN_SEL_FM_0, FN_SEL_FM_1,
4563 FN_SEL_FM_2, FN_SEL_FM_3,
4564 /* sel_scif5[1](0,1) */
4565 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
4566 /* sel_i2c6[3](0,1,2) */
4567 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
4569 /* sel_ndfc[1](0,1) */
4570 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
4571 /* sel_ssi2[1](0,1) */
4572 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
4573 /* sel_ssi9[1](0,1) */
4574 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
4575 /* sel_timer_tmu2[1](0,1) */
4576 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
4577 /* sel_adg_b[1](0,1) */
4578 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
4579 /* sel_adg_c[1](0,1) */
4580 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
4581 /* reserved[16..16] */
4583 /* reserved[15..8] */
4592 /* reserved[7..1] */
4600 /* sel_vin4[1](0,1) */
4601 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
4604 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
4623 GP_0_15_IN, GP_0_15_OUT,
4624 GP_0_14_IN, GP_0_14_OUT,
4625 GP_0_13_IN, GP_0_13_OUT,
4626 GP_0_12_IN, GP_0_12_OUT,
4627 GP_0_11_IN, GP_0_11_OUT,
4628 GP_0_10_IN, GP_0_10_OUT,
4629 GP_0_9_IN, GP_0_9_OUT,
4630 GP_0_8_IN, GP_0_8_OUT,
4631 GP_0_7_IN, GP_0_7_OUT,
4632 GP_0_6_IN, GP_0_6_OUT,
4633 GP_0_5_IN, GP_0_5_OUT,
4634 GP_0_4_IN, GP_0_4_OUT,
4635 GP_0_3_IN, GP_0_3_OUT,
4636 GP_0_2_IN, GP_0_2_OUT,
4637 GP_0_1_IN, GP_0_1_OUT,
4638 GP_0_0_IN, GP_0_0_OUT,
4641 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
4645 GP_1_28_IN, GP_1_28_OUT,
4646 GP_1_27_IN, GP_1_27_OUT,
4647 GP_1_26_IN, GP_1_26_OUT,
4648 GP_1_25_IN, GP_1_25_OUT,
4649 GP_1_24_IN, GP_1_24_OUT,
4650 GP_1_23_IN, GP_1_23_OUT,
4651 GP_1_22_IN, GP_1_22_OUT,
4652 GP_1_21_IN, GP_1_21_OUT,
4653 GP_1_20_IN, GP_1_20_OUT,
4654 GP_1_19_IN, GP_1_19_OUT,
4655 GP_1_18_IN, GP_1_18_OUT,
4656 GP_1_17_IN, GP_1_17_OUT,
4657 GP_1_16_IN, GP_1_16_OUT,
4658 GP_1_15_IN, GP_1_15_OUT,
4659 GP_1_14_IN, GP_1_14_OUT,
4660 GP_1_13_IN, GP_1_13_OUT,
4661 GP_1_12_IN, GP_1_12_OUT,
4662 GP_1_11_IN, GP_1_11_OUT,
4663 GP_1_10_IN, GP_1_10_OUT,
4664 GP_1_9_IN, GP_1_9_OUT,
4665 GP_1_8_IN, GP_1_8_OUT,
4666 GP_1_7_IN, GP_1_7_OUT,
4667 GP_1_6_IN, GP_1_6_OUT,
4668 GP_1_5_IN, GP_1_5_OUT,
4669 GP_1_4_IN, GP_1_4_OUT,
4670 GP_1_3_IN, GP_1_3_OUT,
4671 GP_1_2_IN, GP_1_2_OUT,
4672 GP_1_1_IN, GP_1_1_OUT,
4673 GP_1_0_IN, GP_1_0_OUT,
4676 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
4696 GP_2_14_IN, GP_2_14_OUT,
4697 GP_2_13_IN, GP_2_13_OUT,
4698 GP_2_12_IN, GP_2_12_OUT,
4699 GP_2_11_IN, GP_2_11_OUT,
4700 GP_2_10_IN, GP_2_10_OUT,
4701 GP_2_9_IN, GP_2_9_OUT,
4702 GP_2_8_IN, GP_2_8_OUT,
4703 GP_2_7_IN, GP_2_7_OUT,
4704 GP_2_6_IN, GP_2_6_OUT,
4705 GP_2_5_IN, GP_2_5_OUT,
4706 GP_2_4_IN, GP_2_4_OUT,
4707 GP_2_3_IN, GP_2_3_OUT,
4708 GP_2_2_IN, GP_2_2_OUT,
4709 GP_2_1_IN, GP_2_1_OUT,
4710 GP_2_0_IN, GP_2_0_OUT,
4713 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
4732 GP_3_15_IN, GP_3_15_OUT,
4733 GP_3_14_IN, GP_3_14_OUT,
4734 GP_3_13_IN, GP_3_13_OUT,
4735 GP_3_12_IN, GP_3_12_OUT,
4736 GP_3_11_IN, GP_3_11_OUT,
4737 GP_3_10_IN, GP_3_10_OUT,
4738 GP_3_9_IN, GP_3_9_OUT,
4739 GP_3_8_IN, GP_3_8_OUT,
4740 GP_3_7_IN, GP_3_7_OUT,
4741 GP_3_6_IN, GP_3_6_OUT,
4742 GP_3_5_IN, GP_3_5_OUT,
4743 GP_3_4_IN, GP_3_4_OUT,
4744 GP_3_3_IN, GP_3_3_OUT,
4745 GP_3_2_IN, GP_3_2_OUT,
4746 GP_3_1_IN, GP_3_1_OUT,
4747 GP_3_0_IN, GP_3_0_OUT,
4750 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
4766 GP_4_17_IN, GP_4_17_OUT,
4767 GP_4_16_IN, GP_4_16_OUT,
4769 GP_4_15_IN, GP_4_15_OUT,
4770 GP_4_14_IN, GP_4_14_OUT,
4771 GP_4_13_IN, GP_4_13_OUT,
4772 GP_4_12_IN, GP_4_12_OUT,
4773 GP_4_11_IN, GP_4_11_OUT,
4774 GP_4_10_IN, GP_4_10_OUT,
4775 GP_4_9_IN, GP_4_9_OUT,
4776 GP_4_8_IN, GP_4_8_OUT,
4777 GP_4_7_IN, GP_4_7_OUT,
4778 GP_4_6_IN, GP_4_6_OUT,
4779 GP_4_5_IN, GP_4_5_OUT,
4780 GP_4_4_IN, GP_4_4_OUT,
4781 GP_4_3_IN, GP_4_3_OUT,
4782 GP_4_2_IN, GP_4_2_OUT,
4783 GP_4_1_IN, GP_4_1_OUT,
4784 GP_4_0_IN, GP_4_0_OUT,
4787 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
4794 GP_5_25_IN, GP_5_25_OUT,
4795 GP_5_24_IN, GP_5_24_OUT,
4797 GP_5_23_IN, GP_5_23_OUT,
4798 GP_5_22_IN, GP_5_22_OUT,
4799 GP_5_21_IN, GP_5_21_OUT,
4800 GP_5_20_IN, GP_5_20_OUT,
4801 GP_5_19_IN, GP_5_19_OUT,
4802 GP_5_18_IN, GP_5_18_OUT,
4803 GP_5_17_IN, GP_5_17_OUT,
4804 GP_5_16_IN, GP_5_16_OUT,
4806 GP_5_15_IN, GP_5_15_OUT,
4807 GP_5_14_IN, GP_5_14_OUT,
4808 GP_5_13_IN, GP_5_13_OUT,
4809 GP_5_12_IN, GP_5_12_OUT,
4810 GP_5_11_IN, GP_5_11_OUT,
4811 GP_5_10_IN, GP_5_10_OUT,
4812 GP_5_9_IN, GP_5_9_OUT,
4813 GP_5_8_IN, GP_5_8_OUT,
4814 GP_5_7_IN, GP_5_7_OUT,
4815 GP_5_6_IN, GP_5_6_OUT,
4816 GP_5_5_IN, GP_5_5_OUT,
4817 GP_5_4_IN, GP_5_4_OUT,
4818 GP_5_3_IN, GP_5_3_OUT,
4819 GP_5_2_IN, GP_5_2_OUT,
4820 GP_5_1_IN, GP_5_1_OUT,
4821 GP_5_0_IN, GP_5_0_OUT,
4824 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
4828 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
4860 GP_6_3_IN, GP_6_3_OUT,
4861 GP_6_2_IN, GP_6_2_OUT,
4862 GP_6_1_IN, GP_6_1_OUT,
4863 GP_6_0_IN, GP_6_0_OUT,
4869 static struct pinmux_data_reg pinmux_data_regs[] = {
4870 /* use OUTDT registers? */
4871 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
4872 0, 0, 0, 0, 0, 0, 0, 0,
4873 0, 0, 0, 0, 0, 0, 0, 0,
4874 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
4875 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
4876 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
4877 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
4879 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
4880 0, 0, 0, GP_1_28_DATA,
4881 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
4882 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
4883 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
4884 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
4885 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
4886 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
4887 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
4889 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
4890 0, 0, 0, 0, 0, 0, 0, 0,
4891 0, 0, 0, 0, 0, 0, 0, 0,
4892 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
4893 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
4894 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
4895 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
4897 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
4898 0, 0, 0, 0, 0, 0, 0, 0,
4899 0, 0, 0, 0, 0, 0, 0, 0,
4900 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
4901 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
4902 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
4903 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
4905 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
4906 0, 0, 0, 0, 0, 0, 0, 0,
4907 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,
4908 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
4909 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
4910 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
4911 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
4913 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
4915 0, 0, GP_5_25_DATA, GP_5_24_DATA,
4916 GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
4917 GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
4918 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
4919 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
4920 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
4921 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
4923 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
4926 { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
4927 0, 0, 0, 0, 0, 0, 0, 0,
4928 0, 0, 0, 0, 0, 0, 0, 0,
4929 0, 0, 0, 0, 0, 0, 0, 0,
4931 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
4937 static struct pinmux_info r8a7795_pinmux_info = {
4938 .name = "r8a7795_pfc",
4940 .unlock_reg = 0xe6060000, /* PMMR */
4942 .reserved_id = PINMUX_RESERVED,
4943 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
4944 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
4945 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
4946 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
4947 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
4949 .first_gpio = GPIO_GP_0_0,
4950 .last_gpio = GPIO_FN_FMIN_D,
4952 .gpios = pinmux_gpios,
4953 .cfg_regs = pinmux_config_regs,
4954 .data_regs = pinmux_data_regs,
4956 .gpio_data = pinmux_data,
4957 .gpio_data_size = ARRAY_SIZE(pinmux_data),
4960 void r8a7795_pinmux_init(void)
4962 register_pinmux(&r8a7795_pinmux_info);