2 * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c
3 * This file is r8a7795 processor support - PFC hardware block.
5 * Copyright (C) 2015 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CPU_32_PORT(fn, pfx, sfx) \
15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
17 PORT_1(fn, pfx##31, sfx)
19 #define CPU_32_PORT1(fn, pfx, sfx) \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
21 PORT_10(fn, pfx##2, sfx)
23 #define CPU_32_PORT2(fn, pfx, sfx) \
24 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx##2, sfx)
27 #define CPU_32_PORT_28(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_1(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##21, sfx), \
32 PORT_1(fn, pfx##22, sfx), \
33 PORT_1(fn, pfx##23, sfx), \
34 PORT_1(fn, pfx##24, sfx), \
35 PORT_1(fn, pfx##25, sfx), \
36 PORT_1(fn, pfx##26, sfx), \
37 PORT_1(fn, pfx##27, sfx)
39 #define CPU_32_PORT_26(fn, pfx, sfx) \
40 PORT_10(fn, pfx, sfx), \
41 PORT_10(fn, pfx##1, sfx), \
42 PORT_1(fn, pfx##20, sfx), \
43 PORT_1(fn, pfx##21, sfx), \
44 PORT_1(fn, pfx##22, sfx), \
45 PORT_1(fn, pfx##23, sfx), \
46 PORT_1(fn, pfx##24, sfx), \
47 PORT_1(fn, pfx##25, sfx)
49 #define CPU_32_PORT_18(fn, pfx, sfx) \
50 PORT_10(fn, pfx, sfx), \
51 PORT_1(fn, pfx##10, sfx), \
52 PORT_1(fn, pfx##11, sfx), \
53 PORT_1(fn, pfx##12, sfx), \
54 PORT_1(fn, pfx##13, sfx), \
55 PORT_1(fn, pfx##14, sfx), \
56 PORT_1(fn, pfx##15, sfx), \
57 PORT_1(fn, pfx##16, sfx), \
58 PORT_1(fn, pfx##17, sfx)
60 #define CPU_32_PORT_16(fn, pfx, sfx) \
61 PORT_10(fn, pfx, sfx), \
62 PORT_1(fn, pfx##10, sfx), \
63 PORT_1(fn, pfx##11, sfx), \
64 PORT_1(fn, pfx##12, sfx), \
65 PORT_1(fn, pfx##13, sfx), \
66 PORT_1(fn, pfx##14, sfx), \
67 PORT_1(fn, pfx##15, sfx)
69 #define CPU_32_PORT_15(fn, pfx, sfx) \
70 PORT_10(fn, pfx, sfx), \
71 PORT_1(fn, pfx##10, sfx), \
72 PORT_1(fn, pfx##11, sfx), \
73 PORT_1(fn, pfx##12, sfx), \
74 PORT_1(fn, pfx##13, sfx), \
75 PORT_1(fn, pfx##14, sfx)
77 #define CPU_32_PORT_4(fn, pfx, sfx) \
78 PORT_1(fn, pfx##0, sfx), \
79 PORT_1(fn, pfx##1, sfx), \
80 PORT_1(fn, pfx##2, sfx), \
81 PORT_1(fn, pfx##3, sfx)
85 /* GP_0_0_DATA -> GP_7_4_DATA */
86 /* except for GP0[16] - [31],
94 #define CPU_ALL_PORT(fn, pfx, sfx) \
95 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
96 CPU_32_PORT_28(fn, pfx##_1_, sfx), \
97 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
98 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
99 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
100 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
101 CPU_32_PORT(fn, pfx##_6_, sfx), \
102 CPU_32_PORT_4(fn, pfx##_7_, sfx)
104 #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
105 #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
106 GP##pfx##_IN, GP##pfx##_OUT)
108 #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
109 #define _GP_INDT(pfx, sfx) GP##pfx##_DATA
111 #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
112 #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
113 #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
116 #define PORT_10_REV(fn, pfx, sfx) \
117 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
118 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
119 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
120 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
121 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
123 #define CPU_32_PORT_REV(fn, pfx, sfx) \
124 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
125 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
126 PORT_10_REV(fn, pfx, sfx)
128 #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
129 #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
131 #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
132 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
150 PINMUX_FUNCTION_BEGIN,
202 GFN_AVB_AVTP_CAPTURE_A,
203 GFN_AVB_AVTP_MATCH_A,
336 IFN_AVB_AVTP_MATCH_A,
339 IFN_AVB_AVTP_CAPTURE_A,
358 FN_DU_EXODDF_DU_ODDF_DISP_CDE,
370 FN_DU_EXHSYNC_DU_HSYNC,
376 FN_DU_EXVSYNC_DU_VSYNC,
471 FN_AVB_AVTP_CAPTURE_B,
1075 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
1076 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
1077 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
1078 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
1079 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
1080 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
1081 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
1083 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
1084 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
1085 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
1087 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
1088 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
1089 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
1090 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
1091 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
1092 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
1093 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
1095 FN_SEL_FM_0, FN_SEL_FM_1,
1096 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
1097 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
1098 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
1099 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
1101 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
1103 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
1104 FN_SEL_ADG_0, FN_SEL_ADG_1,
1105 FN_SEL_ADG_2, FN_SEL_ADG_3,
1106 FN_SEL_5LINE_0, FN_SEL_5LINE_1,
1131 FN_SEL_SPEED_PULSE_IF_0,
1132 FN_SEL_SPEED_PULSE_IF_1,
1184 PINMUX_FUNCTION_END,
1237 AVB_AVTP_CAPTURE_A_GMARK,
1238 AVB_AVTP_MATCH_A_GMARK,
1371 AVB_AVTP_MATCH_A_IMARK,
1374 AVB_AVTP_CAPTURE_A_IMARK,
1393 DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
1405 DU_EXHSYNC_DU_HSYNC_MARK,
1411 DU_EXVSYNC_DU_VSYNC_MARK,
1487 AVB_AVTP_MATCH_B_MARK,
1506 AVB_AVTP_CAPTURE_B_MARK,
1692 STP_IVCXO27_0_B_MARK,
1700 STP_ISSYNC_0_B_MARK,
1718 STP_IVCXO27_1_B_MARK,
1730 STP_ISSYNC_1_B_MARK,
1795 STP_ISSYNC_0_C_MARK,
1801 STP_ISSYNC_1_C_MARK,
1803 AUDIO_CLKOUT_C_MARK,
1810 STP_IVCXO27_1_C_MARK,
1887 STP_ISSYNC_0_D_MARK,
1889 AUDIO_CLKOUT1_A_MARK,
1895 STP_IVCXO27_0_D_MARK,
1897 AUDIO_CLKOUT2_A_MARK,
1899 AUDIO_CLKOUT_A_MARK,
1907 STP_IVCXO27_0_C_MARK,
1908 AUDIO_CLKOUT3_A_MARK,
1917 AUDIO_CLKOUT_D_MARK,
1951 STP_IVCXO27_0_A_MARK,
1977 STP_ISSYNC_0_A_MARK,
2018 STP_ISSYNC_1_A_MARK,
2027 STP_IVCXO27_1_A_MARK,
2036 STP_IVCXO27_1_D_MARK,
2073 AUDIO_CLKOUT_B_MARK,
2083 AUDIO_CLKOUT1_B_MARK,
2086 STP_ISSYNC_1_D_MARK,
2087 STP_IVCXO27_0_E_MARK,
2095 AUDIO_CLKOUT2_B_MARK,
2102 AUDIO_CLKOUT3_B_MARK,
2105 STP_ISSYNC_0_E_MARK,
2112 static pinmux_enum_t pinmux_data[] = {
2113 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
2116 PINMUX_DATA(D15_GMARK, GFN_D15),
2117 PINMUX_DATA(D14_GMARK, GFN_D14),
2118 PINMUX_DATA(D13_GMARK, GFN_D13),
2119 PINMUX_DATA(D12_GMARK, GFN_D12),
2120 PINMUX_DATA(D11_GMARK, GFN_D11),
2121 PINMUX_DATA(D10_GMARK, GFN_D10),
2122 PINMUX_DATA(D9_GMARK, GFN_D9),
2123 PINMUX_DATA(D8_GMARK, GFN_D8),
2124 PINMUX_DATA(D7_GMARK, GFN_D7),
2125 PINMUX_DATA(D6_GMARK, GFN_D6),
2126 PINMUX_DATA(D5_GMARK, GFN_D5),
2127 PINMUX_DATA(D4_GMARK, GFN_D4),
2128 PINMUX_DATA(D3_GMARK, GFN_D3),
2129 PINMUX_DATA(D2_GMARK, GFN_D2),
2130 PINMUX_DATA(D1_GMARK, GFN_D1),
2131 PINMUX_DATA(D0_GMARK, GFN_D0),
2134 PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),
2135 PINMUX_DATA(WE1x_GMARK, GFN_WE1x),
2136 PINMUX_DATA(WE0x_GMARK, GFN_WE0x),
2137 PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),
2138 PINMUX_DATA(RDx_GMARK, GFN_RDx),
2139 PINMUX_DATA(BSx_GMARK, GFN_BSx),
2140 PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),
2141 PINMUX_DATA(CS0x_GMARK, GFN_CS0x),
2142 PINMUX_DATA(A19_GMARK, GFN_A19),
2143 PINMUX_DATA(A18_GMARK, GFN_A18),
2144 PINMUX_DATA(A17_GMARK, GFN_A17),
2145 PINMUX_DATA(A16_GMARK, GFN_A16),
2146 PINMUX_DATA(A15_GMARK, GFN_A15),
2147 PINMUX_DATA(A14_GMARK, GFN_A14),
2148 PINMUX_DATA(A13_GMARK, GFN_A13),
2149 PINMUX_DATA(A12_GMARK, GFN_A12),
2150 PINMUX_DATA(A11_GMARK, GFN_A11),
2151 PINMUX_DATA(A10_GMARK, GFN_A10),
2152 PINMUX_DATA(A9_GMARK, GFN_A9),
2153 PINMUX_DATA(A8_GMARK, GFN_A8),
2154 PINMUX_DATA(A7_GMARK, GFN_A7),
2155 PINMUX_DATA(A6_GMARK, GFN_A6),
2156 PINMUX_DATA(A5_GMARK, GFN_A5),
2157 PINMUX_DATA(A4_GMARK, GFN_A4),
2158 PINMUX_DATA(A3_GMARK, GFN_A3),
2159 PINMUX_DATA(A2_GMARK, GFN_A2),
2160 PINMUX_DATA(A1_GMARK, GFN_A1),
2161 PINMUX_DATA(A0_GMARK, GFN_A0),
2164 PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),
2165 PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),
2166 PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),
2167 PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),
2168 PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),
2169 PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),
2170 PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),
2171 PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),
2172 PINMUX_DATA(PWM0_GMARK, GFN_PWM0),
2173 PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),
2174 PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),
2175 PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),
2176 PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),
2177 PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),
2178 PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),
2181 PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),
2182 PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),
2183 PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),
2184 PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),
2185 PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),
2186 PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),
2187 PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),
2188 PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),
2189 PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),
2190 PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),
2191 PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),
2192 PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),
2193 PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),
2194 PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),
2195 PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),
2196 PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),
2199 PINMUX_DATA(SD3_DS_MARK, FN_SD3_DS),
2200 PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),
2201 PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),
2202 PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),
2203 PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),
2204 PINMUX_DATA(SD3_DAT3_MARK, FN_SD3_DAT3),
2205 PINMUX_DATA(SD3_DAT2_MARK, FN_SD3_DAT2),
2206 PINMUX_DATA(SD3_DAT1_MARK, FN_SD3_DAT1),
2207 PINMUX_DATA(SD3_DAT0_MARK, FN_SD3_DAT0),
2208 PINMUX_DATA(SD3_CMD_MARK, FN_SD3_CMD),
2209 PINMUX_DATA(SD3_CLK_MARK, FN_SD3_CLK),
2210 PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),
2211 PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),
2212 PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),
2213 PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),
2214 PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),
2215 PINMUX_DATA(SD2_CMD_MARK, FN_SD2_CMD),
2216 PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),
2219 PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),
2220 PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),
2221 PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),
2222 PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),
2223 PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),
2224 PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),
2225 PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),
2226 PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),
2227 PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),
2228 PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),
2229 PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),
2230 PINMUX_DATA(HTX0_GMARK, GFN_HTX0),
2231 PINMUX_DATA(HRX0_GMARK, GFN_HRX0),
2232 PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),
2233 PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),
2234 PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),
2235 PINMUX_DATA(SCK2_GMARK, GFN_SCK2),
2236 PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),
2237 PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),
2238 PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),
2239 PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),
2240 PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),
2241 PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),
2242 PINMUX_DATA(TX0_GMARK, GFN_TX0),
2243 PINMUX_DATA(RX0_GMARK, GFN_RX0),
2244 PINMUX_DATA(SCK0_GMARK, GFN_SCK0),
2247 PINMUX_DATA(USB31_OVC_GMARK, GFN_USB31_OVC),
2248 PINMUX_DATA(USB31_PWEN_GMARK, GFN_USB31_PWEN),
2249 PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),
2250 PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),
2251 PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),
2252 PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),
2253 PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),
2254 PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),
2255 PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),
2256 PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),
2257 PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),
2258 PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),
2259 PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),
2260 PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),
2261 PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),
2262 PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),
2263 PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),
2264 PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),
2265 PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),
2266 PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),
2267 PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),
2268 PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),
2269 PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),
2270 PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),
2271 PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),
2272 PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),
2273 PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),
2274 PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),
2275 PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),
2276 PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),
2277 PINMUX_DATA(SSI_WS0129_GMARK, GFN_SSI_WS0129),
2278 PINMUX_DATA(SSI_SCK0129_GMARK, GFN_SSI_SCK0129),
2281 PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),
2282 PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),
2283 PINMUX_DATA(AVS2_MARK, FN_AVS2),
2284 PINMUX_DATA(AVS1_MARK, FN_AVS1),
2286 /* ipsr setting .. underconstruction */
2289 static struct pinmux_gpio pinmux_gpios[] = {
2290 PINMUX_GPIO_GP_ALL(),
2309 GPIO_GFN(EX_WAIT0_A),
2339 GPIO_GFN(AVB_AVTP_CAPTURE_A),
2340 GPIO_GFN(AVB_AVTP_MATCH_A),
2342 GPIO_GFN(AVB_PHY_INT),
2343 GPIO_GFN(AVB_MAGIC),
2397 GPIO_FN(MSIOF0_RXD),
2398 GPIO_GFN(MSIOF0_SS2),
2399 GPIO_FN(MSIOF0_TXD),
2400 GPIO_GFN(MSIOF0_SS1),
2401 GPIO_GFN(MSIOF0_SYNC),
2402 GPIO_FN(MSIOF0_SCK),
2411 GPIO_GFN(RTS1x_TANS),
2415 GPIO_GFN(RTS0x_TANS),
2422 GPIO_GFN(USB31_OVC),
2423 GPIO_GFN(USB31_PWEN),
2424 GPIO_GFN(USB30_OVC),
2425 GPIO_GFN(USB30_PWEN),
2427 GPIO_GFN(USB1_PWEN),
2429 GPIO_GFN(USB0_PWEN),
2430 GPIO_GFN(AUDIO_CLKB_B),
2431 GPIO_GFN(AUDIO_CLKA_A),
2432 GPIO_GFN(SSI_SDATA9_A),
2433 GPIO_GFN(SSI_SDATA8),
2434 GPIO_GFN(SSI_SDATA7),
2436 GPIO_GFN(SSI_SCK78),
2437 GPIO_GFN(SSI_SDATA6),
2440 GPIO_FN(SSI_SDATA5),
2443 GPIO_GFN(SSI_SDATA4),
2446 GPIO_GFN(SSI_SDATA3),
2448 GPIO_GFN(SSI_SCK34),
2449 GPIO_GFN(SSI_SDATA2_A),
2450 GPIO_GFN(SSI_SDATA1_A),
2451 GPIO_GFN(SSI_SDATA0),
2452 GPIO_GFN(SSI_WS0129),
2453 GPIO_GFN(SSI_SCK0129),
2463 GPIO_FN(MSIOF2_SS2_C),
2464 GPIO_IFN(AVB_MAGIC),
2465 GPIO_FN(MSIOF2_S1_C),
2467 GPIO_IFN(AVB_PHY_INT),
2468 GPIO_FN(MSIOF2_SYNC_C),
2471 GPIO_FN(MSIOF2_SCK_C),
2473 GPIO_IFN(AVB_AVTP_MATCH_A),
2474 GPIO_FN(MSIOF2_RXD_C),
2476 GPIO_IFN(AVB_AVTP_CAPTURE_A),
2477 GPIO_FN(MSIOF2_TXD_C),
2478 GPIO_FN(RTS4x_TANS_A),
2482 GPIO_FN(VI4_DATA0_B),
2484 GPIO_FN(CANFD0_TX_B),
2488 GPIO_FN(VI4_DATA1_B),
2490 GPIO_FN(CANFD0_RX_B),
2495 GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),
2496 GPIO_FN(VI4_DATA2_B),
2501 GPIO_FN(DU_DOTCLKOUT1),
2502 GPIO_FN(VI4_DATA3_B),
2507 GPIO_FN(DU_EXHSYNC_DU_HSYNC),
2508 GPIO_FN(VI4_DATA4_B),
2513 GPIO_FN(DU_EXVSYNC_DU_VSYNC),
2514 GPIO_FN(VI4_DATA5_B),
2517 GPIO_FN(AVB_AVTP_PPS),
2519 GPIO_FN(VI4_DATA6_B),
2524 GPIO_FN(VI4_DATA7_B),
2533 GPIO_FN(MSIOF3_SYNC_B),
2541 GPIO_FN(MSIOF3_TXD_B),
2547 GPIO_FN(MSIOF3_SCK_B),
2548 GPIO_FN(VI4_DATA10),
2553 GPIO_FN(MSIOF3_RXD_B),
2554 GPIO_FN(VI4_DATA11),
2559 GPIO_FN(MSIOF3_SS1_B),
2560 GPIO_FN(VI4_DATA12),
2561 GPIO_FN(VI5_DATA12),
2565 GPIO_FN(MSIOF3_SS2_B),
2567 GPIO_FN(VI4_DATA13),
2568 GPIO_FN(VI5_DATA13),
2572 GPIO_FN(MSIOF2_SS1_A),
2574 GPIO_FN(VI4_DATA14),
2575 GPIO_FN(VI5_DATA14),
2579 GPIO_FN(MSIOF2_SS2_A),
2581 GPIO_FN(VI4_DATA15),
2582 GPIO_FN(V15_DATA15),
2586 GPIO_FN(MSIOF2_SYNC_A),
2589 GPIO_FN(AVB_AVTP_MATCH_B),
2594 GPIO_FN(MSIOF2_SCK_A),
2596 GPIO_FN(VI5_VSYNCx),
2598 GPIO_FN(MSIOF2_RXD_A),
2599 GPIO_FN(RTS4n_TANS_B),
2600 GPIO_FN(VI5_HSYNCx),
2603 GPIO_FN(MSIOF2_TXD_A),
2608 GPIO_FN(AVB_AVTP_CAPTURE_B),
2613 GPIO_FN(MSIOF3_SCK_C),
2619 GPIO_FN(MSIOF3_SYNC_C),
2625 GPIO_FN(MSIOF3_RXD_C),
2627 GPIO_FN(VI5_DATA10),
2631 GPIO_FN(MSIOF3_TXD_C),
2633 GPIO_FN(VI5_DATA11),
2643 GPIO_FN(VI4_VSYNCx),
2647 GPIO_FN(VI4_HSYNCx),
2651 GPIO_FN(VI4_CLKENB),
2654 GPIO_FN(VI5_CLKENB),
2657 GPIO_FN(EX_WAIT0_B),
2660 GPIO_FN(MSIOF3_SCK_D),
2667 GPIO_FN(MSIOF3_SYNC_D),
2671 GPIO_FN(CANFD0_TX_A),
2673 GPIO_FN(MSIOF3_RXD_D),
2677 GPIO_FN(CANFD0_RX_A),
2681 GPIO_FN(MSIIOF3_TXD_D),
2688 GPIO_FN(MSIOF3_SS1_D),
2689 GPIO_FN(RTS3x_TANS),
2695 GPIO_IFN(EX_WAIT0_A),
2698 GPIO_FN(DU_DOTCLKOUT0),
2700 GPIO_FN(MSIOF2_SS1_B),
2701 GPIO_FN(MSIOF3_SCK_A),
2702 GPIO_FN(VI4_DATA16),
2705 GPIO_FN(MSIOF2_SS2_B),
2706 GPIO_FN(MSIOF3_SYNC_A),
2707 GPIO_FN(VI4_DATA17),
2710 GPIO_FN(MSIOF3_RXD_A),
2711 GPIO_FN(VI4_DATA18),
2714 GPIO_FN(MSIOF3_TXD_A),
2715 GPIO_FN(VI4_DATA19),
2718 GPIO_FN(MSIOF2_SCK_B),
2719 GPIO_FN(VI4_DATA20),
2724 GPIO_FN(MSIOF2_SYNC_B),
2725 GPIO_FN(VI4_DATA21),
2728 GPIO_FN(MSIOF2_RXD_B),
2729 GPIO_FN(VI4_DATA22),
2732 GPIO_FN(MSIOF2_TXD_B),
2733 GPIO_FN(VI4_DATA23),
2737 GPIO_FN(MSIOF2_SCK_D),
2739 GPIO_FN(VI4_DATA0_A),
2743 GPIO_FN(MSIOF2_SYNC_D),
2744 GPIO_FN(VI4_DATA1_A),
2748 GPIO_FN(MSIOF2_RXD_D),
2750 GPIO_FN(VI4_DATA2_A),
2755 GPIO_FN(MSIOF2_TXD_D),
2757 GPIO_FN(VI4_DATA3_A),
2758 GPIO_FN(RTS4x_TANS_C),
2762 GPIO_FN(MSIOF2_SS1_D),
2764 GPIO_FN(VI4_DATA4_A),
2770 GPIO_FN(MSIOF2_SS2_D),
2772 GPIO_FN(VI4_DATA5_A),
2776 GPIO_FN(MSIOF3_SS1_A),
2778 GPIO_FN(VI4_DATA6_A),
2783 GPIO_FN(MSIOF3_SS2_A),
2785 GPIO_FN(VI4_DATA7_A),
2790 GPIO_FN(MSIOF1_SCK_E),
2791 GPIO_FN(STP_OPWM_0_B),
2793 GPIO_FN(MSIOF1_SYNC_E),
2794 GPIO_FN(STP_IVCXO27_0_B),
2796 GPIO_FN(MSIOF1_RXD_E),
2798 GPIO_FN(STP_ISCLK_0_B),
2800 GPIO_FN(MSIOF1_TXD_E),
2801 GPIO_FN(TS_SPSYNC0_B),
2802 GPIO_FN(STP_ISSYNC_0_B),
2806 GPIO_FN(MSIOF1_SS1_E),
2807 GPIO_FN(TS_SDAT0_B),
2808 GPIO_FN(STP_ISD_0_B),
2810 GPIO_FN(MSIOF1_SS2_E),
2811 GPIO_FN(TS_SDEN0_B),
2812 GPIO_FN(STP_ISEN_0_B),
2814 GPIO_FN(MSIOF1_SCK_G),
2815 GPIO_FN(SIM0_CLK_A),
2818 GPIO_FN(MSIOF1_SYNC_G),
2820 GPIO_FN(STP_IVCXO27_1_B),
2824 GPIO_FN(MSIOF1_RXD_G),
2826 GPIO_FN(STP_ISCLK_1_B),
2830 GPIO_FN(MSIOF1_TXD_G),
2831 GPIO_FN(TS_SPSYNC1_B),
2832 GPIO_FN(STP_ISSYNC_1_B),
2836 GPIO_FN(MSIOF1_SS1_G),
2837 GPIO_FN(TS_SDAT1_B),
2838 GPIO_FN(STP_IOD_1_B),
2841 GPIO_FN(MSIOF1_SS2_G),
2842 GPIO_FN(TS_SDEN1_B),
2843 GPIO_FN(STP_ISEN_1_B),
2857 GPIO_FN(SATA_DEVSLP_B),
2871 GPIO_FN(SIM0_RST_A),
2875 GPIO_FN(SIM0_CLK_B),
2880 GPIO_FN(MSIOF1_SS2_B),
2881 GPIO_FN(AUDIO_CLKC_B),
2883 GPIO_FN(SIM0_RST_B),
2884 GPIO_FN(STP_OPWM__C),
2885 GPIO_FN(RIF0_CLK_B),
2890 GPIO_FN(STP_ISCLK_0_C),
2896 GPIO_FN(TS_SPSYNC0_C),
2897 GPIO_FN(STP_ISSYNC_0_C),
2901 GPIO_FN(MSIOF1_SYNC_B),
2902 GPIO_FN(TS_SPSYNC1_C),
2903 GPIO_FN(STP_ISSYNC_1_C),
2904 GPIO_FN(RIF1_SYNC_B),
2905 GPIO_FN(AUDIO_CLKOUT_C),
2906 GPIO_FN(ADICS_SAMP),
2907 GPIO_IFN(RTS0x_TANS),
2909 GPIO_FN(MSIOF1_SS1_B),
2910 GPIO_FN(AUDIO_CLKA_B),
2912 GPIO_FN(STP_IVCXO27_1_C),
2913 GPIO_FN(RIF0_SYNC_B),
2917 GPIO_FN(TS_SDAT0_C),
2918 GPIO_FN(STP_IDS_0_C),
2919 GPIO_FN(RIF1_CLK_C),
2922 GPIO_FN(TS_SDEN0_C),
2923 GPIO_FN(STP_ISEN_0_C),
2927 GPIO_FN(MSIOF1_RXD_B),
2928 GPIO_FN(TS_SDEN1_C),
2929 GPIO_FN(STP_ISEN_1_C),
2932 GPIO_IFN(RTS1x_TANS),
2934 GPIO_FN(MSIOF1_TXD_B),
2935 GPIO_FN(TS_SDAT1_C),
2936 GPIO_FN(STP_ISD_1_C),
2940 GPIO_FN(SCIF_CLK_B),
2941 GPIO_FN(MSIOF1_SCK_B),
2943 GPIO_FN(STP_ISCLK_1_C),
2944 GPIO_FN(RIF1_CLK_B),
2954 GPIO_FN(FSO_CFE_0_B),
2958 GPIO_FN(RDS_DATA_B),
2960 GPIO_FN(RIF1_SYNC_C),
2961 GPIO_FN(FSO_CEF_1_B),
2963 GPIO_FN(MSIOF1_SCK_D),
2964 GPIO_FN(AUDIO_CLKB_A),
2965 GPIO_FN(SSI_SDATA1_B),
2967 GPIO_FN(STP_ISCLK_0_D),
2968 GPIO_FN(RIF0_CLK_C),
2971 GPIO_FN(MSIOF1_RXD_D),
2972 GPIO_FN(SS1_SDATA2_B),
2973 GPIO_FN(TS_SDEN0_D),
2974 GPIO_FN(STP_ISEN_0_D),
2978 GPIO_FN(MSIOF1_TXD_D),
2979 GPIO_FN(SSI_SDATA9_B),
2980 GPIO_FN(TS_SDAT0_D),
2981 GPIO_FN(STP_ISD_0_D),
2986 GPIO_FN(MSIOF1_SYNC_D),
2987 GPIO_FN(SSI_SCK9_A),
2988 GPIO_FN(TS_SPSYNC0_D),
2989 GPIO_FN(STP_ISSYNC_0_D),
2990 GPIO_FN(RIF0_SYNC_C),
2991 GPIO_FN(AUDIO_CLKOUT1_A),
2995 GPIO_FN(MSIOF1_SS1_D),
2997 GPIO_FN(STP_IVCXO27_0_D),
2999 GPIO_FN(AUDIO_CLKOUT2_A),
3000 GPIO_IFN(MSIOF0_SYNC),
3001 GPIO_FN(AUDIO_CLKOUT_A),
3004 GPIO_IFN(MSIOF0_SS1),
3006 GPIO_FN(AUDIO_CLKA_C),
3007 GPIO_FN(SSI_SCK2_A),
3009 GPIO_FN(STP_IVCXO27_0_C),
3010 GPIO_FN(AUDIO_CLKOUT3_A),
3012 GPIO_IFN(MSIOF0_SS2),
3014 GPIO_FN(MSIOF1_SS2_D),
3015 GPIO_FN(AUDIO_CLKC_A),
3017 GPIO_FN(RDS_DATA_A),
3018 GPIO_FN(STP_OPWM_0_D),
3019 GPIO_FN(AUDIO_CLKOUT_D),
3022 GPIO_FN(MSIOF1_SCK_F),
3026 GPIO_FN(MSIOF1_SYNC_F),
3030 GPIO_FN(MSIOF1_RXD_F),
3031 GPIO_IFN(SSI_SCK0129),
3032 GPIO_FN(MSIOF1_TXD_F),
3034 GPIO_IFN(SSI_WS0129),
3035 GPIO_FN(MSIOF1_SS1_F),
3037 GPIO_IFN(SSI_SDATA0),
3038 GPIO_FN(MSIOF1_SS2_F),
3042 GPIO_IFN(SSI_SDATA1_A),
3044 GPIO_IFN(SSI_SDATA2_A),
3045 GPIO_FN(SSI_SCK1_B),
3047 GPIO_IFN(SSI_SCK34),
3048 GPIO_FN(MSIOF1_SS1_A),
3049 GPIO_FN(STP_OPWM_0_A),
3052 GPIO_FN(MSIOF1_SS2_A),
3053 GPIO_FN(STP_IVCXO27_0_A),
3054 GPIO_IFN(SSI_SDATA3),
3056 GPIO_FN(MSIOF1_TXD_A),
3058 GPIO_FN(STP_ISCLK_0_A),
3063 GPIO_FN(MSIOF1_SCK_A),
3064 GPIO_FN(TS_SDAT0_A),
3065 GPIO_FN(STP_ISD_0_A),
3066 GPIO_FN(RIF0_CLK_A),
3067 GPIO_FN(RIF2_CLK_A),
3070 GPIO_FN(MSIOF1_SYNC_A),
3071 GPIO_FN(TS_SDEN0_A),
3072 GPIO_FN(STP_ISEN_0_A),
3073 GPIO_FN(RIF0_SYNC_A),
3074 GPIO_FN(RIF2_SYNC_A),
3075 GPIO_IFN(SSI_SDATA4),
3077 GPIO_FN(MSIOF1_RXD_A),
3078 GPIO_FN(TS_SPSYNC0_A),
3079 GPIO_FN(STP_ISSYNC_0_A),
3085 GPIO_FN(SIM0_RST_D),
3090 GPIO_IFN(SSI_SDATA6),
3091 GPIO_FN(SIM0_CLK_D),
3092 GPIO_FN(RSD_DATA_C),
3093 GPIO_FN(SATA_DEVSLP_A),
3094 GPIO_IFN(SSI_SCK78),
3096 GPIO_FN(MSIOF1_SCK_C),
3098 GPIO_FN(STP_ISCLK_1_A),
3099 GPIO_FN(RIF1_CLK_A),
3100 GPIO_FN(RIF3_CLK_A),
3103 GPIO_FN(MSIOF1_SYNC_C),
3105 GPIO_FN(STP_ISD_1_A),
3106 GPIO_FN(RIF1_SYNC_A),
3107 GPIO_FN(RIF3_SYNC_A),
3108 GPIO_IFN(SSI_SDATA7),
3110 GPIO_FN(MSIOF1_RXD_C),
3111 GPIO_FN(TS_SDEN1_A),
3112 GPIO_FN(STP_IEN_1_A),
3116 GPIO_IFN(SSI_SDATA8),
3118 GPIO_FN(MSIOF1_TXD_C),
3119 GPIO_FN(TS_SPSYNC1_A),
3120 GPIO_FN(STP_ISSYNC_1_A),
3123 GPIO_IFN(SSI_SDATA9_A),
3125 GPIO_FN(MSIOF1_SS1_C),
3129 GPIO_FN(STP_IVCXO27_1_A),
3133 GPIO_IFN(AUDIO_CLKA_A),
3134 GPIO_FN(CC5_OSCOUT),
3135 GPIO_IFN(AUDIO_CLKB_B),
3136 GPIO_FN(SCIF_CLK_A),
3138 GPIO_FN(STP_IVCXO27_1_D),
3142 GPIO_IFN(USB0_PWEN),
3143 GPIO_FN(SIM0_RST_C),
3145 GPIO_FN(STP_ISCLK_1_D),
3147 GPIO_FN(RIF3_CLK_B),
3151 GPIO_FN(TS_SDAT1_D),
3152 GPIO_FN(STP_ISD_1_D),
3153 GPIO_FN(RIF3_SYNC_B),
3155 GPIO_IFN(USB1_PWEN),
3156 GPIO_FN(SIM0_CLK_C),
3157 GPIO_FN(SSI_SCK1_A),
3159 GPIO_FN(STP_ISCLK_0_E),
3161 GPIO_FN(RIF2_CLK_B),
3166 GPIO_FN(MSIOF1_SS2_C),
3168 GPIO_FN(TS_SDAT0_E),
3169 GPIO_FN(STP_ISD_0_E),
3171 GPIO_FN(RIF2_SYNC_B),
3174 GPIO_IFN(USB30_PWEN),
3175 GPIO_FN(AUDIO_CLKOUT_B),
3176 GPIO_FN(SSI_SCK2_B),
3177 GPIO_FN(TS_SDEN1_D),
3178 GPIO_FN(STP_ISEN_1_D),
3179 GPIO_FN(STP_OPWM_0_E),
3184 GPIO_IFN(USB30_OVC),
3185 GPIO_FN(AUDIO_CLKOUT1_B),
3187 GPIO_FN(TS_SPSYNC1_D),
3188 GPIO_FN(STP_ISSYNC_1_D),
3189 GPIO_FN(STP_IVCXO27_0_E),
3196 GPIO_IFN(USB31_PWEN),
3197 GPIO_FN(AUDIO_CLKOUT2_B),
3199 GPIO_FN(TS_SDEN0_E),
3200 GPIO_FN(STP_ISEN_0_E),
3203 GPIO_IFN(USB31_OVC),
3204 GPIO_FN(AUDIO_CLKOUT3_B),
3206 GPIO_FN(TS_SPSYNC0_E),
3207 GPIO_FN(STP_ISSYNC_0_E),
3212 static struct pinmux_cfg_reg pinmux_config_regs[] = {
3213 /* GPSR0(0xE6060100) md[3:1] controls initial value */
3214 /* md[3:1] .. 0 : 0x0000FFFF */
3215 /* .. other : 0x00000000 */
3216 { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) {
3235 GP_0_15_FN, GFN_D15,
3236 GP_0_14_FN, GFN_D14,
3237 GP_0_13_FN, GFN_D13,
3238 GP_0_12_FN, GFN_D12,
3239 GP_0_11_FN, GFN_D11,
3240 GP_0_10_FN, GFN_D10,
3252 /* GPSR1(0xE6060104) is md[3:1] controls initial value */
3253 /* md[3:1] .. 0 : 0x0EFFFFFF */
3254 /* .. other : 0x00000000 */
3255 { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) {
3260 GP_1_27_FN, GFN_EX_WAIT0_A,
3261 GP_1_26_FN, GFN_WE1x,
3262 GP_1_25_FN, GFN_WE0x,
3263 GP_1_24_FN, GFN_RD_WRx,
3264 GP_1_23_FN, GFN_RDx,
3265 GP_1_22_FN, GFN_BSx,
3266 GP_1_21_FN, GFN_CS1x_A26,
3267 GP_1_20_FN, GFN_CS0x,
3268 GP_1_19_FN, GFN_A19,
3269 GP_1_18_FN, GFN_A18,
3270 GP_1_17_FN, GFN_A17,
3271 GP_1_16_FN, GFN_A16,
3272 GP_1_15_FN, GFN_A15,
3273 GP_1_14_FN, GFN_A14,
3274 GP_1_13_FN, GFN_A13,
3275 GP_1_12_FN, GFN_A12,
3276 GP_1_11_FN, GFN_A11,
3277 GP_1_10_FN, GFN_A10,
3289 /* GPSR2(0xE6060108) is md[3:1] controls */
3290 /* md[3:1] .. 0 : 0x000003C0 */
3291 /* .. other : 0x00000200 */
3292 { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) {
3312 GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,
3313 GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,
3314 GP_2_12_FN, GFN_AVB_LINK,
3315 GP_2_11_FN, GFN_AVB_PHY_INT,
3316 GP_2_10_FN, GFN_AVB_MAGIC,
3317 GP_2_9_FN, GFN_AVB_MDC,
3318 GP_2_8_FN, GFN_PWM2_A,
3319 GP_2_7_FN, GFN_PWM1_A,
3320 GP_2_6_FN, GFN_PWM0,
3321 GP_2_5_FN, GFN_IRQ5,
3322 GP_2_4_FN, GFN_IRQ4,
3323 GP_2_3_FN, GFN_IRQ3,
3324 GP_2_2_FN, GFN_IRQ2,
3325 GP_2_1_FN, GFN_IRQ1,
3326 GP_2_0_FN, GFN_IRQ0 }
3330 { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) {
3349 GP_3_15_FN, GFN_SD1_WP,
3350 GP_3_14_FN, GFN_SD1_CD,
3351 GP_3_13_FN, GFN_SD0_WP,
3352 GP_3_12_FN, GFN_SD0_CD,
3353 GP_3_11_FN, GFN_SD1_DAT3,
3354 GP_3_10_FN, GFN_SD1_DAT2,
3355 GP_3_9_FN, GFN_SD1_DAT1,
3356 GP_3_8_FN, GFN_SD1_DAT0,
3357 GP_3_7_FN, GFN_SD1_CMD,
3358 GP_3_6_FN, GFN_SD1_CLK,
3359 GP_3_5_FN, GFN_SD0_DAT3,
3360 GP_3_4_FN, GFN_SD0_DAT2,
3361 GP_3_3_FN, GFN_SD0_DAT1,
3362 GP_3_2_FN, GFN_SD0_DAT0,
3363 GP_3_1_FN, GFN_SD0_CMD,
3364 GP_3_0_FN, GFN_SD0_CLK }
3367 { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) {
3383 GP_4_17_FN, GPIO_FN_SD3_DS,
3384 GP_4_16_FN, GFN_SD3_DAT7,
3386 GP_4_15_FN, GFN_SD3_DAT6,
3387 GP_4_14_FN, GFN_SD3_DAT5,
3388 GP_4_13_FN, GFN_SD3_DAT4,
3389 GP_4_12_FN, FN_SD3_DAT3,
3390 GP_4_11_FN, FN_SD3_DAT2,
3391 GP_4_10_FN, FN_SD3_DAT1,
3392 GP_4_9_FN, FN_SD3_DAT0,
3393 GP_4_8_FN, FN_SD3_CMD,
3394 GP_4_7_FN, FN_SD3_CLK,
3395 GP_4_6_FN, GFN_SD2_DS,
3396 GP_4_5_FN, GFN_SD2_DAT3,
3397 GP_4_4_FN, GFN_SD2_DAT2,
3398 GP_4_3_FN, GFN_SD2_DAT1,
3399 GP_4_2_FN, GFN_SD2_DAT0,
3400 GP_4_1_FN, FN_SD2_CMD,
3401 GP_4_0_FN, GFN_SD2_CLK }
3404 { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) {
3411 GP_5_25_FN, GFN_MLB_DAT,
3412 GP_5_24_FN, GFN_MLB_SIG,
3414 GP_5_23_FN, GFN_MLB_CLK,
3415 GP_5_22_FN, FN_MSIOF0_RXD,
3416 GP_5_21_FN, GFN_MSIOF0_SS2,
3417 GP_5_20_FN, FN_MSIOF0_TXD,
3418 GP_5_19_FN, GFN_MSIOF0_SS1,
3419 GP_5_18_FN, GFN_MSIOF0_SYNC,
3420 GP_5_17_FN, FN_MSIOF0_SCK,
3421 GP_5_16_FN, GFN_HRTS0x,
3422 GP_5_15_FN, GFN_HCTS0x,
3423 GP_5_14_FN, GFN_HTX0,
3424 GP_5_13_FN, GFN_HRX0,
3425 GP_5_12_FN, GFN_HSCK0,
3426 GP_5_11_FN, GFN_RX2_A,
3427 GP_5_10_FN, GFN_TX2_A,
3428 GP_5_9_FN, GFN_SCK2,
3429 GP_5_8_FN, GFN_RTS1x_TANS,
3430 GP_5_7_FN, GFN_CTS1x,
3431 GP_5_6_FN, GFN_TX1_A,
3432 GP_5_5_FN, GFN_RX1_A,
3433 GP_5_4_FN, GFN_RTS0x_TANS,
3434 GP_5_3_FN, GFN_CTS0x,
3437 GP_5_0_FN, GFN_SCK0 }
3440 { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) {
3441 GP_6_31_FN, GFN_USB31_OVC,
3442 GP_6_30_FN, GFN_USB31_PWEN,
3443 GP_6_29_FN, GFN_USB30_OVC,
3444 GP_6_28_FN, GFN_USB30_PWEN,
3445 GP_6_27_FN, GFN_USB1_OVC,
3446 GP_6_26_FN, GFN_USB1_PWEN,
3447 GP_6_25_FN, GFN_USB0_OVC,
3448 GP_6_24_FN, GFN_USB0_PWEN,
3449 GP_6_23_FN, GFN_AUDIO_CLKB_B,
3450 GP_6_22_FN, GFN_AUDIO_CLKA_A,
3451 GP_6_21_FN, GFN_SSI_SDATA9_A,
3452 GP_6_20_FN, GFN_SSI_SDATA8,
3453 GP_6_19_FN, GFN_SSI_SDATA7,
3454 GP_6_18_FN, GFN_SSI_WS78,
3455 GP_6_17_FN, GFN_SSI_SCK78,
3456 GP_6_16_FN, GFN_SSI_SDATA6,
3457 GP_6_15_FN, GFN_SSI_WS6,
3458 GP_6_14_FN, GFN_SSI_SCK6,
3459 GP_6_13_FN, FN_SSI_SDATA5,
3460 GP_6_12_FN, FN_SSI_WS5,
3461 GP_6_11_FN, FN_SSI_SCK5,
3462 GP_6_10_FN, GFN_SSI_SDATA4,
3463 GP_6_9_FN, GFN_SSI_WS4,
3464 GP_6_8_FN, GFN_SSI_SCK4,
3465 GP_6_7_FN, GFN_SSI_SDATA3,
3466 GP_6_6_FN, GFN_SSI_WS34,
3467 GP_6_5_FN, GFN_SSI_SCK34,
3468 GP_6_4_FN, GFN_SSI_SDATA2_A,
3469 GP_6_3_FN, GFN_SSI_SDATA1_A,
3470 GP_6_2_FN, GFN_SSI_SDATA0,
3471 GP_6_1_FN, GFN_SSI_WS0129,
3472 GP_6_0_FN, GFN_SSI_SCK0129 }
3475 { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) {
3507 GP_7_3_FN, FN_HDMI1_CEC,
3508 GP_7_2_FN, FN_HDMI0_CEC,
3510 GP_7_0_FN, FN_AVS1 }
3512 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3513 4, 4, 4, 4, 4, 4, 4, 4) {
3514 /* IPSR0_31_28 [4] */
3515 IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,
3516 FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, 0,
3519 /* IPSR0_27_24 [4] */
3520 IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,
3521 FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, 0,
3524 /* IPSR0_23_20 [4] */
3525 IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,
3529 /* IPSR0_19_16 [4] */
3530 IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,
3534 /* IPSR0_15_12 [4] */
3535 IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,
3539 /* IPSR0_11_8 [4] */
3540 IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,
3545 IFN_AVB_MAGIC, 0, FN_MSIOF2_S1_C, FN_SCK4_A,
3550 IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,
3556 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3557 4, 4, 4, 4, 4, 4, 4, 4) {
3558 /* IPSR1_31_28 [4] */
3559 IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,
3560 FN_VI4_DATA8, 0, FN_DU_DB0, 0,
3563 /* IPSR1_27_24 [4] */
3564 IFN_PWM2_A, FN_PWMFSW0, FN_A20, FN_HTX3_D,
3568 /* IPSR1_23_20 [4] */
3569 IFN_PWM1_A, 0, FN_A21, FN_HRX3_D,
3570 FN_VI4_DATA7_B, 0, 0, 0,
3573 /* IPSR1_19_16 [4] */
3574 IFN_PWM0, FN_AVB_AVTP_PPS, FN_A22, 0,
3575 FN_VI4_DATA6_B, 0, 0, 0,
3576 0, FN_IECLK_B, 0, 0,
3578 /* IPSR1_15_12 [4] */
3579 IFN_IRQ5, FN_QSTB_QHE, FN_A23, FN_DU_EXVSYNC_DU_VSYNC,
3580 FN_VI4_DATA5_B, 0, 0, 0,
3583 /* IPSR1_11_8 [4] */
3584 IFN_IRQ4, FN_QSTH_QHS, FN_A24, FN_DU_EXHSYNC_DU_HSYNC,
3585 FN_VI4_DATA4_B, 0, 0, 0,
3589 IFN_IRQ3, FN_QSTVB_QVE, FN_A25, FN_DU_DOTCLKOUT1,
3590 FN_VI4_DATA3_B, 0, 0,
3594 IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,
3595 FN_VI4_DATA2_B, 0, 0, 0,
3600 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3601 4, 4, 4, 4, 4, 4, 4, 4) {
3602 /* IPSR2_31_28 [4] */
3603 IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,
3605 FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,
3607 /* IPSR2_27_24 [4] */
3608 IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,
3609 FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,
3612 /* IPSR2_23_20 [4] */
3613 IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,
3614 FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,
3617 /* IPSR2_19_16 [4] */
3618 IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,
3619 FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,
3622 /* IPSR2_15_12 [4] */
3623 IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,
3624 FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,
3627 /* IPSR2_11_8 [4] */
3628 IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,
3629 FN_VI4_DATA11, 0, FN_DU_DB3, 0,
3633 IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,
3634 FN_VI4_DATA10, 0, FN_DU_DB2, 0,
3638 IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,
3639 FN_VI4_DATA9, 0, FN_DU_DB1, 0,
3644 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3645 4, 4, 4, 4, 4, 4, 4, 4) {
3646 /* IPSR3_31_28 [4] */
3647 IFN_A16, FN_LCDOUT8, 0, 0,
3648 FN_VI4_FIELD, 0, FN_DU_DG0, 0,
3651 /* IPSR3_27_24 [4] */
3652 IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,
3653 FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,
3656 /* IPSR3_23_20 [4] */
3657 IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,
3658 FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,
3661 /* IPSR3_19_16 [4] */
3662 IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,
3663 FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,
3666 /* IPSR3_15_12 [4] */
3667 IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,
3668 FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,
3671 /* IPSR3_11_8 [4] */
3672 IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,
3673 FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,
3674 FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, FN_SPV_EVEN, 0,
3677 IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,
3678 0, FN_VI5_HSYNCx, 0, 0,
3682 IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,
3683 0, FN_VI5_VSYNCx, 0, 0,
3688 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
3689 4, 4, 4, 4, 4, 4, 4, 4) {
3690 /* IPSR4_31_28 [4] */
3691 IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,
3693 FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,
3695 /* IPSR4_27_24 [4] */
3696 IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,
3698 FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,
3700 /* IPSR4_23_20 [4] */
3701 IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,
3703 FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,
3705 /* IPSR4_19_16 [4] */
3706 IFN_CS1x_A26, 0, 0, 0,
3707 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,
3710 /* IPSR4_15_12 [4] */
3712 0, FN_VI5_CLKENB, 0, 0,
3715 /* IPSR4_11_8 [4] */
3716 IFN_A19, FN_LCDOUT11, 0, 0,
3717 FN_VI4_CLKENB, 0, FN_DU_DG3, 0,
3721 IFN_A18, FN_LCDOUT10, 0, 0,
3722 FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,
3726 IFN_A17, FN_LCDOUT9, 0, 0,
3727 FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,
3732 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
3733 4, 4, 4, 4, 4, 4, 4, 4) {
3734 /* IPSR5_31_28 [4] */
3735 IFN_D4, FN_MSIOF2_SCK_B, 0, 0,
3736 FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,
3739 /* IPSR5_27_24 [4] */
3740 IFN_D3, 0, FN_MSIOF3_TXD_A, 0,
3741 FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,
3744 /* IPSR5_23_20 [4] */
3745 IFN_D2, 0, FN_MSIOF3_RXD_A, 0,
3746 FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,
3749 /* IPSR5_19_16 [4] */
3750 IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,
3751 FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,
3754 /* IPSR5_15_12 [4] */
3755 IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,
3756 FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,
3759 /* IPSR5_11_8 [4] */
3760 IFN_EX_WAIT0_A, FN_QCLK, 0, 0,
3761 FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,
3765 IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,
3766 FN_HRTS3x, 0, 0, FN_SDA6_B,
3767 FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,
3770 IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,
3771 FN_HCTS3x, 0, 0, FN_SCL6_B,
3772 FN_CAN_CLK, 0, FN_IECLK_A, 0,
3776 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
3777 4, 4, 4, 4, 4, 4, 4, 4) {
3778 /* IPSR6_31_28 [4] */
3779 IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,
3780 FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,
3783 /* IPSR6_27_24 [4] */
3784 IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,
3785 FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,
3788 /* IPSR6_23_20 [4] */
3789 IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,
3790 FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,
3793 /* IPSR6_19_16 [4] */
3794 IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,
3795 FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,
3798 /* IPSR6_15_12 [4] */
3799 IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,
3800 FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,
3803 /* IPSR6_11_8 [4] */
3804 IFN_D7, FN_MSIOF2_TXD_B, 0, 0,
3805 FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,
3809 IFN_D6, FN_MSIOF2_RXD_B, 0, 0,
3810 FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,
3814 IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,
3815 FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,
3820 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
3821 4, 4, 4, 4, 4, 4, 4, 4) {
3822 /* IPSR7_31_28 [4] */
3823 IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,
3824 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,
3827 /* IPSR7_27_24 [4] */
3828 IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,
3829 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,
3832 /* IPSR7_23_20 [4] */
3833 IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,
3834 0, 0, FN_STP_IVCXO27_0_B, 0,
3837 /* IPSR7_19_16 [4] */
3838 IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,
3839 0, 0, FN_STP_OPWM_0_B, 0,
3842 /* IPSR7_15_12 [4] */
3843 FN_FSCLKST, 0, 0, 0,
3847 /* IPSR7_11_8 [4] */
3848 IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,
3849 FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,
3853 IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,
3854 FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,
3858 IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,
3859 FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,
3864 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
3865 4, 4, 4, 4, 4, 4, 4, 4) {
3866 /* IPSR8_31_28 [4] */
3867 IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, 0,
3868 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,
3871 /* IPSR8_27_24 [4] */
3872 IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, 0,
3873 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,
3876 /* IPSR8_23_20 [4] */
3877 IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, 0,
3878 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,
3881 /* IPSR8_19_16 [4] */
3882 IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, 0,
3883 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,
3886 /* IPSR8_15_12 [4] */
3887 IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, 0,
3888 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,
3891 /* IPSR8_11_8 [4] */
3892 IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,
3893 0, FN_SIM0_CLK_A, 0, 0,
3897 IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,
3898 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,
3902 IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,
3903 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,
3908 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
3909 4, 4, 4, 4, 4, 4, 4, 4) {
3910 /* IPSR9_31_28 [4] */
3911 IFN_SD3_DAT5, FN_SD2_WP_A, 0, 0,
3915 /* IPSR9_27_24 [4] */
3916 IFN_SD3_DAT4, FN_SD2_CD_A, 0, 0,
3920 /* IPSR9_23_20 [4] */
3921 IFN_SD2_DS, 0, 0, 0,
3923 FN_SATA_DEVSLP_B, 0, 0, FN_VSP_A,
3925 /* IPSR9_19_16 [4] */
3926 IFN_SD2_DAT3, 0, 0, 0,
3928 0, FN_SDATA_A, 0, 0,
3930 /* IPSR9_15_12 [4] */
3931 IFN_SD2_DAT2, 0, 0, 0,
3933 0, FN_MDATA_A, 0, 0,
3935 /* IPSR9_11_8 [4] */
3936 IFN_SD2_DAT1, 0, 0, 0,
3941 IFN_SD2_DAT0, 0, 0, 0,
3946 IFN_SD2_CLK, 0, 0, 0,
3952 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
3953 4, 4, 4, 4, 4, 4, 4, 4) {
3954 /* IPSR10_31_28 [4] */
3955 IFN_RX0, FN_HRX1_B, 0, 0,
3956 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,
3959 /* IPSR10_27_24 [4] */
3960 IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,
3961 FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM__C, FN_RIF0_CLK_B,
3962 0, FN_ADICHS2, 0, 0,
3964 /* IPSR10_23_20 [4] */
3965 IFN_SD1_WP, 0, 0, 0,
3966 0, FN_SIM0_D_B, 0, 0,
3969 /* IPSR10_19_16 [4] */
3970 IFN_SD1_CD, 0, 0, 0,
3971 0, FN_SIM0_CLK_B, 0, 0,
3974 /* IPSR10_15_12 [4] */
3975 IFN_SD0_WP, 0, 0, 0,
3979 /* IPSR10_11_8 [4] */
3980 IFN_SD0_CD, 0, 0, 0,
3981 FN_SCL2_B, FN_SIM0_RST_A, 0, 0,
3984 /* IPSR10_7_4 [4] */
3985 IFN_SD3_DAT7, FN_SD3_WP, 0, 0,
3989 /* IPSR10_3_0 [4] */
3990 IFN_SD3_DAT6, FN_SD3_CD, 0, 0,
3996 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
3997 4, 4, 4, 4, 4, 4, 4, 4) {
3998 /* IPSR11_31_28 [4] */
3999 IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,
4000 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,
4003 /* IPSR11_27_24 [4] */
4004 IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,
4005 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,
4006 0, FN_ADICHS0, 0, 0,
4008 /* IPSR11_23_20 [4] */
4009 IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,
4010 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,
4011 0, FN_ADIDATA, 0, 0,
4012 /* IPSR11_19_16 [4] */
4013 IFN_TX1_A, FN_HTX1_A, 0, 0,
4014 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,
4017 /* IPSR11_15_12 [4] */
4018 IFN_RX1_A, FN_HRX1_A, 0, 0,
4019 0, FN_TS_SDAT0_C, FN_STP_IDS_0_C, FN_RIF1_CLK_C,
4022 /* IPSR11_11_8 [4] */
4023 IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,
4024 FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,
4025 0, FN_ADICHS1, 0, 0,
4027 /* IPSR11_7_4 [4] */
4028 IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,
4029 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,
4030 FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,
4032 /* IPSR11_3_0 [4] */
4033 IFN_TX0, FN_HTX1_B, 0, 0,
4034 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,
4039 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4040 4, 4, 4, 4, 4, 4, 4, 4) {
4041 /* IPSR12_31_28 [4] */
4042 IFN_MSIOF0_SYNC, 0, 0, 0,
4044 FN_AUDIO_CLKOUT_A, 0, 0, 0,
4046 /* IPSR12_27_24 [4] */
4047 IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,
4048 FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,
4049 FN_AUDIO_CLKOUT2_A, 0, 0, 0,
4051 /* IPSR12_23_20 [4] */
4052 IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,
4053 FN_SSI_SCK9_A, FN_TS_SPSYNC0_D, FN_STP_ISSYNC_0_D,
4055 FN_AUDIO_CLKOUT1_A, FN_AD_NSCx, 0, 0,
4057 /* IPSR12_19_16 [4] */
4058 IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,
4059 FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,
4062 /* IPSR12_15_12 [4] */
4063 IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,
4064 FN_SS1_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,
4067 /* IPSR12_11_8 [4] */
4068 IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,
4069 FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,
4072 /* IPSR12_7_4 [4] */
4073 IFN_RX2_A, 0, 0, FN_SD2_WP_B,
4074 FN_SDA1_A, FN_RDS_DATA_B, FN_RMIN_A, FN_RIF1_SYNC_C,
4075 0, FN_FSO_CEF_1_B, 0, 0,
4077 /* IPSR12_3_0 [4] */
4078 IFN_TX2_A, 0, 0, FN_SD2_CD_B,
4079 FN_SCL1_A, FN_RSD_CLK_B, FN_FMCLK_A, FN_RIF1_D1_C,
4080 0, FN_FSO_CFE_0_B, 0, 0,
4084 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
4085 4, 4, 4, 4, 4, 4, 4, 4) {
4086 /* IPSR13_31_28 [4] */
4087 IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,
4091 /* IPSR13_27_24 [4] */
4092 IFN_SSI_WS0129, 0, FN_MSIOF1_SS1_F, 0,
4096 /* IPSR13_23_20 [4] */
4097 IFN_SSI_SCK0129, 0, FN_MSIOF1_TXD_F, 0,
4101 /* IPSR13_19_16 [4] */
4102 IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,
4106 /* IPSR13_15_12 [4] */
4107 IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,
4111 /* IPSR13_11_8 [4] */
4112 IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,
4116 /* IPSR13_7_4 [4] */
4117 IFN_MSIOF0_SS2, FN_TX5, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,
4118 FN_SSI_WS2_A, FN_RDS_DATA_A, FN_STP_OPWM_0_D, 0,
4119 FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,
4120 /* IPSR13_3_0 [4] */
4121 IFN_MSIOF0_SS1, FN_RX5, 0, FN_AUDIO_CLKA_C,
4122 FN_SSI_SCK2_A, FN_RDS_CLK_A, FN_STP_IVCXO27_0_C, 0,
4123 FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,
4127 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
4128 4, 4, 4, 4, 4, 4, 4, 4) {
4129 /* IPSR14_31_28 [4] */
4130 IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,
4131 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,
4132 FN_RIF2_D1_A, 0, 0, 0,
4134 /* IPSR14_27_24 [4] */
4135 IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,
4136 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,
4137 FN_RIF2_SYNC_A, 0, 0, 0,
4139 /* IPSR14_23_20 [4] */
4140 IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,
4141 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,
4142 FN_RIF2_CLK_A, 0, 0, 0,
4144 /* IPSR14_19_16 [4] */
4145 IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,
4146 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,
4147 FN_RIF2_D0_A, 0, 0, 0,
4149 /* IPSR14_15_12 [4] */
4150 IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,
4151 0, 0, FN_STP_IVCXO27_0_A, 0,
4154 /* IPSR14_11_8 [4] */
4155 IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,
4156 0, 0, FN_STP_OPWM_0_A, 0,
4159 /* IPSR14_7_4 [4] */
4160 IFN_SSI_SDATA2_A, 0, 0, 0,
4161 FN_SSI_SCK1_B, 0, 0, FN_MOUT6,
4164 /* IPSR14_3_0 [4] */
4165 IFN_SSI_SDATA1_A, 0, 0, 0,
4171 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
4172 4, 4, 4, 4, 4, 4, 4, 4) {
4173 /* IPSR15_31_28 [4] */
4174 IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,
4175 FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5,
4178 /* IPSR15_27_24 [4] */
4179 IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,
4180 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,
4181 FN_EIF3_D1_A, 0, 0, 0,
4183 /* IPSR15_23_20 [4] */
4184 IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,
4185 0, FN_TS_SDEN1_A, FN_STP_IEN_1_A, FN_RIF1_D0_A,
4186 FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,
4187 /* IPSR15_19_16 [4] */
4188 IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,
4189 0, FN_TS_SDT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,
4190 FN_RIF3_SYNC_A, 0, 0, 0,
4192 /* IPSR15_15_12 [4] */
4193 IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,
4194 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,
4195 FN_RIF3_CLK_A, 0, 0, 0,
4197 /* IPSR15_11_8 [4] */
4198 IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,
4199 0, 0, FN_RSD_DATA_C, 0,
4200 FN_SATA_DEVSLP_A, 0, 0, 0,
4202 /* IPSR15_7_4 [4] */
4203 IFN_SSI_WS6, FN_USB2_OVC, 0, FN_SIM0_D_D,
4207 /* IPSR15_3_0 [4] */
4208 IFN_SSI_SCK6, FN_USB2_PWEN, 0, FN_SIM0_RST_D,
4209 0, 0, FN_RDS_CLK_C, 0,
4215 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
4216 4, 4, 4, 4, 4, 4, 4, 4) {
4217 /* IPSR16_31_28 [4] */
4218 IFN_USB30_OVC, 0, FN_AUDIO_CLKOUT1_B, 0,
4219 FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D,
4221 FN_RIF3_D1_B, FN_SDATA_B, FN_RSO_TOE_B, FN_TPU0TO1,
4223 /* IPSR16_27_24 [4] */
4224 IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,
4225 FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,
4226 FN_RIF3_D0_B, FN_MDATA_B, FN_TCLK2_B, FN_TPU0TO0,
4228 /* IPSR16_23_20 [4] */
4229 IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,
4230 FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,
4231 FN_RIF2_SYNC_B, FN_STMx_B, FN_REMOCON_B, 0,
4233 /* IPSR16_19_16 [4] */
4234 IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,
4235 FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,
4236 FN_RIF2_CLK_B, FN_MTSx_B, FN_SPEEDIN_A, FN_VSP_D,
4238 /* IPSR16_15_12 [4] */
4239 IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,
4240 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,
4241 FN_RIF3_SYNC_B, 0, 0, FN_VSP_C,
4243 /* IPSR16_11_8 [4] */
4244 IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,
4245 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,
4246 FN_RIF3_CLK_B, FN_SCKZ_B, 0, 0,
4248 /* IPSR16_7_4 [4] */
4249 IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,
4250 FN_DVC_MUTE, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,
4251 0, 0, FN_TCLK1_A, FN_VSP_B,
4253 /* IPSR16_3_0 [4] */
4254 IFN_AUDIO_CLKA_A, 0, 0, 0,
4256 0, 0, 0, FN_CC5_OSCOUT,
4260 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
4261 1, 1, 1, 1, 1, 1, 1, 1,
4262 1, 1, 1, 1, 1, 1, 1, 1,
4263 1, 1, 1, 1, 1, 1, 1, 1,
4265 /* reserved [31..24] */
4274 /* reserved [23..16] */
4283 /* reserved [15..8] */
4292 /* IPSR17_7_4 [4] */
4293 IFN_USB31_OVC, 0, 0, FN_AUDIO_CLKOUT3_B,
4294 FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,
4295 FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,
4297 /* IPSR17_3_0 [4] */
4298 IFN_USB31_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B,
4299 FN_SI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,
4300 FN_RIF2_D0_B, 0, 0, FN_TPU0TO2,
4304 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
4305 1, 2, 2, 3, 1, 1, 2, 1, 1, 1, 2,
4306 1, 1, 1, 1, 1, 1, 1, 2, 2, 1, 2, 1) {
4309 /* SEL_MSIOF3 [2] */
4310 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
4311 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
4312 /* SEL_MSIOF2 [2] */
4313 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
4314 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
4315 /* SEL_MSIOF1 [3] */
4316 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
4317 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
4318 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
4321 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
4323 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
4325 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
4328 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
4330 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
4331 /* SEL_HSCIF4 [1] */
4332 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
4333 /* SEL_HSCIF3 [2] */
4334 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
4335 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
4336 /* SEL_HSCIF2 [1] */
4337 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
4338 /* SEL_HSCIF1 [1] */
4339 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
4343 FN_SEL_FM_0, FN_SEL_FM_1,
4344 /* SEL_ETHERAVB [1] */
4345 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
4347 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
4349 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
4351 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
4354 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
4356 /* SEL_CANFD0 [1] */
4357 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
4359 FN_SEL_ADG_0, FN_SEL_ADG_1,
4360 FN_SEL_ADG_2, FN_SEL_ADG_3,
4362 FN_SEL_5LINE_0, FN_SEL_5LINE_1,
4365 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4368 2, 1, 1, 1, 1, 1, 2,
4369 1, 1, 1, 1, 1, 1, 1) {
4384 /* SEL_TIMER_TMU [1] */
4387 /* SEL_SSP1_1 [2] */
4392 /* SEL_SSP1_0 [3] */
4404 /* SEL_SPEED_PULSE_IF [1] */
4405 FN_SEL_SPEED_PULSE_IF_0,
4406 FN_SEL_SPEED_PULSE_IF_1,
4407 /* SEL_SIMCARD [2] */
4432 /* SEL_REMOCON [1] */
4463 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,
4464 1, 1, 1, 26, 2, 1) {
4486 /* under construction */
4487 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
4506 GP_0_15_IN, GP_0_15_OUT,
4507 GP_0_14_IN, GP_0_14_OUT,
4508 GP_0_13_IN, GP_0_13_OUT,
4509 GP_0_12_IN, GP_0_12_OUT,
4510 GP_0_11_IN, GP_0_11_OUT,
4511 GP_0_10_IN, GP_0_10_OUT,
4512 GP_0_9_IN, GP_0_9_OUT,
4513 GP_0_8_IN, GP_0_8_OUT,
4514 GP_0_7_IN, GP_0_7_OUT,
4515 GP_0_6_IN, GP_0_6_OUT,
4516 GP_0_5_IN, GP_0_5_OUT,
4517 GP_0_4_IN, GP_0_4_OUT,
4518 GP_0_3_IN, GP_0_3_OUT,
4519 GP_0_2_IN, GP_0_2_OUT,
4520 GP_0_1_IN, GP_0_1_OUT,
4521 GP_0_0_IN, GP_0_0_OUT,
4524 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
4529 GP_1_27_IN, GP_1_27_OUT,
4530 GP_1_26_IN, GP_1_26_OUT,
4531 GP_1_25_IN, GP_1_25_OUT,
4532 GP_1_24_IN, GP_1_24_OUT,
4533 GP_1_23_IN, GP_1_23_OUT,
4534 GP_1_22_IN, GP_1_22_OUT,
4535 GP_1_21_IN, GP_1_21_OUT,
4536 GP_1_20_IN, GP_1_20_OUT,
4537 GP_1_19_IN, GP_1_19_OUT,
4538 GP_1_18_IN, GP_1_18_OUT,
4539 GP_1_17_IN, GP_1_17_OUT,
4540 GP_1_16_IN, GP_1_16_OUT,
4541 GP_1_15_IN, GP_1_15_OUT,
4542 GP_1_14_IN, GP_1_14_OUT,
4543 GP_1_13_IN, GP_1_13_OUT,
4544 GP_1_12_IN, GP_1_12_OUT,
4545 GP_1_11_IN, GP_1_11_OUT,
4546 GP_1_10_IN, GP_1_10_OUT,
4547 GP_1_9_IN, GP_1_9_OUT,
4548 GP_1_8_IN, GP_1_8_OUT,
4549 GP_1_7_IN, GP_1_7_OUT,
4550 GP_1_6_IN, GP_1_6_OUT,
4551 GP_1_5_IN, GP_1_5_OUT,
4552 GP_1_4_IN, GP_1_4_OUT,
4553 GP_1_3_IN, GP_1_3_OUT,
4554 GP_1_2_IN, GP_1_2_OUT,
4555 GP_1_1_IN, GP_1_1_OUT,
4556 GP_1_0_IN, GP_1_0_OUT,
4559 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
4579 GP_2_14_IN, GP_2_14_OUT,
4580 GP_2_13_IN, GP_2_13_OUT,
4581 GP_2_12_IN, GP_2_12_OUT,
4582 GP_2_11_IN, GP_2_11_OUT,
4583 GP_2_10_IN, GP_2_10_OUT,
4584 GP_2_9_IN, GP_2_9_OUT,
4585 GP_2_8_IN, GP_2_8_OUT,
4586 GP_2_7_IN, GP_2_7_OUT,
4587 GP_2_6_IN, GP_2_6_OUT,
4588 GP_2_5_IN, GP_2_5_OUT,
4589 GP_2_4_IN, GP_2_4_OUT,
4590 GP_2_3_IN, GP_2_3_OUT,
4591 GP_2_2_IN, GP_2_2_OUT,
4592 GP_2_1_IN, GP_2_1_OUT,
4593 GP_2_0_IN, GP_2_0_OUT,
4596 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
4615 GP_3_15_IN, GP_3_15_OUT,
4616 GP_3_14_IN, GP_3_14_OUT,
4617 GP_3_13_IN, GP_3_13_OUT,
4618 GP_3_12_IN, GP_3_12_OUT,
4619 GP_3_11_IN, GP_3_11_OUT,
4620 GP_3_10_IN, GP_3_10_OUT,
4621 GP_3_9_IN, GP_3_9_OUT,
4622 GP_3_8_IN, GP_3_8_OUT,
4623 GP_3_7_IN, GP_3_7_OUT,
4624 GP_3_6_IN, GP_3_6_OUT,
4625 GP_3_5_IN, GP_3_5_OUT,
4626 GP_3_4_IN, GP_3_4_OUT,
4627 GP_3_3_IN, GP_3_3_OUT,
4628 GP_3_2_IN, GP_3_2_OUT,
4629 GP_3_1_IN, GP_3_1_OUT,
4630 GP_3_0_IN, GP_3_0_OUT,
4633 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
4649 GP_4_17_IN, GP_4_17_OUT,
4650 GP_4_16_IN, GP_4_16_OUT,
4652 GP_4_15_IN, GP_4_15_OUT,
4653 GP_4_14_IN, GP_4_14_OUT,
4654 GP_4_13_IN, GP_4_13_OUT,
4655 GP_4_12_IN, GP_4_12_OUT,
4656 GP_4_11_IN, GP_4_11_OUT,
4657 GP_4_10_IN, GP_4_10_OUT,
4658 GP_4_9_IN, GP_4_9_OUT,
4659 GP_4_8_IN, GP_4_8_OUT,
4660 GP_4_7_IN, GP_4_7_OUT,
4661 GP_4_6_IN, GP_4_6_OUT,
4662 GP_4_5_IN, GP_4_5_OUT,
4663 GP_4_4_IN, GP_4_4_OUT,
4664 GP_4_3_IN, GP_4_3_OUT,
4665 GP_4_2_IN, GP_4_2_OUT,
4666 GP_4_1_IN, GP_4_1_OUT,
4667 GP_4_0_IN, GP_4_0_OUT,
4670 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
4677 GP_5_25_IN, GP_5_25_OUT,
4678 GP_5_24_IN, GP_5_24_OUT,
4680 GP_5_23_IN, GP_5_23_OUT,
4681 GP_5_22_IN, GP_5_22_OUT,
4682 GP_5_21_IN, GP_5_21_OUT,
4683 GP_5_20_IN, GP_5_20_OUT,
4684 GP_5_19_IN, GP_5_19_OUT,
4685 GP_5_18_IN, GP_5_18_OUT,
4686 GP_5_17_IN, GP_5_17_OUT,
4687 GP_5_16_IN, GP_5_16_OUT,
4689 GP_5_15_IN, GP_5_15_OUT,
4690 GP_5_14_IN, GP_5_14_OUT,
4691 GP_5_13_IN, GP_5_13_OUT,
4692 GP_5_12_IN, GP_5_12_OUT,
4693 GP_5_11_IN, GP_5_11_OUT,
4694 GP_5_10_IN, GP_5_10_OUT,
4695 GP_5_9_IN, GP_5_9_OUT,
4696 GP_5_8_IN, GP_5_8_OUT,
4697 GP_5_7_IN, GP_5_7_OUT,
4698 GP_5_6_IN, GP_5_6_OUT,
4699 GP_5_5_IN, GP_5_5_OUT,
4700 GP_5_4_IN, GP_5_4_OUT,
4701 GP_5_3_IN, GP_5_3_OUT,
4702 GP_5_2_IN, GP_5_2_OUT,
4703 GP_5_1_IN, GP_5_1_OUT,
4704 GP_5_0_IN, GP_5_0_OUT,
4707 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
4711 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
4743 GP_6_3_IN, GP_6_3_OUT,
4744 GP_6_2_IN, GP_6_2_OUT,
4745 GP_6_1_IN, GP_6_1_OUT,
4746 GP_6_0_IN, GP_6_0_OUT,
4752 static struct pinmux_data_reg pinmux_data_regs[] = {
4753 /* use OUTDT registers? */
4754 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
4755 0, 0, 0, 0, 0, 0, 0, 0,
4756 0, 0, 0, 0, 0, 0, 0, 0,
4757 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
4758 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
4759 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
4760 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
4762 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
4764 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
4765 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
4766 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
4767 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
4768 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
4769 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
4770 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
4772 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
4773 0, 0, 0, 0, 0, 0, 0, 0,
4774 0, 0, 0, 0, 0, 0, 0, 0,
4775 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
4776 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
4777 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
4778 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
4780 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
4781 0, 0, 0, 0, 0, 0, 0, 0,
4782 0, 0, 0, 0, 0, 0, 0, 0,
4783 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
4784 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
4785 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
4786 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
4788 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
4789 0, 0, 0, 0, 0, 0, 0, 0,
4790 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,
4791 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
4792 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
4793 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
4794 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
4796 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
4798 0, 0, GP_5_25_DATA, GP_5_24_DATA,
4799 GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
4800 GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
4801 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
4802 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
4803 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
4804 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
4806 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
4809 { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
4810 0, 0, 0, 0, 0, 0, 0, 0,
4811 0, 0, 0, 0, 0, 0, 0, 0,
4812 0, 0, 0, 0, 0, 0, 0, 0,
4814 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
4818 static struct pinmux_info r8a7795_pinmux_info = {
4819 .name = "r8a7795_pfc",
4821 .unlock_reg = 0xe6060000, /* PMMR */
4823 .reserved_id = PINMUX_RESERVED,
4824 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
4825 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
4826 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
4827 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
4828 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
4830 .first_gpio = GPIO_GP_0_0,
4831 .last_gpio = GPIO_FN_TPU0TO3,
4833 .gpios = pinmux_gpios,
4834 .cfg_regs = pinmux_config_regs,
4835 .data_regs = pinmux_data_regs,
4837 .gpio_data = pinmux_data,
4838 .gpio_data_size = ARRAY_SIZE(pinmux_data),
4841 void r8a7795_pinmux_init(void)
4843 register_pinmux(&r8a7795_pinmux_info);