2 * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7795.c
3 * This file is r8a7795 processor support - PFC hardware block.
5 * Copyright (C) 2015-2016 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CPU_32_PORT(fn, pfx, sfx) \
15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
17 PORT_1(fn, pfx##31, sfx)
19 #define CPU_32_PORT1(fn, pfx, sfx) \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
21 PORT_10(fn, pfx##2, sfx)
23 #define CPU_32_PORT2(fn, pfx, sfx) \
24 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx##2, sfx)
27 #define CPU_32_PORT_29(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_1(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##21, sfx), \
32 PORT_1(fn, pfx##22, sfx), \
33 PORT_1(fn, pfx##23, sfx), \
34 PORT_1(fn, pfx##24, sfx), \
35 PORT_1(fn, pfx##25, sfx), \
36 PORT_1(fn, pfx##26, sfx), \
37 PORT_1(fn, pfx##27, sfx), \
38 PORT_1(fn, pfx##28, sfx)
40 #define CPU_32_PORT_28(fn, pfx, sfx) \
41 PORT_10(fn, pfx, sfx), \
42 PORT_10(fn, pfx##1, sfx), \
43 PORT_1(fn, pfx##20, sfx), \
44 PORT_1(fn, pfx##21, sfx), \
45 PORT_1(fn, pfx##22, sfx), \
46 PORT_1(fn, pfx##23, sfx), \
47 PORT_1(fn, pfx##24, sfx), \
48 PORT_1(fn, pfx##25, sfx), \
49 PORT_1(fn, pfx##26, sfx), \
50 PORT_1(fn, pfx##27, sfx)
52 #define CPU_32_PORT_26(fn, pfx, sfx) \
53 PORT_10(fn, pfx, sfx), \
54 PORT_10(fn, pfx##1, sfx), \
55 PORT_1(fn, pfx##20, sfx), \
56 PORT_1(fn, pfx##21, sfx), \
57 PORT_1(fn, pfx##22, sfx), \
58 PORT_1(fn, pfx##23, sfx), \
59 PORT_1(fn, pfx##24, sfx), \
60 PORT_1(fn, pfx##25, sfx)
62 #define CPU_32_PORT_18(fn, pfx, sfx) \
63 PORT_10(fn, pfx, sfx), \
64 PORT_1(fn, pfx##10, sfx), \
65 PORT_1(fn, pfx##11, sfx), \
66 PORT_1(fn, pfx##12, sfx), \
67 PORT_1(fn, pfx##13, sfx), \
68 PORT_1(fn, pfx##14, sfx), \
69 PORT_1(fn, pfx##15, sfx), \
70 PORT_1(fn, pfx##16, sfx), \
71 PORT_1(fn, pfx##17, sfx)
73 #define CPU_32_PORT_16(fn, pfx, sfx) \
74 PORT_10(fn, pfx, sfx), \
75 PORT_1(fn, pfx##10, sfx), \
76 PORT_1(fn, pfx##11, sfx), \
77 PORT_1(fn, pfx##12, sfx), \
78 PORT_1(fn, pfx##13, sfx), \
79 PORT_1(fn, pfx##14, sfx), \
80 PORT_1(fn, pfx##15, sfx)
82 #define CPU_32_PORT_15(fn, pfx, sfx) \
83 PORT_10(fn, pfx, sfx), \
84 PORT_1(fn, pfx##10, sfx), \
85 PORT_1(fn, pfx##11, sfx), \
86 PORT_1(fn, pfx##12, sfx), \
87 PORT_1(fn, pfx##13, sfx), \
88 PORT_1(fn, pfx##14, sfx)
90 #define CPU_32_PORT_4(fn, pfx, sfx) \
91 PORT_1(fn, pfx##0, sfx), \
92 PORT_1(fn, pfx##1, sfx), \
93 PORT_1(fn, pfx##2, sfx), \
94 PORT_1(fn, pfx##3, sfx)
98 /* GP_0_0_DATA -> GP_7_4_DATA */
99 /* except for GP0[16] - [31],
107 #define ES_CPU_ALL_PORT(fn, pfx, sfx) \
108 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
109 CPU_32_PORT_28(fn, pfx##_1_, sfx), \
110 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
111 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
112 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
113 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
114 CPU_32_PORT(fn, pfx##_6_, sfx), \
115 CPU_32_PORT_4(fn, pfx##_7_, sfx)
117 #define CPU_ALL_PORT(fn, pfx, sfx) \
118 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
119 CPU_32_PORT_29(fn, pfx##_1_, sfx), \
120 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
121 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
122 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
123 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
124 CPU_32_PORT(fn, pfx##_6_, sfx), \
125 CPU_32_PORT_4(fn, pfx##_7_, sfx)
127 #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
128 #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
129 GP##pfx##_IN, GP##pfx##_OUT)
131 #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
132 #define _GP_INDT(pfx, sfx) GP##pfx##_DATA
134 #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
135 #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
136 #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
139 #define PORT_10_REV(fn, pfx, sfx) \
140 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
141 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
142 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
143 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
144 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
146 #define CPU_32_PORT_REV(fn, pfx, sfx) \
147 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
148 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
149 PORT_10_REV(fn, pfx, sfx)
151 #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
152 #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
154 #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
155 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
173 PINMUX_FUNCTION_BEGIN,
226 GFN_AVB_AVTP_CAPTURE_A,
227 GFN_AVB_AVTP_MATCH_A,
360 IFN_AVB_AVTP_MATCH_A,
364 IFN_AVB_AVTP_CAPTURE_A,
385 FN_DU_EXODDF_DU_ODDF_DISP_CDE,
397 FN_DU_EXHSYNC_DU_HSYNC,
403 FN_DU_EXVSYNC_DU_VSYNC,
496 FN_AVB_AVTP_CAPTURE_B,
1121 /* sel_msiof3[3](0,1,2,3,4) */
1122 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
1123 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
1125 /* sel_msiof2[2](0,1,2,3) */
1126 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
1127 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
1128 /* sel_msiof1[3](0,1,2,3,4,5,6) */
1129 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
1130 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
1131 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
1133 /* sel_lbsc[1](0,1) */
1134 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
1135 /* sel_iebus[1](0,1) */
1136 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
1137 /* sel_i2c2[1](0,1) */
1138 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
1139 /* sel_i2c1[1](0,1) */
1140 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
1141 /* sel_hscif4[1](0,1) */
1142 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
1143 /* sel_hscif3[2](0,1,2,3) */
1144 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
1145 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
1146 /* sel_hscif1[1](0,1) */
1147 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
1149 /* sel_hscif2[2](0,1,2) */
1150 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
1152 /* sel_etheravb[1](0,1) */
1153 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
1154 /* sel_drif3[1](0,1) */
1155 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
1156 /* sel_drif2[1](0,1) */
1157 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
1158 /* sel_drif1[2](0,1,2) */
1159 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
1161 /* sel_drif0[2](0,1,2) */
1162 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
1164 /* sel_canfd0[1](0,1) */
1165 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
1166 /* sel_adg_a[2](0,1,2) */
1167 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
1172 /* sel_tsif1[2](0,1,2,3) */
1173 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
1174 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
1175 /* sel_tsif0[3](0,1,2,3,4) */
1176 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
1177 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
1179 /* sel_timer_tmu1[1](0,1) */
1180 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
1181 /* sel_ssp1_1[2](0,1,2,3) */
1182 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
1183 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
1184 /* sel_ssp1_0[3](0,1,2,3,4) */
1185 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
1186 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
1188 /* sel_ssi1[1](0,1) */
1189 FN_SEL_SSI_0, FN_SEL_SSI_1,
1190 /* sel_speed_pulse_if[1](0,1) */
1191 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
1192 /* sel_simcard[2](0,1,2,3) */
1193 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
1194 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
1195 /* sel_sdhi2[1](0,1) */
1196 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
1197 /* sel_scif4[2](0,1,2) */
1198 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
1200 /* sel_scif3[1](0,1) */
1201 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
1202 /* sel_scif2[1](0,1) */
1203 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
1204 /* sel_scif1[1](0,1) */
1205 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
1206 /* sel_scif[1](0,1) */
1207 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
1208 /* sel_remocon[1](0,1) */
1209 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
1210 /* reserved[8..7] */
1211 /* sel_rcan0[1](0,1) */
1212 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
1213 /* sel_pwm6[1](0,1) */
1214 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
1215 /* sel_pwm5[1](0,1) */
1216 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
1217 /* sel_pwm4[1](0,1) */
1218 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
1219 /* sel_pwm3[1](0,1) */
1220 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
1221 /* sel_pwm2[1](0,1) */
1222 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
1223 /* sel_pwm1[1](0,1) */
1224 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
1227 /* i2c_sel_5[1](0,1) */
1228 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
1229 /* i2c_sel_3[1](0,1) */
1230 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
1231 /* i2c_sel_0[1](0,1) */
1232 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
1233 /* sel_fm[2](0,1,2,3) */
1234 FN_SEL_FM_0, FN_SEL_FM_1,
1235 FN_SEL_FM_2, FN_SEL_FM_3,
1236 /* sel_scif5[1](0,1) */
1237 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
1238 /* sel_i2c6[3](0,1,2) */
1239 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
1241 /* sel_ndfc[1](0,1) */
1242 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
1243 /* sel_ssi2[1](0,1) */
1244 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
1245 /* sel_ssi9[1](0,1) */
1246 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
1247 /* sel_timer_tmu2[1](0,1) */
1248 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
1249 /* sel_adg_b[1](0,1) */
1250 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
1251 /* sel_adg_c[1](0,1) */
1252 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
1253 /* reserved[16..16] */
1254 /* reserved[15..8] */
1255 /* reserved[7..1] */
1256 /* sel_vin4[1](0,1) */
1257 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
1259 PINMUX_FUNCTION_END,
1313 AVB_AVTP_CAPTURE_A_GMARK,
1314 AVB_AVTP_MATCH_A_GMARK,
1447 AVB_AVTP_MATCH_A_IMARK,
1451 AVB_AVTP_CAPTURE_A_IMARK,
1472 DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
1484 DU_EXHSYNC_DU_HSYNC_MARK,
1490 DU_EXVSYNC_DU_VSYNC_MARK,
1565 AVB_AVTP_MATCH_B_MARK,
1584 AVB_AVTP_CAPTURE_B_MARK,
1769 STP_IVCXO27_0_B_MARK,
1777 STP_ISSYNC_0_B_MARK,
1795 STP_IVCXO27_1_B_MARK,
1807 STP_ISSYNC_1_B_MARK,
1900 STP_ISSYNC_0_C_MARK,
1906 STP_ISSYNC_1_C_MARK,
1908 AUDIO_CLKOUT_C_MARK,
1915 STP_IVCXO27_1_C_MARK,
1988 STP_ISSYNC_0_D_MARK,
1990 AUDIO_CLKOUT1_A_MARK,
1995 STP_IVCXO27_0_D_MARK,
1997 AUDIO_CLKOUT2_A_MARK,
1999 AUDIO_CLKOUT_A_MARK,
2009 STP_IVCXO27_0_C_MARK,
2010 AUDIO_CLKOUT3_A_MARK,
2018 AUDIO_CLKOUT_D_MARK,
2052 STP_IVCXO27_0_A_MARK,
2078 STP_ISSYNC_0_A_MARK,
2116 STP_ISSYNC_1_A_MARK,
2125 STP_IVCXO27_1_A_MARK,
2133 STP_IVCXO27_1_D_MARK,
2168 AUDIO_CLKOUT_B_MARK,
2179 AUDIO_CLKOUT1_B_MARK,
2182 STP_ISSYNC_1_D_MARK,
2183 STP_IVCXO27_0_E_MARK,
2190 AUDIO_CLKOUT2_B_MARK,
2200 AUDIO_CLKOUT3_B_MARK,
2203 STP_ISSYNC_0_E_MARK,
2212 static pinmux_enum_t pinmux_data[] = {
2213 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
2216 PINMUX_DATA(D15_GMARK, GFN_D15),
2217 PINMUX_DATA(D14_GMARK, GFN_D14),
2218 PINMUX_DATA(D13_GMARK, GFN_D13),
2219 PINMUX_DATA(D12_GMARK, GFN_D12),
2220 PINMUX_DATA(D11_GMARK, GFN_D11),
2221 PINMUX_DATA(D10_GMARK, GFN_D10),
2222 PINMUX_DATA(D9_GMARK, GFN_D9),
2223 PINMUX_DATA(D8_GMARK, GFN_D8),
2224 PINMUX_DATA(D7_GMARK, GFN_D7),
2225 PINMUX_DATA(D6_GMARK, GFN_D6),
2226 PINMUX_DATA(D5_GMARK, GFN_D5),
2227 PINMUX_DATA(D4_GMARK, GFN_D4),
2228 PINMUX_DATA(D3_GMARK, GFN_D3),
2229 PINMUX_DATA(D2_GMARK, GFN_D2),
2230 PINMUX_DATA(D1_GMARK, GFN_D1),
2231 PINMUX_DATA(D0_GMARK, GFN_D0),
2234 PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),
2235 PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),
2236 PINMUX_DATA(WE1x_GMARK, GFN_WE1x),
2237 PINMUX_DATA(WE0x_GMARK, GFN_WE0x),
2238 PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),
2239 PINMUX_DATA(RDx_GMARK, GFN_RDx),
2240 PINMUX_DATA(BSx_GMARK, GFN_BSx),
2241 PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),
2242 PINMUX_DATA(CS0x_GMARK, GFN_CS0x),
2243 PINMUX_DATA(A19_GMARK, GFN_A19),
2244 PINMUX_DATA(A18_GMARK, GFN_A18),
2245 PINMUX_DATA(A17_GMARK, GFN_A17),
2246 PINMUX_DATA(A16_GMARK, GFN_A16),
2247 PINMUX_DATA(A15_GMARK, GFN_A15),
2248 PINMUX_DATA(A14_GMARK, GFN_A14),
2249 PINMUX_DATA(A13_GMARK, GFN_A13),
2250 PINMUX_DATA(A12_GMARK, GFN_A12),
2251 PINMUX_DATA(A11_GMARK, GFN_A11),
2252 PINMUX_DATA(A10_GMARK, GFN_A10),
2253 PINMUX_DATA(A9_GMARK, GFN_A9),
2254 PINMUX_DATA(A8_GMARK, GFN_A8),
2255 PINMUX_DATA(A7_GMARK, GFN_A7),
2256 PINMUX_DATA(A6_GMARK, GFN_A6),
2257 PINMUX_DATA(A5_GMARK, GFN_A5),
2258 PINMUX_DATA(A4_GMARK, GFN_A4),
2259 PINMUX_DATA(A3_GMARK, GFN_A3),
2260 PINMUX_DATA(A2_GMARK, GFN_A2),
2261 PINMUX_DATA(A1_GMARK, GFN_A1),
2262 PINMUX_DATA(A0_GMARK, GFN_A0),
2265 PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),
2266 PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),
2267 PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),
2268 PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),
2269 PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),
2270 PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),
2271 PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),
2272 PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),
2273 PINMUX_DATA(PWM0_GMARK, GFN_PWM0),
2274 PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),
2275 PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),
2276 PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),
2277 PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),
2278 PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),
2279 PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),
2282 PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),
2283 PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),
2284 PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),
2285 PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),
2286 PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),
2287 PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),
2288 PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),
2289 PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),
2290 PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),
2291 PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),
2292 PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),
2293 PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),
2294 PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),
2295 PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),
2296 PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),
2297 PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),
2300 PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),
2301 PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),
2302 PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),
2303 PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),
2304 PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),
2305 PINMUX_DATA(SD3_DAT3_GMARK, GFN_SD3_DAT3),
2306 PINMUX_DATA(SD3_DAT2_GMARK, GFN_SD3_DAT2),
2307 PINMUX_DATA(SD3_DAT1_GMARK, GFN_SD3_DAT1),
2308 PINMUX_DATA(SD3_DAT0_GMARK, GFN_SD3_DAT0),
2309 PINMUX_DATA(SD3_CMD_GMARK, GFN_SD3_CMD),
2310 PINMUX_DATA(SD3_CLK_GMARK, GFN_SD3_CLK),
2311 PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),
2312 PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),
2313 PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),
2314 PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),
2315 PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),
2316 PINMUX_DATA(SD2_CMD_GMARK, GFN_SD2_CMD),
2317 PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),
2320 PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),
2321 PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),
2322 PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),
2323 PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),
2324 PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),
2325 PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),
2326 PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),
2327 PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),
2328 PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),
2329 PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),
2330 PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),
2331 PINMUX_DATA(HTX0_GMARK, GFN_HTX0),
2332 PINMUX_DATA(HRX0_GMARK, GFN_HRX0),
2333 PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),
2334 PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),
2335 PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),
2336 PINMUX_DATA(SCK2_GMARK, GFN_SCK2),
2337 PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),
2338 PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),
2339 PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),
2340 PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),
2341 PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),
2342 PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),
2343 PINMUX_DATA(TX0_GMARK, GFN_TX0),
2344 PINMUX_DATA(RX0_GMARK, GFN_RX0),
2345 PINMUX_DATA(SCK0_GMARK, GFN_SCK0),
2348 PINMUX_DATA(USB3_OVC_GMARK, GFN_USB3_OVC),
2349 PINMUX_DATA(USB3_PWEN_GMARK, GFN_USB3_PWEN),
2350 PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),
2351 PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),
2352 PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),
2353 PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),
2354 PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),
2355 PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),
2356 PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),
2357 PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),
2358 PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),
2359 PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),
2360 PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),
2361 PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),
2362 PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),
2363 PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),
2364 PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),
2365 PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),
2366 PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),
2367 PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),
2368 PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),
2369 PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),
2370 PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),
2371 PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),
2372 PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),
2373 PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),
2374 PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),
2375 PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),
2376 PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),
2377 PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),
2378 PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),
2379 PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),
2382 PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),
2383 PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),
2384 PINMUX_DATA(AVS2_MARK, FN_AVS2),
2385 PINMUX_DATA(AVS1_MARK, FN_AVS1),
2388 static struct pinmux_gpio pinmux_gpios[] = {
2389 PINMUX_GPIO_GP_ALL(),
2409 GPIO_GFN(EX_WAIT0_A),
2439 GPIO_GFN(AVB_AVTP_CAPTURE_A),
2440 GPIO_GFN(AVB_AVTP_MATCH_A),
2442 GPIO_GFN(AVB_PHY_INT),
2443 GPIO_GFN(AVB_MAGIC),
2497 GPIO_FN(MSIOF0_RXD),
2498 GPIO_GFN(MSIOF0_SS2),
2499 GPIO_FN(MSIOF0_TXD),
2500 GPIO_GFN(MSIOF0_SS1),
2501 GPIO_GFN(MSIOF0_SYNC),
2502 GPIO_FN(MSIOF0_SCK),
2511 GPIO_GFN(RTS1x_TANS),
2515 GPIO_GFN(RTS0x_TANS),
2523 GPIO_GFN(USB3_PWEN),
2524 GPIO_GFN(USB30_OVC),
2525 GPIO_GFN(USB30_PWEN),
2527 GPIO_GFN(USB1_PWEN),
2529 GPIO_GFN(USB0_PWEN),
2530 GPIO_GFN(AUDIO_CLKB_B),
2531 GPIO_GFN(AUDIO_CLKA_A),
2532 GPIO_GFN(SSI_SDATA9_A),
2533 GPIO_GFN(SSI_SDATA8),
2534 GPIO_GFN(SSI_SDATA7),
2536 GPIO_GFN(SSI_SCK78),
2537 GPIO_GFN(SSI_SDATA6),
2540 GPIO_FN(SSI_SDATA5),
2543 GPIO_GFN(SSI_SDATA4),
2546 GPIO_GFN(SSI_SDATA3),
2548 GPIO_GFN(SSI_SCK34),
2549 GPIO_GFN(SSI_SDATA2_A),
2550 GPIO_GFN(SSI_SDATA1_A),
2551 GPIO_GFN(SSI_SDATA0),
2552 GPIO_GFN(SSI_WS01239),
2553 GPIO_GFN(SSI_SCK01239),
2563 GPIO_FN(MSIOF2_SS2_C),
2564 GPIO_IFN(AVB_MAGIC),
2565 GPIO_FN(MSIOF2_SS1_C),
2567 GPIO_IFN(AVB_PHY_INT),
2568 GPIO_FN(MSIOF2_SYNC_C),
2571 GPIO_FN(MSIOF2_SCK_C),
2573 GPIO_IFN(AVB_AVTP_MATCH_A),
2574 GPIO_FN(MSIOF2_RXD_C),
2576 GPIO_FN(FSCLKST2x_A),
2577 GPIO_IFN(AVB_AVTP_CAPTURE_A),
2578 GPIO_FN(MSIOF2_TXD_C),
2579 GPIO_FN(RTS4x_TANS_A),
2583 GPIO_FN(VI4_DATA0_B),
2585 GPIO_FN(CANFD0_TX_B),
2586 GPIO_FN(MSIOF3_SS2_E),
2590 GPIO_FN(VI4_DATA1_B),
2592 GPIO_FN(CANFD0_RX_B),
2593 GPIO_FN(MSIOF3_SS1_E),
2598 GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),
2599 GPIO_FN(VI4_DATA2_B),
2600 GPIO_FN(MSIOF3_SYNC_E),
2604 GPIO_FN(DU_DOTCLKOUT1),
2605 GPIO_FN(VI4_DATA3_B),
2606 GPIO_FN(MSIOF3_SCK_E),
2610 GPIO_FN(DU_EXHSYNC_DU_HSYNC),
2611 GPIO_FN(VI4_DATA4_B),
2612 GPIO_FN(MSIOF3_RXD_E),
2616 GPIO_FN(DU_EXVSYNC_DU_VSYNC),
2617 GPIO_FN(VI4_DATA5_B),
2618 GPIO_FN(FSCLKST2x_B),
2619 GPIO_FN(MSIOF3_TXD_E),
2622 GPIO_FN(AVB_AVTP_PPS),
2623 GPIO_FN(VI4_DATA6_B),
2627 GPIO_FN(VI4_DATA7_B),
2634 GPIO_FN(MSIOF3_SYNC_B),
2642 GPIO_FN(MSIOF3_TXD_B),
2648 GPIO_FN(MSIOF3_SCK_B),
2649 GPIO_FN(VI4_DATA10),
2654 GPIO_FN(MSIOF3_RXD_B),
2655 GPIO_FN(VI4_DATA11),
2660 GPIO_FN(MSIOF3_SS1_B),
2661 GPIO_FN(VI4_DATA12),
2662 GPIO_FN(VI5_DATA12),
2666 GPIO_FN(MSIOF3_SS2_B),
2668 GPIO_FN(VI4_DATA13),
2669 GPIO_FN(VI5_DATA13),
2673 GPIO_FN(MSIOF2_SS1_A),
2675 GPIO_FN(VI4_DATA14),
2676 GPIO_FN(VI5_DATA14),
2680 GPIO_FN(MSIOF2_SS2_A),
2682 GPIO_FN(VI4_DATA15),
2683 GPIO_FN(V15_DATA15),
2687 GPIO_FN(MSIOF2_SYNC_A),
2690 GPIO_FN(AVB_AVTP_MATCH_B),
2695 GPIO_FN(MSIOF2_SCK_A),
2697 GPIO_FN(VI5_VSYNCx),
2699 GPIO_FN(MSIOF2_RXD_A),
2700 GPIO_FN(RTS4n_TANS_B),
2701 GPIO_FN(VI5_HSYNCx),
2704 GPIO_FN(MSIOF2_TXD_A),
2709 GPIO_FN(AVB_AVTP_CAPTURE_B),
2713 GPIO_FN(MSIOF3_SCK_C),
2719 GPIO_FN(MSIOF3_SYNC_C),
2725 GPIO_FN(MSIOF3_RXD_C),
2727 GPIO_FN(VI5_DATA10),
2731 GPIO_FN(MSIOF3_TXD_C),
2733 GPIO_FN(VI5_DATA11),
2743 GPIO_FN(VI4_VSYNCx),
2747 GPIO_FN(VI4_HSYNCx),
2751 GPIO_FN(VI4_CLKENB),
2754 GPIO_FN(VI5_CLKENB),
2757 GPIO_FN(EX_WAIT0_B),
2760 GPIO_FN(MSIOF3_SCK_D),
2767 GPIO_FN(MSIOF3_SYNC_D),
2771 GPIO_FN(CANFD0_TX_A),
2773 GPIO_FN(MSIOF3_RXD_D),
2777 GPIO_FN(CANFD0_RX_A),
2781 GPIO_FN(MSIIOF3_TXD_D),
2788 GPIO_FN(MSIOF3_SS1_D),
2789 GPIO_FN(RTS3x_TANS),
2795 GPIO_IFN(EX_WAIT0_A),
2798 GPIO_FN(DU_DOTCLKOUT0),
2800 GPIO_FN(MSIOF2_SS1_B),
2801 GPIO_FN(MSIOF3_SCK_A),
2802 GPIO_FN(VI4_DATA16),
2805 GPIO_FN(MSIOF2_SS2_B),
2806 GPIO_FN(MSIOF3_SYNC_A),
2807 GPIO_FN(VI4_DATA17),
2810 GPIO_FN(MSIOF3_RXD_A),
2811 GPIO_FN(VI4_DATA18),
2814 GPIO_FN(MSIOF3_TXD_A),
2815 GPIO_FN(VI4_DATA19),
2818 GPIO_FN(MSIOF2_SCK_B),
2819 GPIO_FN(VI4_DATA20),
2824 GPIO_FN(MSIOF2_SYNC_B),
2825 GPIO_FN(VI4_DATA21),
2828 GPIO_FN(MSIOF2_RXD_B),
2829 GPIO_FN(VI4_DATA22),
2832 GPIO_FN(MSIOF2_TXD_B),
2833 GPIO_FN(VI4_DATA23),
2837 GPIO_FN(MSIOF2_SCK_D),
2839 GPIO_FN(VI4_DATA0_A),
2843 GPIO_FN(MSIOF2_SYNC_D),
2844 GPIO_FN(VI4_DATA1_A),
2848 GPIO_FN(MSIOF2_RXD_D),
2850 GPIO_FN(VI4_DATA2_A),
2855 GPIO_FN(MSIOF2_TXD_D),
2857 GPIO_FN(VI4_DATA3_A),
2858 GPIO_FN(RTS4x_TANS_C),
2862 GPIO_FN(MSIOF2_SS1_D),
2864 GPIO_FN(VI4_DATA4_A),
2870 GPIO_FN(MSIOF2_SS2_D),
2872 GPIO_FN(VI4_DATA5_A),
2876 GPIO_FN(MSIOF3_SS1_A),
2878 GPIO_FN(VI4_DATA6_A),
2883 GPIO_FN(MSIOF3_SS2_A),
2885 GPIO_FN(VI4_DATA7_A),
2890 GPIO_FN(MSIOF1_SCK_E),
2891 GPIO_FN(STP_OPWM_0_B),
2893 GPIO_FN(MSIOF1_SYNC_E),
2894 GPIO_FN(STP_IVCXO27_0_B),
2896 GPIO_FN(MSIOF1_RXD_E),
2898 GPIO_FN(STP_ISCLK_0_B),
2900 GPIO_FN(MSIOF1_TXD_E),
2901 GPIO_FN(TS_SPSYNC0_B),
2902 GPIO_FN(STP_ISSYNC_0_B),
2906 GPIO_FN(MSIOF1_SS1_E),
2907 GPIO_FN(TS_SDAT0_B),
2908 GPIO_FN(STP_ISD_0_B),
2910 GPIO_FN(MSIOF1_SS2_E),
2911 GPIO_FN(TS_SDEN0_B),
2912 GPIO_FN(STP_ISEN_0_B),
2914 GPIO_FN(MSIOF1_SCK_G),
2915 GPIO_FN(SIM0_CLK_A),
2917 GPIO_FN(MSIOF1_SYNC_G),
2920 GPIO_FN(STP_IVCXO27_1_B),
2923 GPIO_FN(MSIOF1_RXD_G),
2926 GPIO_FN(STP_ISCLK_1_B),
2929 GPIO_FN(MSIOF1_TXD_G),
2930 GPIO_FN(NFDATA14_B),
2931 GPIO_FN(TS_SPSYNC1_B),
2932 GPIO_FN(STP_ISSYNC_1_B),
2935 GPIO_FN(MSIOF1_SS1_G),
2936 GPIO_FN(NFDATA15_B),
2937 GPIO_FN(TS_SDAT1_B),
2938 GPIO_FN(STP_IOD_1_B),
2941 GPIO_FN(MSIOF1_SS2_G),
2943 GPIO_FN(TS_SDEN1_B),
2944 GPIO_FN(STP_ISEN_1_B),
2961 GPIO_FN(SATA_DEVSLP_B),
2993 GPIO_FN(NFDATA14_A),
2995 GPIO_FN(SIM0_RST_A),
2997 GPIO_FN(NFDATA15_A),
3001 GPIO_FN(SIM0_CLK_B),
3007 GPIO_FN(MSIOF1_SS2_B),
3008 GPIO_FN(AUDIO_CLKC_B),
3010 GPIO_FN(SIM0_RST_B),
3011 GPIO_FN(STP_OPWM_0_C),
3012 GPIO_FN(RIF0_CLK_B),
3018 GPIO_FN(STP_ISCLK_0_C),
3024 GPIO_FN(TS_SPSYNC0_C),
3025 GPIO_FN(STP_ISSYNC_0_C),
3029 GPIO_FN(MSIOF1_SYNC_B),
3030 GPIO_FN(TS_SPSYNC1_C),
3031 GPIO_FN(STP_ISSYNC_1_C),
3032 GPIO_FN(RIF1_SYNC_B),
3033 GPIO_FN(AUDIO_CLKOUT_C),
3034 GPIO_FN(ADICS_SAMP),
3035 GPIO_IFN(RTS0x_TANS),
3037 GPIO_FN(MSIOF1_SS1_B),
3038 GPIO_FN(AUDIO_CLKA_B),
3040 GPIO_FN(STP_IVCXO27_1_C),
3041 GPIO_FN(RIF0_SYNC_B),
3045 GPIO_FN(TS_SDAT0_C),
3046 GPIO_FN(STP_ISD_0_C),
3047 GPIO_FN(RIF1_CLK_C),
3050 GPIO_FN(TS_SDEN0_C),
3051 GPIO_FN(STP_ISEN_0_C),
3055 GPIO_FN(MSIOF1_RXD_B),
3056 GPIO_FN(TS_SDEN1_C),
3057 GPIO_FN(STP_ISEN_1_C),
3060 GPIO_IFN(RTS1x_TANS),
3062 GPIO_FN(MSIOF1_TXD_B),
3063 GPIO_FN(TS_SDAT1_C),
3064 GPIO_FN(STP_ISD_1_C),
3068 GPIO_FN(SCIF_CLK_B),
3069 GPIO_FN(MSIOF1_SCK_B),
3071 GPIO_FN(STP_ISCLK_1_C),
3072 GPIO_FN(RIF1_CLK_B),
3081 GPIO_FN(FSO_CFE_0x),
3086 GPIO_FN(RIF1_SYNC_C),
3087 GPIO_FN(FSO_CFE_1x),
3089 GPIO_FN(MSIOF1_SCK_D),
3090 GPIO_FN(AUDIO_CLKB_A),
3091 GPIO_FN(SSI_SDATA1_B),
3093 GPIO_FN(STP_ISCLK_0_D),
3094 GPIO_FN(RIF0_CLK_C),
3097 GPIO_FN(MSIOF1_RXD_D),
3098 GPIO_FN(SSI_SDATA2_B),
3099 GPIO_FN(TS_SDEN0_D),
3100 GPIO_FN(STP_ISEN_0_D),
3103 GPIO_FN(MSIOF1_TXD_D),
3104 GPIO_FN(SSI_SDATA9_B),
3105 GPIO_FN(TS_SDAT0_D),
3106 GPIO_FN(STP_ISD_0_D),
3110 GPIO_FN(MSIOF1_SYNC_D),
3111 GPIO_FN(SSI_SCK9_A),
3112 GPIO_FN(TS_SPSYNC0_D),
3113 GPIO_FN(STP_ISSYNC_0_D),
3114 GPIO_FN(RIF0_SYNC_C),
3115 GPIO_FN(AUDIO_CLKOUT1_A),
3118 GPIO_FN(MSIOF1_SS1_D),
3120 GPIO_FN(STP_IVCXO27_0_D),
3122 GPIO_FN(AUDIO_CLKOUT2_A),
3123 GPIO_IFN(MSIOF0_SYNC),
3124 GPIO_FN(AUDIO_CLKOUT_A),
3129 GPIO_IFN(MSIOF0_SS1),
3132 GPIO_FN(AUDIO_CLKA_C),
3133 GPIO_FN(SSI_SCK2_A),
3134 GPIO_FN(STP_IVCXO27_0_C),
3135 GPIO_FN(AUDIO_CLKOUT3_A),
3137 GPIO_IFN(MSIOF0_SS2),
3139 GPIO_FN(MSIOF1_SS2_D),
3140 GPIO_FN(AUDIO_CLKC_A),
3142 GPIO_FN(STP_OPWM_0_D),
3143 GPIO_FN(AUDIO_CLKOUT_D),
3146 GPIO_FN(MSIOF1_SCK_F),
3150 GPIO_FN(MSIOF1_SYNC_F),
3154 GPIO_FN(MSIOF1_RXD_F),
3155 GPIO_IFN(SSI_SCK01239),
3156 GPIO_FN(MSIOF1_TXD_F),
3158 GPIO_IFN(SSI_WS01239),
3159 GPIO_FN(MSIOF1_SS1_F),
3161 GPIO_IFN(SSI_SDATA0),
3162 GPIO_FN(MSIOF1_SS2_F),
3166 GPIO_IFN(SSI_SDATA1_A),
3168 GPIO_IFN(SSI_SDATA2_A),
3169 GPIO_FN(SSI_SCK1_B),
3171 GPIO_IFN(SSI_SCK34),
3172 GPIO_FN(MSIOF1_SS1_A),
3173 GPIO_FN(STP_OPWM_0_A),
3176 GPIO_FN(MSIOF1_SS2_A),
3177 GPIO_FN(STP_IVCXO27_0_A),
3178 GPIO_IFN(SSI_SDATA3),
3180 GPIO_FN(MSIOF1_TXD_A),
3182 GPIO_FN(STP_ISCLK_0_A),
3187 GPIO_FN(MSIOF1_SCK_A),
3188 GPIO_FN(TS_SDAT0_A),
3189 GPIO_FN(STP_ISD_0_A),
3190 GPIO_FN(RIF0_CLK_A),
3191 GPIO_FN(RIF2_CLK_A),
3194 GPIO_FN(MSIOF1_SYNC_A),
3195 GPIO_FN(TS_SDEN0_A),
3196 GPIO_FN(STP_ISEN_0_A),
3197 GPIO_FN(RIF0_SYNC_A),
3198 GPIO_FN(RIF2_SYNC_A),
3199 GPIO_IFN(SSI_SDATA4),
3201 GPIO_FN(MSIOF1_RXD_A),
3202 GPIO_FN(TS_SPSYNC0_A),
3203 GPIO_FN(STP_ISSYNC_0_A),
3209 GPIO_FN(SIM0_RST_D),
3212 GPIO_IFN(SSI_SDATA6),
3213 GPIO_FN(SIM0_CLK_D),
3214 GPIO_FN(SATA_DEVSLP_A),
3215 GPIO_IFN(SSI_SCK78),
3217 GPIO_FN(MSIOF1_SCK_C),
3219 GPIO_FN(STP_ISCLK_1_A),
3220 GPIO_FN(RIF1_CLK_A),
3221 GPIO_FN(RIF3_CLK_A),
3224 GPIO_FN(MSIOF1_SYNC_C),
3225 GPIO_FN(TS_SDAT1_A),
3226 GPIO_FN(STP_ISD_1_A),
3227 GPIO_FN(RIF1_SYNC_A),
3228 GPIO_FN(RIF3_SYNC_A),
3229 GPIO_IFN(SSI_SDATA7),
3231 GPIO_FN(MSIOF1_RXD_C),
3232 GPIO_FN(TS_SDEN1_A),
3233 GPIO_FN(STP_ISEN_1_A),
3237 GPIO_IFN(SSI_SDATA8),
3239 GPIO_FN(MSIOF1_TXD_C),
3240 GPIO_FN(TS_SPSYNC1_A),
3241 GPIO_FN(STP_ISSYNC_1_A),
3244 GPIO_IFN(SSI_SDATA9_A),
3246 GPIO_FN(MSIOF1_SS1_C),
3250 GPIO_FN(STP_IVCXO27_1_A),
3254 GPIO_IFN(AUDIO_CLKA_A),
3255 GPIO_FN(CC5_OSCOUT),
3256 GPIO_IFN(AUDIO_CLKB_B),
3257 GPIO_FN(SCIF_CLK_A),
3258 GPIO_FN(STP_IVCXO27_1_D),
3261 GPIO_IFN(USB0_PWEN),
3262 GPIO_FN(SIM0_RST_C),
3264 GPIO_FN(STP_ISCLK_1_D),
3266 GPIO_FN(RIF3_CLK_B),
3270 GPIO_FN(TS_SDAT1_D),
3271 GPIO_FN(STP_ISD_1_D),
3272 GPIO_FN(RIF3_SYNC_B),
3274 GPIO_IFN(USB1_PWEN),
3275 GPIO_FN(SIM0_CLK_C),
3276 GPIO_FN(SSI_SCK1_A),
3278 GPIO_FN(STP_ISCLK_0_E),
3280 GPIO_FN(RIF2_CLK_B),
3284 GPIO_FN(MSIOF1_SS2_C),
3286 GPIO_FN(TS_SDAT0_E),
3287 GPIO_FN(STP_ISD_0_E),
3289 GPIO_FN(RIF2_SYNC_B),
3292 GPIO_IFN(USB30_PWEN),
3293 GPIO_FN(AUDIO_CLKOUT_B),
3294 GPIO_FN(SSI_SCK2_B),
3295 GPIO_FN(TS_SDEN1_D),
3296 GPIO_FN(STP_ISEN_1_D),
3297 GPIO_FN(STP_OPWM_0_E),
3303 GPIO_IFN(USB30_OVC),
3304 GPIO_FN(AUDIO_CLKOUT1_B),
3306 GPIO_FN(TS_SPSYNC1_D),
3307 GPIO_FN(STP_ISSYNC_1_D),
3308 GPIO_FN(STP_IVCXO27_0_E),
3314 GPIO_IFN(USB3_PWEN),
3315 GPIO_FN(AUDIO_CLKOUT2_B),
3316 GPIO_FN(SSI_SCK9_B),
3317 GPIO_FN(TS_SDEN0_E),
3318 GPIO_FN(STP_ISEN_0_E),
3325 GPIO_FN(AUDIO_CLKOUT3_B),
3327 GPIO_FN(TS_SPSYNC0_E),
3328 GPIO_FN(STP_ISSYNC_0_E),
3335 static struct pinmux_cfg_reg pinmux_config_regs[] = {
3336 /* GPSR0(0xE6060100) md[3:1] controls initial value */
3337 /* md[3:1] .. 0 : 0x0000FFFF */
3338 /* .. other : 0x00000000 */
3339 { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) {
3358 GP_0_15_FN, GFN_D15,
3359 GP_0_14_FN, GFN_D14,
3360 GP_0_13_FN, GFN_D13,
3361 GP_0_12_FN, GFN_D12,
3362 GP_0_11_FN, GFN_D11,
3363 GP_0_10_FN, GFN_D10,
3375 /* GPSR1(0xE6060104) is md[3:1] controls initial value */
3376 /* md[3:1] .. 0 : 0x0EFFFFFF */
3377 /* .. other : 0x00000000 */
3378 { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) {
3382 GP_1_28_FN, GFN_CLKOUT,
3383 GP_1_27_FN, GFN_EX_WAIT0_A,
3384 GP_1_26_FN, GFN_WE1x,
3385 GP_1_25_FN, GFN_WE0x,
3386 GP_1_24_FN, GFN_RD_WRx,
3387 GP_1_23_FN, GFN_RDx,
3388 GP_1_22_FN, GFN_BSx,
3389 GP_1_21_FN, GFN_CS1x_A26,
3390 GP_1_20_FN, GFN_CS0x,
3391 GP_1_19_FN, GFN_A19,
3392 GP_1_18_FN, GFN_A18,
3393 GP_1_17_FN, GFN_A17,
3394 GP_1_16_FN, GFN_A16,
3395 GP_1_15_FN, GFN_A15,
3396 GP_1_14_FN, GFN_A14,
3397 GP_1_13_FN, GFN_A13,
3398 GP_1_12_FN, GFN_A12,
3399 GP_1_11_FN, GFN_A11,
3400 GP_1_10_FN, GFN_A10,
3412 /* GPSR2(0xE6060108) is md[3:1] controls */
3413 /* md[3:1] .. 0 : 0x000003C0 */
3414 /* .. other : 0x00000200 */
3415 { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) {
3435 GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,
3436 GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,
3437 GP_2_12_FN, GFN_AVB_LINK,
3438 GP_2_11_FN, GFN_AVB_PHY_INT,
3439 GP_2_10_FN, GFN_AVB_MAGIC,
3440 GP_2_9_FN, GFN_AVB_MDC,
3441 GP_2_8_FN, GFN_PWM2_A,
3442 GP_2_7_FN, GFN_PWM1_A,
3443 GP_2_6_FN, GFN_PWM0,
3444 GP_2_5_FN, GFN_IRQ5,
3445 GP_2_4_FN, GFN_IRQ4,
3446 GP_2_3_FN, GFN_IRQ3,
3447 GP_2_2_FN, GFN_IRQ2,
3448 GP_2_1_FN, GFN_IRQ1,
3449 GP_2_0_FN, GFN_IRQ0 }
3453 { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) {
3472 GP_3_15_FN, GFN_SD1_WP,
3473 GP_3_14_FN, GFN_SD1_CD,
3474 GP_3_13_FN, GFN_SD0_WP,
3475 GP_3_12_FN, GFN_SD0_CD,
3476 GP_3_11_FN, GFN_SD1_DAT3,
3477 GP_3_10_FN, GFN_SD1_DAT2,
3478 GP_3_9_FN, GFN_SD1_DAT1,
3479 GP_3_8_FN, GFN_SD1_DAT0,
3480 GP_3_7_FN, GFN_SD1_CMD,
3481 GP_3_6_FN, GFN_SD1_CLK,
3482 GP_3_5_FN, GFN_SD0_DAT3,
3483 GP_3_4_FN, GFN_SD0_DAT2,
3484 GP_3_3_FN, GFN_SD0_DAT1,
3485 GP_3_2_FN, GFN_SD0_DAT0,
3486 GP_3_1_FN, GFN_SD0_CMD,
3487 GP_3_0_FN, GFN_SD0_CLK }
3490 { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) {
3506 GP_4_17_FN, GFN_SD3_DS,
3507 GP_4_16_FN, GFN_SD3_DAT7,
3509 GP_4_15_FN, GFN_SD3_DAT6,
3510 GP_4_14_FN, GFN_SD3_DAT5,
3511 GP_4_13_FN, GFN_SD3_DAT4,
3512 GP_4_12_FN, GFN_SD3_DAT3,
3513 GP_4_11_FN, GFN_SD3_DAT2,
3514 GP_4_10_FN, GFN_SD3_DAT1,
3515 GP_4_9_FN, GFN_SD3_DAT0,
3516 GP_4_8_FN, GFN_SD3_CMD,
3517 GP_4_7_FN, GFN_SD3_CLK,
3518 GP_4_6_FN, GFN_SD2_DS,
3519 GP_4_5_FN, GFN_SD2_DAT3,
3520 GP_4_4_FN, GFN_SD2_DAT2,
3521 GP_4_3_FN, GFN_SD2_DAT1,
3522 GP_4_2_FN, GFN_SD2_DAT0,
3523 GP_4_1_FN, GFN_SD2_CMD,
3524 GP_4_0_FN, GFN_SD2_CLK }
3527 { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) {
3534 GP_5_25_FN, GFN_MLB_DAT,
3535 GP_5_24_FN, GFN_MLB_SIG,
3536 GP_5_23_FN, GFN_MLB_CLK,
3537 GP_5_22_FN, FN_MSIOF0_RXD,
3538 GP_5_21_FN, GFN_MSIOF0_SS2,
3539 GP_5_20_FN, FN_MSIOF0_TXD,
3540 GP_5_19_FN, GFN_MSIOF0_SS1,
3541 GP_5_18_FN, GFN_MSIOF0_SYNC,
3542 GP_5_17_FN, FN_MSIOF0_SCK,
3543 GP_5_16_FN, GFN_HRTS0x,
3544 GP_5_15_FN, GFN_HCTS0x,
3545 GP_5_14_FN, GFN_HTX0,
3546 GP_5_13_FN, GFN_HRX0,
3547 GP_5_12_FN, GFN_HSCK0,
3548 GP_5_11_FN, GFN_RX2_A,
3549 GP_5_10_FN, GFN_TX2_A,
3550 GP_5_9_FN, GFN_SCK2,
3551 GP_5_8_FN, GFN_RTS1x_TANS,
3552 GP_5_7_FN, GFN_CTS1x,
3553 GP_5_6_FN, GFN_TX1_A,
3554 GP_5_5_FN, GFN_RX1_A,
3555 GP_5_4_FN, GFN_RTS0x_TANS,
3556 GP_5_3_FN, GFN_CTS0x,
3559 GP_5_0_FN, GFN_SCK0 }
3562 { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) {
3563 GP_6_31_FN, GFN_USB3_OVC,
3564 GP_6_30_FN, GFN_USB3_PWEN,
3565 GP_6_29_FN, GFN_USB30_OVC,
3566 GP_6_28_FN, GFN_USB30_PWEN,
3567 GP_6_27_FN, GFN_USB1_OVC,
3568 GP_6_26_FN, GFN_USB1_PWEN,
3569 GP_6_25_FN, GFN_USB0_OVC,
3570 GP_6_24_FN, GFN_USB0_PWEN,
3571 GP_6_23_FN, GFN_AUDIO_CLKB_B,
3572 GP_6_22_FN, GFN_AUDIO_CLKA_A,
3573 GP_6_21_FN, GFN_SSI_SDATA9_A,
3574 GP_6_20_FN, GFN_SSI_SDATA8,
3575 GP_6_19_FN, GFN_SSI_SDATA7,
3576 GP_6_18_FN, GFN_SSI_WS78,
3577 GP_6_17_FN, GFN_SSI_SCK78,
3578 GP_6_16_FN, GFN_SSI_SDATA6,
3579 GP_6_15_FN, GFN_SSI_WS6,
3580 GP_6_14_FN, GFN_SSI_SCK6,
3581 GP_6_13_FN, FN_SSI_SDATA5,
3582 GP_6_12_FN, FN_SSI_WS5,
3583 GP_6_11_FN, FN_SSI_SCK5,
3584 GP_6_10_FN, GFN_SSI_SDATA4,
3585 GP_6_9_FN, GFN_SSI_WS4,
3586 GP_6_8_FN, GFN_SSI_SCK4,
3587 GP_6_7_FN, GFN_SSI_SDATA3,
3588 GP_6_6_FN, GFN_SSI_WS34,
3589 GP_6_5_FN, GFN_SSI_SCK34,
3590 GP_6_4_FN, GFN_SSI_SDATA2_A,
3591 GP_6_3_FN, GFN_SSI_SDATA1_A,
3592 GP_6_2_FN, GFN_SSI_SDATA0,
3593 GP_6_1_FN, GFN_SSI_WS01239,
3594 GP_6_0_FN, GFN_SSI_SCK01239 }
3597 { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) {
3629 GP_7_3_FN, FN_HDMI1_CEC,
3630 GP_7_2_FN, FN_HDMI0_CEC,
3632 GP_7_0_FN, FN_AVS1 }
3634 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3635 4, 4, 4, 4, 4, 4, 4, 4) {
3636 /* IPSR0_31_28 [4] */
3637 IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,
3638 FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B, FN_MSIOF3_SS1_E,
3641 /* IPSR0_27_24 [4] */
3642 IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,
3643 FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B, FN_MSIOF3_SS2_E,
3646 /* IPSR0_23_20 [4] */
3647 IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,
3651 /* IPSR0_19_16 [4] */
3652 IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,
3653 0, FN_FSCLKST2x_A, 0, 0,
3656 /* IPSR0_15_12 [4] */
3657 IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,
3661 /* IPSR0_11_8 [4] */
3662 IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,
3667 IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,
3672 IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,
3678 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3679 4, 4, 4, 4, 4, 4, 4, 4) {
3680 /* IPSR1_31_28 [4] */
3681 IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,
3682 FN_VI4_DATA8, 0, FN_DU_DB0, 0,
3685 /* IPSR1_27_24 [4] */
3686 IFN_PWM2_A, 0, 0, FN_HTX3_D,
3690 /* IPSR1_23_20 [4] */
3691 IFN_PWM1_A, 0, 0, FN_HRX3_D,
3692 FN_VI4_DATA7_B, 0, 0, 0,
3695 /* IPSR1_19_16 [4] */
3696 IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,
3697 FN_VI4_DATA6_B, 0, 0, 0,
3698 0, FN_IECLK_B, 0, 0,
3700 /* IPSR1_15_12 [4] */
3701 IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,
3702 FN_VI4_DATA5_B, FN_FSCLKST2x_B, 0, FN_MSIOF3_TXD_E,
3705 /* IPSR1_11_8 [4] */
3706 IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,
3707 FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,
3711 IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,
3712 FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,
3716 IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,
3717 FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,
3722 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3723 4, 4, 4, 4, 4, 4, 4, 4) {
3724 /* IPSR2_31_28 [4] */
3725 IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,
3727 FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,
3729 /* IPSR2_27_24 [4] */
3730 IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,
3731 FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,
3734 /* IPSR2_23_20 [4] */
3735 IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,
3736 FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,
3739 /* IPSR2_19_16 [4] */
3740 IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,
3741 FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,
3744 /* IPSR2_15_12 [4] */
3745 IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,
3746 FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,
3749 /* IPSR2_11_8 [4] */
3750 IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,
3751 FN_VI4_DATA11, 0, FN_DU_DB3, 0,
3755 IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,
3756 FN_VI4_DATA10, 0, FN_DU_DB2, 0,
3760 IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,
3761 FN_VI4_DATA9, 0, FN_DU_DB1, 0,
3766 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3767 4, 4, 4, 4, 4, 4, 4, 4) {
3768 /* IPSR3_31_28 [4] */
3769 IFN_A16, FN_LCDOUT8, 0, 0,
3770 FN_VI4_FIELD, 0, FN_DU_DG0, 0,
3773 /* IPSR3_27_24 [4] */
3774 IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,
3775 FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,
3778 /* IPSR3_23_20 [4] */
3779 IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,
3780 FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,
3783 /* IPSR3_19_16 [4] */
3784 IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,
3785 FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,
3788 /* IPSR3_15_12 [4] */
3789 IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,
3790 FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,
3793 /* IPSR3_11_8 [4] */
3794 IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,
3795 FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,
3796 FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, 0, 0,
3799 IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,
3800 0, FN_VI5_HSYNCx, 0, 0,
3804 IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,
3805 0, FN_VI5_VSYNCx, 0, 0,
3810 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
3811 4, 4, 4, 4, 4, 4, 4, 4) {
3812 /* IPSR4_31_28 [4] */
3813 IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,
3815 FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,
3817 /* IPSR4_27_24 [4] */
3818 IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,
3820 FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,
3822 /* IPSR4_23_20 [4] */
3823 IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,
3825 FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,
3827 /* IPSR4_19_16 [4] */
3828 IFN_CS1x_A26, 0, 0, 0,
3829 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,
3832 /* IPSR4_15_12 [4] */
3834 0, FN_VI5_CLKENB, 0, 0,
3837 /* IPSR4_11_8 [4] */
3838 IFN_A19, FN_LCDOUT11, 0, 0,
3839 FN_VI4_CLKENB, 0, FN_DU_DG3, 0,
3843 IFN_A18, FN_LCDOUT10, 0, 0,
3844 FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,
3848 IFN_A17, FN_LCDOUT9, 0, 0,
3849 FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,
3854 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
3855 4, 4, 4, 4, 4, 4, 4, 4) {
3856 /* IPSR5_31_28 [4] */
3857 IFN_D4, FN_MSIOF2_SCK_B, 0, 0,
3858 FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,
3861 /* IPSR5_27_24 [4] */
3862 IFN_D3, 0, FN_MSIOF3_TXD_A, 0,
3863 FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,
3866 /* IPSR5_23_20 [4] */
3867 IFN_D2, 0, FN_MSIOF3_RXD_A, 0,
3868 FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,
3871 /* IPSR5_19_16 [4] */
3872 IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,
3873 FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,
3876 /* IPSR5_15_12 [4] */
3877 IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,
3878 FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,
3881 /* IPSR5_11_8 [4] */
3882 IFN_EX_WAIT0_A, FN_QCLK, 0, 0,
3883 FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,
3887 IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,
3888 FN_HRTS3x, 0, 0, FN_SDA6_B,
3889 FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,
3892 IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,
3893 FN_HCTS3x, 0, 0, FN_SCL6_B,
3894 FN_CAN_CLK, 0, FN_IECLK_A, 0,
3898 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
3899 4, 4, 4, 4, 4, 4, 4, 4) {
3900 /* IPSR6_31_28 [4] */
3901 IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,
3902 FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,
3905 /* IPSR6_27_24 [4] */
3906 IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,
3907 FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,
3910 /* IPSR6_23_20 [4] */
3911 IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,
3912 FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,
3915 /* IPSR6_19_16 [4] */
3916 IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,
3917 FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,
3920 /* IPSR6_15_12 [4] */
3921 IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,
3922 FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,
3925 /* IPSR6_11_8 [4] */
3926 IFN_D7, FN_MSIOF2_TXD_B, 0, 0,
3927 FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,
3931 IFN_D6, FN_MSIOF2_RXD_B, 0, 0,
3932 FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,
3936 IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,
3937 FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,
3942 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
3943 4, 4, 4, 4, 4, 4, 4, 4) {
3944 /* IPSR7_31_28 [4] */
3945 IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,
3946 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,
3949 /* IPSR7_27_24 [4] */
3950 IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,
3951 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,
3954 /* IPSR7_23_20 [4] */
3955 IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,
3956 0, 0, FN_STP_IVCXO27_0_B, 0,
3959 /* IPSR7_19_16 [4] */
3960 IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,
3961 0, 0, FN_STP_OPWM_0_B, 0,
3964 /* IPSR7_15_12 [4] */
3965 FN_FSCLKST, 0, 0, 0,
3969 /* IPSR7_11_8 [4] */
3970 IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,
3971 FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,
3975 IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,
3976 FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,
3980 IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,
3981 FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,
3986 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
3987 4, 4, 4, 4, 4, 4, 4, 4) {
3988 /* IPSR8_31_28 [4] */
3989 IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G, FN_NFRBx_B,
3990 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,
3993 /* IPSR8_27_24 [4] */
3994 IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G, FN_NFDATA15_B,
3995 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,
3998 /* IPSR8_23_20 [4] */
3999 IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G, FN_NFDATA14_B,
4000 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,
4003 /* IPSR8_19_16 [4] */
4004 IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G, FN_NFWPx_B,
4005 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,
4008 /* IPSR8_15_12 [4] */
4009 IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G, FN_NFCEx_B,
4010 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,
4013 /* IPSR8_11_8 [4] */
4014 IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,
4015 0, FN_SIM0_CLK_A, 0, 0,
4019 IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,
4020 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,
4024 IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,
4025 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,
4030 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
4031 4, 4, 4, 4, 4, 4, 4, 4) {
4032 /* IPSR9_31_28 [4] */
4033 IFN_SD3_CLK, 0, FN_NFWEx, 0,
4037 /* IPSR9_27_24 [4] */
4038 IFN_SD2_DS, 0, FN_NFALE, 0,
4040 FN_SATA_DEVSLP_B, 0, 0, 0,
4042 /* IPSR9_23_20 [4] */
4043 IFN_SD2_DAT3, 0, FN_NFDATA13, 0,
4047 /* IPSR9_19_16 [4] */
4048 IFN_SD2_DAT2, 0, FN_NFDATA12, 0,
4052 /* IPSR9_15_12 [4] */
4053 IFN_SD2_DAT1, 0, FN_NFDATA11, 0,
4057 /* IPSR9_11_8 [4] */
4058 IFN_SD2_DAT0, 0, FN_NFDATA10, 0,
4063 IFN_SD2_CMD, 0, FN_NFDATA9, 0,
4068 IFN_SD2_CLK, 0, FN_NFDATA8, 0,
4074 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
4075 4, 4, 4, 4, 4, 4, 4, 4) {
4076 /* IPSR10_31_28 [4] */
4077 IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,
4081 /* IPSR10_27_24 [4] */
4082 IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,
4086 /* IPSR10_23_20 [4] */
4087 IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,
4091 /* IPSR10_19_16 [4] */
4092 IFN_SD3_DAT3, 0, FN_NFDATA3, 0,
4096 /* IPSR10_15_12 [4] */
4097 IFN_SD3_DAT2, 0, FN_NFDATA2, 0,
4101 /* IPSR10_11_8 [4] */
4102 IFN_SD3_DAT1, 0, FN_NFDATA1, 0,
4106 /* IPSR10_7_4 [4] */
4107 IFN_SD3_DAT0, 0, FN_NFDATA0, 0,
4111 /* IPSR10_3_0 [4] */
4112 IFN_SD3_CMD, 0, FN_NFREx, 0,
4118 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
4119 4, 4, 4, 4, 4, 4, 4, 4) {
4120 /* IPSR11_31_28 [4] */
4121 IFN_RX0, FN_HRX1_B, 0, 0,
4122 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,
4125 /* IPSR11_27_24 [4] */
4126 IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,
4127 FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C, FN_RIF0_CLK_B,
4128 FN_ADICHS2, FN_SCK5_B, 0, 0,
4130 /* IPSR11_23_20 [4] */
4131 IFN_SD1_WP, 0, FN_NFCEx_A, 0,
4132 0, FN_SIM0_D_B, 0, 0,
4135 /* IPSR11_19_16 [4] */
4136 IFN_SD1_CD, 0, FN_NFRBx_A, 0,
4137 0, FN_SIM0_CLK_B, 0, 0,
4140 /* IPSR11_15_12 [4] */
4141 IFN_SD0_WP, 0, FN_NFDATA15_A, 0,
4145 /* IPSR11_11_8 [4] */
4146 IFN_SD0_CD, 0, FN_NFDATA14_A, 0,
4147 FN_SCL2_B, FN_SIM0_RST_A, 0, 0,
4150 /* IPSR11_7_4 [4] */
4151 IFN_SD3_DS, 0, FN_NFCLE, 0,
4155 /* IPSR11_3_0 [4] */
4156 IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,
4162 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4163 4, 4, 4, 4, 4, 4, 4, 4) {
4164 /* IPSR12_31_28 [4] */
4165 IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,
4166 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,
4169 /* IPSR12_27_24 [4] */
4170 IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,
4171 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,
4172 0, FN_ADICHS0, 0, 0,
4174 /* IPSR12_23_20 [4] */
4175 IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,
4176 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,
4177 0, FN_ADIDATA, 0, 0,
4179 /* IPSR12_19_16 [4] */
4180 IFN_TX1_A, FN_HTX1_A, 0, 0,
4181 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,
4184 /* IPSR12_15_12 [4] */
4185 IFN_RX1_A, FN_HRX1_A, 0, 0,
4186 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,
4189 /* IPSR12_11_8 [4] */
4190 IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,
4191 FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,
4192 0, FN_ADICHS1, 0, 0,
4194 /* IPSR12_7_4 [4] */
4195 IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,
4196 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,
4197 FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,
4199 /* IPSR12_3_0 [4] */
4200 IFN_TX0, FN_HTX1_B, 0, 0,
4201 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,
4205 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
4206 4, 4, 4, 4, 4, 4, 4, 4) {
4207 /* IPSR13_31_28 [4] */
4208 IFN_MSIOF0_SYNC, 0, 0, 0,
4210 FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,
4211 0, FN_BPFCLK_D, 0, 0,
4212 /* IPSR13_27_24 [4] */
4213 IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,
4214 FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,
4215 FN_AUDIO_CLKOUT2_A, 0, 0, 0,
4217 /* IPSR13_23_20 [4] */
4218 IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,
4219 FN_SSI_SCK9_A, FN_TS_SPSYNC0_D,
4220 FN_STP_ISSYNC_0_D, FN_RIF0_SYNC_C,
4221 FN_AUDIO_CLKOUT1_A, 0, 0, 0,
4223 /* IPSR13_19_16 [4] */
4224 IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,
4225 FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,
4228 /* IPSR13_15_12 [4] */
4229 IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,
4230 FN_SSI_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,
4233 /* IPSR13_11_8 [4] */
4234 IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,
4235 FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,
4238 /* IPSR13_7_4 [4] */
4239 IFN_RX2_A, 0, 0, FN_SD2_WP_B,
4240 FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,
4241 0, FN_FSO_CFE_1x, 0, 0,
4243 /* IPSR13_3_0 [4] */
4244 IFN_TX2_A, 0, 0, FN_SD2_CD_B,
4245 FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,
4246 0, FN_FSO_CFE_0x, 0, 0,
4249 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
4250 4, 4, 4, 4, 4, 4, 4, 4) {
4251 /* IPSR14_31_28 [4] */
4252 IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,
4256 /* IPSR14_27_24 [4] */
4257 IFN_SSI_WS01239, 0, FN_MSIOF1_SS1_F, 0,
4258 0, 0, 0, 0, FN_MOUT1,
4261 /* IPSR14_23_20 [4] */
4262 IFN_SSI_SCK01239, 0, FN_MSIOF1_TXD_F, 0,
4266 /* IPSR14_19_16 [4] */
4267 IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,
4271 /* IPSR14_15_12 [4] */
4272 IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,
4276 /* IPSR14_11_8 [4] */
4277 IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,
4281 /* IPSR14_7_4 [4] */
4282 IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,
4283 FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,
4284 FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,
4286 /* IPSR14_3_0 [4] */
4287 IFN_MSIOF0_SS1, FN_RX5_A, FN_NFWPx_A, FN_AUDIO_CLKA_C,
4288 FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,
4289 FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,
4293 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
4294 4, 4, 4, 4, 4, 4, 4, 4) {
4295 /* IPSR15_31_28 [4] */
4296 IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,
4297 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,
4298 FN_RIF2_D1_A, 0, 0, 0,
4300 /* IPSR15_27_24 [4] */
4301 IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,
4302 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,
4303 FN_RIF2_SYNC_A, 0, 0, 0,
4305 /* IPSR15_23_20 [4] */
4306 IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,
4307 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,
4308 FN_RIF2_CLK_A, 0, 0, 0,
4310 /* IPSR15_19_16 [4] */
4311 IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,
4312 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,
4313 FN_RIF2_D0_A, 0, 0, 0,
4315 /* IPSR15_15_12 [4] */
4316 IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,
4317 0, 0, FN_STP_IVCXO27_0_A, 0,
4320 /* IPSR15_11_8 [4] */
4321 IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,
4322 0, 0, FN_STP_OPWM_0_A, 0,
4325 /* IPSR15_7_4 [4] */
4326 IFN_SSI_SDATA2_A, 0, 0, 0,
4327 FN_SSI_SCK1_B, 0, 0, FN_MOUT6,
4330 /* IPSR15_3_0 [4] */
4331 IFN_SSI_SDATA1_A, 0, 0, 0,
4337 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
4338 4, 4, 4, 4, 4, 4, 4, 4) {
4339 /* IPSR16_31_28 [4] */
4340 IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,
4341 FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5_A,
4344 /* IPSR16_27_24 [4] */
4345 IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,
4346 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,
4347 FN_RIF3_D1_A, 0, 0, 0,
4349 /* IPSR16_23_20 [4] */
4350 IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,
4351 0, FN_TS_SDEN1_A, FN_STP_ISEN_1_A, FN_RIF1_D0_A,
4352 FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,
4354 /* IPSR16_19_16 [4] */
4355 IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,
4356 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,
4357 FN_RIF3_SYNC_A, 0, 0, 0,
4359 /* IPSR16_15_12 [4] */
4360 IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,
4361 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,
4362 FN_RIF3_CLK_A, 0, 0, 0,
4364 /* IPSR16_11_8 [4] */
4365 IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,
4367 FN_SATA_DEVSLP_A, 0, 0, 0,
4369 /* IPSR16_7_4 [4] */
4370 IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,
4374 /* IPSR16_3_0 [4] */
4375 IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,
4381 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
4382 4, 4, 4, 4, 4, 4, 4, 4) {
4383 /* IPSR17_31_28 [4] */
4384 IFN_USB30_OVC, 0, 0, FN_AUDIO_CLKOUT1_B,
4385 FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D, FN_STP_IVCXO27_0_E,
4386 FN_RIF3_D1_B, 0, FN_FSO_TOEx, FN_TPU0TO1,
4388 /* IPSR17_27_24 [4] */
4389 IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,
4390 FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,
4391 FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,
4392 FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,
4393 /* IPSR17_23_20 [4] */
4394 IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,
4395 FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,
4396 FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,
4397 0, FN_HCTS2x_C, 0, 0,
4398 /* IPSR17_19_16 [4] */
4399 IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,
4400 FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,
4401 FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,
4403 /* IPSR17_15_12 [4] */
4404 IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,
4405 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,
4406 FN_RIF3_SYNC_B, 0, 0, 0,
4408 /* IPSR17_11_8 [4] */
4409 IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,
4410 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,
4411 FN_RIF3_CLK_B, 0, 0, 0,
4412 0, FN_HSCK2_C, 0, 0,
4413 /* IPSR17_7_4 [4] */
4414 IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,
4415 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,
4416 0, 0, FN_TCLK1_A, 0,
4418 /* IPSR17_3_0 [4] */
4419 IFN_AUDIO_CLKA_A, 0, 0, 0,
4421 0, 0, 0, FN_CC5_OSCOUT,
4425 { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32,
4426 1, 1, 1, 1, 1, 1, 1, 1,
4427 1, 1, 1, 1, 1, 1, 1, 1,
4428 1, 1, 1, 1, 1, 1, 1, 1,
4430 /* reserved [31..24] */
4439 /* reserved [23..16] */
4448 /* reserved [15..8] */
4457 /* IPSR18_7_4 [4] */
4458 IFN_USB3_OVC, 0, 0, FN_AUDIO_CLKOUT3_B,
4459 FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,
4460 FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,
4461 FN_FMIN_C, FN_FMIN_D, 0, 0,
4462 /* IPSR18_3_0 [4] */
4463 IFN_USB3_PWEN, 0, 0, FN_AUDIO_CLKOUT2_B,
4464 FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,
4465 FN_RIF2_D0_B, 0, 0, FN_TPU0TO2,
4466 FN_FMCLK_C, FN_FMCLK_D, 0, 0,
4469 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
4470 3, 2, 3, 1, 1, 1, 1, 1, 2, 1,
4471 1, 2, 1, 1, 1, 2, 2, 1, 2, 1, 1, 1) {
4473 /* sel_msiof3[3](0,1,2,3,4) */
4474 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
4475 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
4478 /* sel_msiof2[2](0,1,2,3) */
4479 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
4480 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
4481 /* sel_msiof1[3](0,1,2,3,4,5,6) */
4482 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
4483 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
4484 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
4486 /* sel_lbsc[1](0,1) */
4487 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
4488 /* sel_iebus[1](0,1) */
4489 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
4490 /* sel_i2c2[1](0,1) */
4491 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
4492 /* sel_i2c1[1](0,1) */
4493 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
4494 /* sel_hscif4[1](0,1) */
4495 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
4496 /* sel_hscif3[2](0,1,2,3) */
4497 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
4498 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
4499 /* sel_hscif1[1](0,1) */
4500 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
4503 /* sel_hscif2[2](0,1,2) */
4504 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
4506 /* sel_etheravb[1](0,1) */
4507 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
4508 /* sel_drif3[1](0,1) */
4509 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
4510 /* sel_drif2[1](0,1) */
4511 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
4512 /* sel_drif1[2](0,1,2) */
4513 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
4515 /* sel_drif0[2](0,1,2) */
4516 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
4518 /* sel_canfd0[1](0,1) */
4519 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
4520 /* sel_adg_a[2](0,1,2) */
4521 FN_SEL_ADG_A_0, FN_SEL_ADG_A_1,
4529 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4532 2, 1, 1, 1, 1, 1, 1,
4533 1, 1, 1, 1, 1, 1, 1, 1) {
4534 /* sel_tsif1[2](0,1,2,3) */
4535 FN_SEL_TSIF1_0, FN_SEL_TSIF1_1,
4536 FN_SEL_TSIF1_2, FN_SEL_TSIF1_3,
4537 /* sel_tsif0[3](0,1,2,3,4) */
4538 FN_SEL_TSIF0_0, FN_SEL_TSIF0_1,
4539 FN_SEL_TSIF0_2, FN_SEL_TSIF0_3,
4542 /* sel_timer_tmu1[1](0,1) */
4543 FN_SEL_TIMER_TMU1_0, FN_SEL_TIMER_TMU1_1,
4544 /* sel_ssp1_1[2](0,1,2,3) */
4545 FN_SEL_SSP1_1_0, FN_SEL_SSP1_1_1,
4546 FN_SEL_SSP1_1_2, FN_SEL_SSP1_1_3,
4547 /* sel_ssp1_0[3](0,1,2,3,4) */
4548 FN_SEL_SSP1_0_0, FN_SEL_SSP1_0_1,
4549 FN_SEL_SSP1_0_2, FN_SEL_SSP1_0_3,
4552 /* sel_ssi1[1](0,1) */
4553 FN_SEL_SSI_0, FN_SEL_SSI_1,
4554 /* sel_speed_pulse_if[1](0,1) */
4555 FN_SEL_SPEED_PULSE_IF_0, FN_SEL_SPEED_PULSE_IF_1,
4556 /* sel_simcard[2](0,1,2,3) */
4557 FN_SEL_SIMCARD_0, FN_SEL_SIMCARD_1,
4558 FN_SEL_SIMCARD_2, FN_SEL_SIMCARD_3,
4559 /* sel_sdhi2[1](0,1) */
4560 FN_SEL_SDHI2_0, FN_SEL_SDHI2_1,
4561 /* sel_scif4[2](0,1,2) */
4562 FN_SEL_SCIF4_0, FN_SEL_SCIF4_1,
4564 /* sel_scif3[1](0,1) */
4565 FN_SEL_SCIF3_0, FN_SEL_SCIF3_1,
4566 /* sel_scif2[1](0,1) */
4567 FN_SEL_SCIF2_0, FN_SEL_SCIF2_1,
4568 /* sel_scif1[1](0,1) */
4569 FN_SEL_SCIF1_0, FN_SEL_SCIF1_1,
4570 /* sel_scif[1](0,1) */
4571 FN_SEL_SCIF_0, FN_SEL_SCIF_1,
4572 /* sel_remocon[1](0,1) */
4573 FN_SEL_REMOCON_0, FN_SEL_REMOCON_1,
4574 /* reserved[8..7] */
4577 /* sel_rcan0[1](0,1) */
4578 FN_SEL_RCAN_0, FN_SEL_RCAN_1,
4579 /* sel_pwm6[1](0,1) */
4580 FN_SEL_PWM6_0, FN_SEL_PWM6_1,
4581 /* sel_pwm5[1](0,1) */
4582 FN_SEL_PWM5_0, FN_SEL_PWM5_1,
4583 /* sel_pwm4[1](0,1) */
4584 FN_SEL_PWM4_0, FN_SEL_PWM4_1,
4585 /* sel_pwm3[1](0,1) */
4586 FN_SEL_PWM3_0, FN_SEL_PWM3_1,
4587 /* sel_pwm2[1](0,1) */
4588 FN_SEL_PWM2_0, FN_SEL_PWM2_1,
4589 /* sel_pwm1[1](0,1) */
4590 FN_SEL_PWM1_0, FN_SEL_PWM1_1,
4593 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,
4594 1, 1, 1, 2, 1, 3, 1, 1, 1, 1, 1, 1, 1,
4595 1, 1, 1, 1, 1, 1, 1, 1,
4596 1, 1, 1, 1, 1, 1, 1, 1) {
4597 /* i2c_sel_5[1](0,1) */
4598 FN_I2C_SEL_5_0, FN_I2C_SEL_5_1,
4599 /* i2c_sel_3[1](0,1) */
4600 FN_I2C_SEL_3_0, FN_I2C_SEL_3_1,
4601 /* i2c_sel_0[1](0,1) */
4602 FN_I2C_SEL_0_0, FN_I2C_SEL_0_1,
4603 /* sel_fm[2](0,1,2,3) */
4604 FN_SEL_FM_0, FN_SEL_FM_1,
4605 FN_SEL_FM_2, FN_SEL_FM_3,
4606 /* sel_scif5[1](0,1) */
4607 FN_SEL_SCIF5_0, FN_SEL_SCIF5_1,
4608 /* sel_i2c6[3](0,1,2) */
4609 FN_SEL_I2C6_0, FN_SEL_I2C6_1,
4611 /* sel_ndfc[1](0,1) */
4612 FN_SEL_NDFC_0, FN_SEL_NDFC_1,
4613 /* sel_ssi2[1](0,1) */
4614 FN_SEL_SSI2_0, FN_SEL_SSI2_1,
4615 /* sel_ssi9[1](0,1) */
4616 FN_SEL_SSI9_0, FN_SEL_SSI9_1,
4617 /* sel_timer_tmu2[1](0,1) */
4618 FN_SEL_TIMER_TMU2_0, FN_SEL_TIMER_TMU2_1,
4619 /* sel_adg_b[1](0,1) */
4620 FN_SEL_ADG_B_0, FN_SEL_ADG_B_1,
4621 /* sel_adg_c[1](0,1) */
4622 FN_SEL_ADG_C_0, FN_SEL_ADG_C_1,
4623 /* reserved[16..16] */
4625 /* reserved[15..8] */
4634 /* reserved[7..1] */
4642 /* sel_vin4[1](0,1) */
4643 FN_SEL_VIN4_0, FN_SEL_VIN4_1,
4646 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
4665 GP_0_15_IN, GP_0_15_OUT,
4666 GP_0_14_IN, GP_0_14_OUT,
4667 GP_0_13_IN, GP_0_13_OUT,
4668 GP_0_12_IN, GP_0_12_OUT,
4669 GP_0_11_IN, GP_0_11_OUT,
4670 GP_0_10_IN, GP_0_10_OUT,
4671 GP_0_9_IN, GP_0_9_OUT,
4672 GP_0_8_IN, GP_0_8_OUT,
4673 GP_0_7_IN, GP_0_7_OUT,
4674 GP_0_6_IN, GP_0_6_OUT,
4675 GP_0_5_IN, GP_0_5_OUT,
4676 GP_0_4_IN, GP_0_4_OUT,
4677 GP_0_3_IN, GP_0_3_OUT,
4678 GP_0_2_IN, GP_0_2_OUT,
4679 GP_0_1_IN, GP_0_1_OUT,
4680 GP_0_0_IN, GP_0_0_OUT,
4683 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
4687 GP_1_28_IN, GP_1_28_OUT,
4688 GP_1_27_IN, GP_1_27_OUT,
4689 GP_1_26_IN, GP_1_26_OUT,
4690 GP_1_25_IN, GP_1_25_OUT,
4691 GP_1_24_IN, GP_1_24_OUT,
4692 GP_1_23_IN, GP_1_23_OUT,
4693 GP_1_22_IN, GP_1_22_OUT,
4694 GP_1_21_IN, GP_1_21_OUT,
4695 GP_1_20_IN, GP_1_20_OUT,
4696 GP_1_19_IN, GP_1_19_OUT,
4697 GP_1_18_IN, GP_1_18_OUT,
4698 GP_1_17_IN, GP_1_17_OUT,
4699 GP_1_16_IN, GP_1_16_OUT,
4700 GP_1_15_IN, GP_1_15_OUT,
4701 GP_1_14_IN, GP_1_14_OUT,
4702 GP_1_13_IN, GP_1_13_OUT,
4703 GP_1_12_IN, GP_1_12_OUT,
4704 GP_1_11_IN, GP_1_11_OUT,
4705 GP_1_10_IN, GP_1_10_OUT,
4706 GP_1_9_IN, GP_1_9_OUT,
4707 GP_1_8_IN, GP_1_8_OUT,
4708 GP_1_7_IN, GP_1_7_OUT,
4709 GP_1_6_IN, GP_1_6_OUT,
4710 GP_1_5_IN, GP_1_5_OUT,
4711 GP_1_4_IN, GP_1_4_OUT,
4712 GP_1_3_IN, GP_1_3_OUT,
4713 GP_1_2_IN, GP_1_2_OUT,
4714 GP_1_1_IN, GP_1_1_OUT,
4715 GP_1_0_IN, GP_1_0_OUT,
4718 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
4738 GP_2_14_IN, GP_2_14_OUT,
4739 GP_2_13_IN, GP_2_13_OUT,
4740 GP_2_12_IN, GP_2_12_OUT,
4741 GP_2_11_IN, GP_2_11_OUT,
4742 GP_2_10_IN, GP_2_10_OUT,
4743 GP_2_9_IN, GP_2_9_OUT,
4744 GP_2_8_IN, GP_2_8_OUT,
4745 GP_2_7_IN, GP_2_7_OUT,
4746 GP_2_6_IN, GP_2_6_OUT,
4747 GP_2_5_IN, GP_2_5_OUT,
4748 GP_2_4_IN, GP_2_4_OUT,
4749 GP_2_3_IN, GP_2_3_OUT,
4750 GP_2_2_IN, GP_2_2_OUT,
4751 GP_2_1_IN, GP_2_1_OUT,
4752 GP_2_0_IN, GP_2_0_OUT,
4755 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
4774 GP_3_15_IN, GP_3_15_OUT,
4775 GP_3_14_IN, GP_3_14_OUT,
4776 GP_3_13_IN, GP_3_13_OUT,
4777 GP_3_12_IN, GP_3_12_OUT,
4778 GP_3_11_IN, GP_3_11_OUT,
4779 GP_3_10_IN, GP_3_10_OUT,
4780 GP_3_9_IN, GP_3_9_OUT,
4781 GP_3_8_IN, GP_3_8_OUT,
4782 GP_3_7_IN, GP_3_7_OUT,
4783 GP_3_6_IN, GP_3_6_OUT,
4784 GP_3_5_IN, GP_3_5_OUT,
4785 GP_3_4_IN, GP_3_4_OUT,
4786 GP_3_3_IN, GP_3_3_OUT,
4787 GP_3_2_IN, GP_3_2_OUT,
4788 GP_3_1_IN, GP_3_1_OUT,
4789 GP_3_0_IN, GP_3_0_OUT,
4792 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
4808 GP_4_17_IN, GP_4_17_OUT,
4809 GP_4_16_IN, GP_4_16_OUT,
4811 GP_4_15_IN, GP_4_15_OUT,
4812 GP_4_14_IN, GP_4_14_OUT,
4813 GP_4_13_IN, GP_4_13_OUT,
4814 GP_4_12_IN, GP_4_12_OUT,
4815 GP_4_11_IN, GP_4_11_OUT,
4816 GP_4_10_IN, GP_4_10_OUT,
4817 GP_4_9_IN, GP_4_9_OUT,
4818 GP_4_8_IN, GP_4_8_OUT,
4819 GP_4_7_IN, GP_4_7_OUT,
4820 GP_4_6_IN, GP_4_6_OUT,
4821 GP_4_5_IN, GP_4_5_OUT,
4822 GP_4_4_IN, GP_4_4_OUT,
4823 GP_4_3_IN, GP_4_3_OUT,
4824 GP_4_2_IN, GP_4_2_OUT,
4825 GP_4_1_IN, GP_4_1_OUT,
4826 GP_4_0_IN, GP_4_0_OUT,
4829 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
4836 GP_5_25_IN, GP_5_25_OUT,
4837 GP_5_24_IN, GP_5_24_OUT,
4839 GP_5_23_IN, GP_5_23_OUT,
4840 GP_5_22_IN, GP_5_22_OUT,
4841 GP_5_21_IN, GP_5_21_OUT,
4842 GP_5_20_IN, GP_5_20_OUT,
4843 GP_5_19_IN, GP_5_19_OUT,
4844 GP_5_18_IN, GP_5_18_OUT,
4845 GP_5_17_IN, GP_5_17_OUT,
4846 GP_5_16_IN, GP_5_16_OUT,
4848 GP_5_15_IN, GP_5_15_OUT,
4849 GP_5_14_IN, GP_5_14_OUT,
4850 GP_5_13_IN, GP_5_13_OUT,
4851 GP_5_12_IN, GP_5_12_OUT,
4852 GP_5_11_IN, GP_5_11_OUT,
4853 GP_5_10_IN, GP_5_10_OUT,
4854 GP_5_9_IN, GP_5_9_OUT,
4855 GP_5_8_IN, GP_5_8_OUT,
4856 GP_5_7_IN, GP_5_7_OUT,
4857 GP_5_6_IN, GP_5_6_OUT,
4858 GP_5_5_IN, GP_5_5_OUT,
4859 GP_5_4_IN, GP_5_4_OUT,
4860 GP_5_3_IN, GP_5_3_OUT,
4861 GP_5_2_IN, GP_5_2_OUT,
4862 GP_5_1_IN, GP_5_1_OUT,
4863 GP_5_0_IN, GP_5_0_OUT,
4866 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
4870 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
4902 GP_6_3_IN, GP_6_3_OUT,
4903 GP_6_2_IN, GP_6_2_OUT,
4904 GP_6_1_IN, GP_6_1_OUT,
4905 GP_6_0_IN, GP_6_0_OUT,
4911 static struct pinmux_data_reg pinmux_data_regs[] = {
4912 /* use OUTDT registers? */
4913 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
4914 0, 0, 0, 0, 0, 0, 0, 0,
4915 0, 0, 0, 0, 0, 0, 0, 0,
4916 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
4917 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
4918 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
4919 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
4921 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
4922 0, 0, 0, GP_1_28_DATA,
4923 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
4924 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
4925 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
4926 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
4927 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
4928 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
4929 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
4931 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
4932 0, 0, 0, 0, 0, 0, 0, 0,
4933 0, 0, 0, 0, 0, 0, 0, 0,
4934 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
4935 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
4936 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
4937 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
4939 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
4940 0, 0, 0, 0, 0, 0, 0, 0,
4941 0, 0, 0, 0, 0, 0, 0, 0,
4942 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
4943 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
4944 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
4945 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
4947 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
4948 0, 0, 0, 0, 0, 0, 0, 0,
4949 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,
4950 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
4951 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
4952 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
4953 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
4955 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
4957 0, 0, GP_5_25_DATA, GP_5_24_DATA,
4958 GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
4959 GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
4960 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
4961 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
4962 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
4963 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
4965 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
4968 { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
4969 0, 0, 0, 0, 0, 0, 0, 0,
4970 0, 0, 0, 0, 0, 0, 0, 0,
4971 0, 0, 0, 0, 0, 0, 0, 0,
4973 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
4979 static struct pinmux_info r8a7795_pinmux_info = {
4980 .name = "r8a7795_pfc",
4982 .unlock_reg = 0xe6060000, /* PMMR */
4984 .reserved_id = PINMUX_RESERVED,
4985 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
4986 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
4987 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
4988 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
4989 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
4991 .first_gpio = GPIO_GP_0_0,
4992 .last_gpio = GPIO_FN_FMIN_D,
4994 .gpios = pinmux_gpios,
4995 .cfg_regs = pinmux_config_regs,
4996 .data_regs = pinmux_data_regs,
4998 .gpio_data = pinmux_data,
4999 .gpio_data_size = ARRAY_SIZE(pinmux_data),
5002 void r8a7795_pinmux_init(void)
5004 register_pinmux(&r8a7795_pinmux_info);