2 * arch/arm/cpu/armv8/rcar_gen3/pfc-r8a7796.c
3 * This file is r8a7796 processor support - PFC hardware block.
5 * Copyright (C) 2016 Renesas Electronics Corporation
7 * SPDX-License-Identifier: GPL-2.0+
14 #define CPU_32_PORT(fn, pfx, sfx) \
15 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
16 PORT_10(fn, pfx##2, sfx), PORT_1(fn, pfx##30, sfx), \
17 PORT_1(fn, pfx##31, sfx)
19 #define CPU_32_PORT1(fn, pfx, sfx) \
20 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
21 PORT_10(fn, pfx##2, sfx)
23 #define CPU_32_PORT2(fn, pfx, sfx) \
24 PORT_10(fn, pfx, sfx), PORT_10(fn, pfx##1, sfx), \
25 PORT_10(fn, pfx##2, sfx)
27 #define CPU_32_PORT_29(fn, pfx, sfx) \
28 PORT_10(fn, pfx, sfx), \
29 PORT_10(fn, pfx##1, sfx), \
30 PORT_1(fn, pfx##20, sfx), \
31 PORT_1(fn, pfx##21, sfx), \
32 PORT_1(fn, pfx##22, sfx), \
33 PORT_1(fn, pfx##23, sfx), \
34 PORT_1(fn, pfx##24, sfx), \
35 PORT_1(fn, pfx##25, sfx), \
36 PORT_1(fn, pfx##26, sfx), \
37 PORT_1(fn, pfx##27, sfx), \
38 PORT_1(fn, pfx##28, sfx)
40 #define CPU_32_PORT_26(fn, pfx, sfx) \
41 PORT_10(fn, pfx, sfx), \
42 PORT_10(fn, pfx##1, sfx), \
43 PORT_1(fn, pfx##20, sfx), \
44 PORT_1(fn, pfx##21, sfx), \
45 PORT_1(fn, pfx##22, sfx), \
46 PORT_1(fn, pfx##23, sfx), \
47 PORT_1(fn, pfx##24, sfx), \
48 PORT_1(fn, pfx##25, sfx)
50 #define CPU_32_PORT_18(fn, pfx, sfx) \
51 PORT_10(fn, pfx, sfx), \
52 PORT_1(fn, pfx##10, sfx), \
53 PORT_1(fn, pfx##11, sfx), \
54 PORT_1(fn, pfx##12, sfx), \
55 PORT_1(fn, pfx##13, sfx), \
56 PORT_1(fn, pfx##14, sfx), \
57 PORT_1(fn, pfx##15, sfx), \
58 PORT_1(fn, pfx##16, sfx), \
59 PORT_1(fn, pfx##17, sfx)
61 #define CPU_32_PORT_16(fn, pfx, sfx) \
62 PORT_10(fn, pfx, sfx), \
63 PORT_1(fn, pfx##10, sfx), \
64 PORT_1(fn, pfx##11, sfx), \
65 PORT_1(fn, pfx##12, sfx), \
66 PORT_1(fn, pfx##13, sfx), \
67 PORT_1(fn, pfx##14, sfx), \
68 PORT_1(fn, pfx##15, sfx)
70 #define CPU_32_PORT_15(fn, pfx, sfx) \
71 PORT_10(fn, pfx, sfx), \
72 PORT_1(fn, pfx##10, sfx), \
73 PORT_1(fn, pfx##11, sfx), \
74 PORT_1(fn, pfx##12, sfx), \
75 PORT_1(fn, pfx##13, sfx), \
76 PORT_1(fn, pfx##14, sfx)
78 #define CPU_32_PORT_4(fn, pfx, sfx) \
79 PORT_1(fn, pfx##0, sfx), \
80 PORT_1(fn, pfx##1, sfx), \
81 PORT_1(fn, pfx##2, sfx), \
82 PORT_1(fn, pfx##3, sfx)
86 /* GP_0_0_DATA -> GP_7_4_DATA */
87 /* except for GP0[16] - [31],
95 #define CPU_ALL_PORT(fn, pfx, sfx) \
96 CPU_32_PORT_16(fn, pfx##_0_, sfx), \
97 CPU_32_PORT_29(fn, pfx##_1_, sfx), \
98 CPU_32_PORT_15(fn, pfx##_2_, sfx), \
99 CPU_32_PORT_16(fn, pfx##_3_, sfx), \
100 CPU_32_PORT_18(fn, pfx##_4_, sfx), \
101 CPU_32_PORT_26(fn, pfx##_5_, sfx), \
102 CPU_32_PORT(fn, pfx##_6_, sfx), \
103 CPU_32_PORT_4(fn, pfx##_7_, sfx)
105 #define _GP_GPIO(pfx, sfx) PINMUX_GPIO(GPIO_GP##pfx, GP##pfx##_DATA)
106 #define _GP_DATA(pfx, sfx) PINMUX_DATA(GP##pfx##_DATA, GP##pfx##_FN, \
107 GP##pfx##_IN, GP##pfx##_OUT)
109 #define _GP_INOUTSEL(pfx, sfx) GP##pfx##_IN, GP##pfx##_OUT
110 #define _GP_INDT(pfx, sfx) GP##pfx##_DATA
112 #define GP_ALL(str) CPU_ALL_PORT(_PORT_ALL, GP, str)
113 #define PINMUX_GPIO_GP_ALL() CPU_ALL_PORT(_GP_GPIO, , unused)
114 #define PINMUX_DATA_GP_ALL() CPU_ALL_PORT(_GP_DATA, , unused)
117 #define PORT_10_REV(fn, pfx, sfx) \
118 PORT_1(fn, pfx##9, sfx), PORT_1(fn, pfx##8, sfx), \
119 PORT_1(fn, pfx##7, sfx), PORT_1(fn, pfx##6, sfx), \
120 PORT_1(fn, pfx##5, sfx), PORT_1(fn, pfx##4, sfx), \
121 PORT_1(fn, pfx##3, sfx), PORT_1(fn, pfx##2, sfx), \
122 PORT_1(fn, pfx##1, sfx), PORT_1(fn, pfx##0, sfx)
124 #define CPU_32_PORT_REV(fn, pfx, sfx) \
125 PORT_1(fn, pfx##31, sfx), PORT_1(fn, pfx##30, sfx), \
126 PORT_10_REV(fn, pfx##2, sfx), PORT_10_REV(fn, pfx##1, sfx), \
127 PORT_10_REV(fn, pfx, sfx)
129 #define GP_INOUTSEL(bank) CPU_32_PORT_REV(_GP_INOUTSEL, _##bank##_, unused)
130 #define GP_INDT(bank) CPU_32_PORT_REV(_GP_INDT, _##bank##_, unused)
132 #define PINMUX_IPSR_DATA(ipsr, fn) PINMUX_DATA(fn##_MARK, FN_##ipsr, FN_##fn)
133 #define PINMUX_IPSR_MODSEL_DATA(ipsr, fn, ms) PINMUX_DATA(fn##_MARK, FN_##ms, \
151 PINMUX_FUNCTION_BEGIN,
204 GFN_AVB_AVTP_CAPTURE_A,
205 GFN_AVB_AVTP_MATCH_A,
338 IFN_AVB_AVTP_MATCH_A,
341 IFN_AVB_AVTP_CAPTURE_A,
362 FN_DU_EXODDF_DU_ODDF_DISP_CDE,
374 FN_DU_EXHSYNC_DU_HSYNC,
380 FN_DU_EXVSYNC_DU_VSYNC,
473 FN_AVB_AVTP_CAPTURE_B,
1171 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
1172 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
1173 FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5,
1175 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
1176 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
1177 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
1178 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
1179 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
1181 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
1182 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
1183 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
1184 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
1185 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
1186 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
1187 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
1188 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
1190 FN_SEL_HSCIF1_0, FN_SEL_HSCIF1_1,
1191 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
1192 FN_SEL_FSO_0, FN_SEL_FSO_1,
1193 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
1194 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
1195 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
1197 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
1199 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
1200 FN_SEL_ADG_0, FN_SEL_ADG_1,
1201 FN_SEL_ADG_2, FN_SEL_ADG_3,
1226 FN_SEL_SPEED_PULSE_IF_0,
1227 FN_SEL_SPEED_PULSE_IF_1,
1284 FN_SEL_TIMER_TMU2_0,
1285 FN_SEL_TIMER_TMU2_1,
1293 PINMUX_FUNCTION_END,
1347 AVB_AVTP_CAPTURE_A_GMARK,
1348 AVB_AVTP_MATCH_A_GMARK,
1481 AVB_AVTP_MATCH_A_IMARK,
1484 AVB_AVTP_CAPTURE_A_IMARK,
1505 DU_EXODDF_DU_ODDF_DISP_CDE_MARK,
1517 DU_EXHSYNC_DU_HSYNC_MARK,
1523 DU_EXVSYNC_DU_VSYNC_MARK,
1597 AVB_AVTP_MATCH_B_MARK,
1616 AVB_AVTP_CAPTURE_B_MARK,
1802 STP_IVCXO27_0_B_MARK,
1810 STP_ISSYNC_0_B_MARK,
1831 STP_IVCXO27_1_B_MARK,
1845 STP_ISSYNC_1_B_MARK,
1960 STP_ISSYNC_0_C_MARK,
1967 STP_ISSYNC_1_C_MARK,
1969 AUDIO_CLKOUT_C_MARK,
1977 STP_IVCXO27_1_C_MARK,
2060 STP_ISSYNC_0_D_MARK,
2062 AUDIO_CLKOUT1_A_MARK,
2068 STP_IVCXO27_0_D_MARK,
2070 AUDIO_CLKOUT2_A_MARK,
2073 AUDIO_CLKOUT_A_MARK,
2083 STP_IVCXO27_0_C_MARK,
2084 AUDIO_CLKOUT3_A_MARK,
2093 AUDIO_CLKOUT_D_MARK,
2136 STP_IVCXO27_0_A_MARK,
2166 STP_ISSYNC_0_A_MARK,
2210 STP_ISSYNC_1_A_MARK,
2220 STP_IVCXO27_1_A_MARK,
2229 STP_IVCXO27_1_D_MARK,
2270 AUDIO_CLKOUT_B_MARK,
2282 AUDIO_CLKOUT1_B_MARK,
2285 STP_ISSYNC_1_D_MARK,
2286 STP_IVCXO27_0_E_MARK,
2293 AUDIO_CLKOUT2_B_MARK,
2304 AUDIO_CLKOUT3_B_MARK,
2307 STP_ISSYNC_0_E_MARK,
2316 static pinmux_enum_t pinmux_data[] = {
2317 PINMUX_DATA_GP_ALL(), /* PINMUX_DATA(GP_M_N_DATA, GP_M_N_FN...), */
2320 PINMUX_DATA(D15_GMARK, GFN_D15),
2321 PINMUX_DATA(D14_GMARK, GFN_D14),
2322 PINMUX_DATA(D13_GMARK, GFN_D13),
2323 PINMUX_DATA(D12_GMARK, GFN_D12),
2324 PINMUX_DATA(D11_GMARK, GFN_D11),
2325 PINMUX_DATA(D10_GMARK, GFN_D10),
2326 PINMUX_DATA(D9_GMARK, GFN_D9),
2327 PINMUX_DATA(D8_GMARK, GFN_D8),
2328 PINMUX_DATA(D7_GMARK, GFN_D7),
2329 PINMUX_DATA(D6_GMARK, GFN_D6),
2330 PINMUX_DATA(D5_GMARK, GFN_D5),
2331 PINMUX_DATA(D4_GMARK, GFN_D4),
2332 PINMUX_DATA(D3_GMARK, GFN_D3),
2333 PINMUX_DATA(D2_GMARK, GFN_D2),
2334 PINMUX_DATA(D1_GMARK, GFN_D1),
2335 PINMUX_DATA(D0_GMARK, GFN_D0),
2338 PINMUX_DATA(CLKOUT_GMARK, GFN_CLKOUT),
2339 PINMUX_DATA(EX_WAIT0_A_GMARK, GFN_EX_WAIT0_A),
2340 PINMUX_DATA(WE1x_GMARK, GFN_WE1x),
2341 PINMUX_DATA(WE0x_GMARK, GFN_WE0x),
2342 PINMUX_DATA(RD_WRx_GMARK, GFN_RD_WRx),
2343 PINMUX_DATA(RDx_GMARK, GFN_RDx),
2344 PINMUX_DATA(BSx_GMARK, GFN_BSx),
2345 PINMUX_DATA(CS1x_A26_GMARK, GFN_CS1x_A26),
2346 PINMUX_DATA(CS0x_GMARK, GFN_CS0x),
2347 PINMUX_DATA(A19_GMARK, GFN_A19),
2348 PINMUX_DATA(A18_GMARK, GFN_A18),
2349 PINMUX_DATA(A17_GMARK, GFN_A17),
2350 PINMUX_DATA(A16_GMARK, GFN_A16),
2351 PINMUX_DATA(A15_GMARK, GFN_A15),
2352 PINMUX_DATA(A14_GMARK, GFN_A14),
2353 PINMUX_DATA(A13_GMARK, GFN_A13),
2354 PINMUX_DATA(A12_GMARK, GFN_A12),
2355 PINMUX_DATA(A11_GMARK, GFN_A11),
2356 PINMUX_DATA(A10_GMARK, GFN_A10),
2357 PINMUX_DATA(A9_GMARK, GFN_A9),
2358 PINMUX_DATA(A8_GMARK, GFN_A8),
2359 PINMUX_DATA(A7_GMARK, GFN_A7),
2360 PINMUX_DATA(A6_GMARK, GFN_A6),
2361 PINMUX_DATA(A5_GMARK, GFN_A5),
2362 PINMUX_DATA(A4_GMARK, GFN_A4),
2363 PINMUX_DATA(A3_GMARK, GFN_A3),
2364 PINMUX_DATA(A2_GMARK, GFN_A2),
2365 PINMUX_DATA(A1_GMARK, GFN_A1),
2366 PINMUX_DATA(A0_GMARK, GFN_A0),
2369 PINMUX_DATA(AVB_AVTP_CAPTURE_A_GMARK, GFN_AVB_AVTP_CAPTURE_A),
2370 PINMUX_DATA(AVB_AVTP_MATCH_A_GMARK, GFN_AVB_AVTP_MATCH_A),
2371 PINMUX_DATA(AVB_LINK_GMARK, GFN_AVB_LINK),
2372 PINMUX_DATA(AVB_PHY_INT_GMARK, GFN_AVB_PHY_INT),
2373 PINMUX_DATA(AVB_MAGIC_GMARK, GFN_AVB_MAGIC),
2374 PINMUX_DATA(AVB_MDC_GMARK, GFN_AVB_MDC),
2375 PINMUX_DATA(PWM2_A_GMARK, GFN_PWM2_A),
2376 PINMUX_DATA(PWM1_A_GMARK, GFN_PWM1_A),
2377 PINMUX_DATA(PWM0_GMARK, GFN_PWM0),
2378 PINMUX_DATA(IRQ5_GMARK, GFN_IRQ5),
2379 PINMUX_DATA(IRQ4_GMARK, GFN_IRQ4),
2380 PINMUX_DATA(IRQ3_GMARK, GFN_IRQ3),
2381 PINMUX_DATA(IRQ2_GMARK, GFN_IRQ2),
2382 PINMUX_DATA(IRQ1_GMARK, GFN_IRQ1),
2383 PINMUX_DATA(IRQ0_GMARK, GFN_IRQ0),
2386 PINMUX_DATA(SD1_WP_GMARK, GFN_SD1_WP),
2387 PINMUX_DATA(SD1_CD_GMARK, GFN_SD1_CD),
2388 PINMUX_DATA(SD0_WP_GMARK, GFN_SD0_WP),
2389 PINMUX_DATA(SD0_CD_GMARK, GFN_SD0_CD),
2390 PINMUX_DATA(SD1_DAT3_GMARK, GFN_SD1_DAT3),
2391 PINMUX_DATA(SD1_DAT2_GMARK, GFN_SD1_DAT2),
2392 PINMUX_DATA(SD1_DAT1_GMARK, GFN_SD1_DAT1),
2393 PINMUX_DATA(SD1_DAT0_GMARK, GFN_SD1_DAT0),
2394 PINMUX_DATA(SD1_CMD_GMARK, GFN_SD1_CMD),
2395 PINMUX_DATA(SD1_CLK_GMARK, GFN_SD1_CLK),
2396 PINMUX_DATA(SD0_DAT3_GMARK, GFN_SD0_DAT3),
2397 PINMUX_DATA(SD0_DAT2_GMARK, GFN_SD0_DAT2),
2398 PINMUX_DATA(SD0_DAT1_GMARK, GFN_SD0_DAT1),
2399 PINMUX_DATA(SD0_DAT0_GMARK, GFN_SD0_DAT0),
2400 PINMUX_DATA(SD0_CMD_GMARK, GFN_SD0_CMD),
2401 PINMUX_DATA(SD0_CLK_GMARK, GFN_SD0_CLK),
2404 PINMUX_DATA(SD3_DS_GMARK, GFN_SD3_DS),
2405 PINMUX_DATA(SD3_DAT7_GMARK, GFN_SD3_DAT7),
2406 PINMUX_DATA(SD3_DAT6_GMARK, GFN_SD3_DAT6),
2407 PINMUX_DATA(SD3_DAT5_GMARK, GFN_SD3_DAT5),
2408 PINMUX_DATA(SD3_DAT4_GMARK, GFN_SD3_DAT4),
2409 PINMUX_DATA(SD3_DAT3_MARK, FN_SD3_DAT3),
2410 PINMUX_DATA(SD3_DAT2_MARK, FN_SD3_DAT2),
2411 PINMUX_DATA(SD3_DAT1_MARK, FN_SD3_DAT1),
2412 PINMUX_DATA(SD3_DAT0_MARK, FN_SD3_DAT0),
2413 PINMUX_DATA(SD3_CMD_MARK, FN_SD3_CMD),
2414 PINMUX_DATA(SD3_CLK_MARK, FN_SD3_CLK),
2415 PINMUX_DATA(SD2_DS_GMARK, GFN_SD2_DS),
2416 PINMUX_DATA(SD2_DAT3_GMARK, GFN_SD2_DAT3),
2417 PINMUX_DATA(SD2_DAT2_GMARK, GFN_SD2_DAT2),
2418 PINMUX_DATA(SD2_DAT1_GMARK, GFN_SD2_DAT1),
2419 PINMUX_DATA(SD2_DAT0_GMARK, GFN_SD2_DAT0),
2420 PINMUX_DATA(SD2_CMD_MARK, FN_SD2_CMD),
2421 PINMUX_DATA(SD2_CLK_GMARK, GFN_SD2_CLK),
2424 PINMUX_DATA(MLB_DAT_GMARK, GFN_MLB_DAT),
2425 PINMUX_DATA(MLB_SIG_GMARK, GFN_MLB_SIG),
2426 PINMUX_DATA(MLB_CLK_GMARK, GFN_MLB_CLK),
2427 PINMUX_DATA(MSIOF0_RXD_MARK, FN_MSIOF0_RXD),
2428 PINMUX_DATA(MSIOF0_SS2_GMARK, GFN_MSIOF0_SS2),
2429 PINMUX_DATA(MSIOF0_TXD_MARK, FN_MSIOF0_TXD),
2430 PINMUX_DATA(MSIOF0_SS1_GMARK, GFN_MSIOF0_SS1),
2431 PINMUX_DATA(MSIOF0_SYNC_GMARK, GFN_MSIOF0_SYNC),
2432 PINMUX_DATA(MSIOF0_SCK_MARK, FN_MSIOF0_SCK),
2433 PINMUX_DATA(HRTS0x_GMARK, GFN_HRTS0x),
2434 PINMUX_DATA(HCTS0x_GMARK, GFN_HCTS0x),
2435 PINMUX_DATA(HTX0_GMARK, GFN_HTX0),
2436 PINMUX_DATA(HRX0_GMARK, GFN_HRX0),
2437 PINMUX_DATA(HSCK0_GMARK, GFN_HSCK0),
2438 PINMUX_DATA(RX2_A_GMARK, GFN_RX2_A),
2439 PINMUX_DATA(TX2_A_GMARK, GFN_TX2_A),
2440 PINMUX_DATA(SCK2_GMARK, GFN_SCK2),
2441 PINMUX_DATA(RTS1x_TANS_GMARK, GFN_RTS1x_TANS),
2442 PINMUX_DATA(CTS1x_GMARK, GFN_CTS1x),
2443 PINMUX_DATA(TX1_A_GMARK, GFN_TX1_A),
2444 PINMUX_DATA(RX1_A_GMARK, GFN_RX1_A),
2445 PINMUX_DATA(RTS0x_TANS_GMARK, GFN_RTS0x_TANS),
2446 PINMUX_DATA(CTS0x_GMARK, GFN_CTS0x),
2447 PINMUX_DATA(TX0_GMARK, GFN_TX0),
2448 PINMUX_DATA(RX0_GMARK, GFN_RX0),
2449 PINMUX_DATA(SCK0_GMARK, GFN_SCK0),
2452 PINMUX_DATA(GP6_30_GMARK, GFN_GP6_30),
2453 PINMUX_DATA(GP6_31_GMARK, GFN_GP6_31),
2454 PINMUX_DATA(USB30_OVC_GMARK, GFN_USB30_OVC),
2455 PINMUX_DATA(USB30_PWEN_GMARK, GFN_USB30_PWEN),
2456 PINMUX_DATA(USB1_OVC_GMARK, GFN_USB1_OVC),
2457 PINMUX_DATA(USB1_PWEN_GMARK, GFN_USB1_PWEN),
2458 PINMUX_DATA(USB0_OVC_GMARK, GFN_USB0_OVC),
2459 PINMUX_DATA(USB0_PWEN_GMARK, GFN_USB0_PWEN),
2460 PINMUX_DATA(AUDIO_CLKB_B_GMARK, GFN_AUDIO_CLKB_B),
2461 PINMUX_DATA(AUDIO_CLKA_A_GMARK, GFN_AUDIO_CLKA_A),
2462 PINMUX_DATA(SSI_SDATA9_A_GMARK, GFN_SSI_SDATA9_A),
2463 PINMUX_DATA(SSI_SDATA8_GMARK, GFN_SSI_SDATA8),
2464 PINMUX_DATA(SSI_SDATA7_GMARK, GFN_SSI_SDATA7),
2465 PINMUX_DATA(SSI_WS78_GMARK, GFN_SSI_WS78),
2466 PINMUX_DATA(SSI_SCK78_GMARK, GFN_SSI_SCK78),
2467 PINMUX_DATA(SSI_SDATA6_GMARK, GFN_SSI_SDATA6),
2468 PINMUX_DATA(SSI_WS6_GMARK, GFN_SSI_WS6),
2469 PINMUX_DATA(SSI_SCK6_GMARK, GFN_SSI_SCK6),
2470 PINMUX_DATA(SSI_SDATA5_MARK, FN_SSI_SDATA5),
2471 PINMUX_DATA(SSI_WS5_MARK, FN_SSI_WS5),
2472 PINMUX_DATA(SSI_SCK5_MARK, FN_SSI_SCK5),
2473 PINMUX_DATA(SSI_SDATA4_GMARK, GFN_SSI_SDATA4),
2474 PINMUX_DATA(SSI_WS4_GMARK, GFN_SSI_WS4),
2475 PINMUX_DATA(SSI_SCK4_GMARK, GFN_SSI_SCK4),
2476 PINMUX_DATA(SSI_SDATA3_GMARK, GFN_SSI_SDATA3),
2477 PINMUX_DATA(SSI_WS34_GMARK, GFN_SSI_WS34),
2478 PINMUX_DATA(SSI_SCK34_GMARK, GFN_SSI_SCK34),
2479 PINMUX_DATA(SSI_SDATA2_A_GMARK, GFN_SSI_SDATA2_A),
2480 PINMUX_DATA(SSI_SDATA1_A_GMARK, GFN_SSI_SDATA1_A),
2481 PINMUX_DATA(SSI_SDATA0_GMARK, GFN_SSI_SDATA0),
2482 PINMUX_DATA(SSI_WS01239_GMARK, GFN_SSI_WS01239),
2483 PINMUX_DATA(SSI_SCK01239_GMARK, GFN_SSI_SCK01239),
2486 PINMUX_DATA(HDMI1_CEC_MARK, FN_HDMI1_CEC),
2487 PINMUX_DATA(HDMI0_CEC_MARK, FN_HDMI0_CEC),
2488 PINMUX_DATA(AVS2_MARK, FN_AVS2),
2489 PINMUX_DATA(AVS1_MARK, FN_AVS1),
2491 /* ipsr setting .. underconstruction */
2494 static struct pinmux_gpio pinmux_gpios[] = {
2495 PINMUX_GPIO_GP_ALL(),
2515 GPIO_GFN(EX_WAIT0_A),
2545 GPIO_GFN(AVB_AVTP_CAPTURE_A),
2546 GPIO_GFN(AVB_AVTP_MATCH_A),
2548 GPIO_GFN(AVB_PHY_INT),
2549 GPIO_GFN(AVB_MAGIC),
2603 GPIO_FN(MSIOF0_RXD),
2604 GPIO_GFN(MSIOF0_SS2),
2605 GPIO_FN(MSIOF0_TXD),
2606 GPIO_GFN(MSIOF0_SS1),
2607 GPIO_GFN(MSIOF0_SYNC),
2608 GPIO_FN(MSIOF0_SCK),
2617 GPIO_GFN(RTS1x_TANS),
2621 GPIO_GFN(RTS0x_TANS),
2630 GPIO_GFN(USB30_OVC),
2631 GPIO_GFN(USB30_PWEN),
2633 GPIO_GFN(USB1_PWEN),
2635 GPIO_GFN(USB0_PWEN),
2636 GPIO_GFN(AUDIO_CLKB_B),
2637 GPIO_GFN(AUDIO_CLKA_A),
2638 GPIO_GFN(SSI_SDATA9_A),
2639 GPIO_GFN(SSI_SDATA8),
2640 GPIO_GFN(SSI_SDATA7),
2642 GPIO_GFN(SSI_SCK78),
2643 GPIO_GFN(SSI_SDATA6),
2646 GPIO_FN(SSI_SDATA5),
2649 GPIO_GFN(SSI_SDATA4),
2652 GPIO_GFN(SSI_SDATA3),
2654 GPIO_GFN(SSI_SCK34),
2655 GPIO_GFN(SSI_SDATA2_A),
2656 GPIO_GFN(SSI_SDATA1_A),
2657 GPIO_GFN(SSI_SDATA0),
2658 GPIO_GFN(SSI_WS01239),
2659 GPIO_GFN(SSI_SCK01239),
2669 GPIO_FN(MSIOF2_SS2_C),
2670 GPIO_IFN(AVB_MAGIC),
2671 GPIO_FN(MSIOF2_SS1_C),
2673 GPIO_IFN(AVB_PHY_INT),
2674 GPIO_FN(MSIOF2_SYNC_C),
2677 GPIO_FN(MSIOF2_SCK_C),
2679 GPIO_IFN(AVB_AVTP_MATCH_A),
2680 GPIO_FN(MSIOF2_RXD_C),
2682 GPIO_IFN(AVB_AVTP_CAPTURE_A),
2683 GPIO_FN(MSIOF2_TXD_C),
2684 GPIO_FN(RTS4x_TANS_A),
2688 GPIO_FN(VI4_DATA0_B),
2690 GPIO_FN(CANFD0_TX_B),
2691 GPIO_FN(MSIOF3_SS2_E),
2695 GPIO_FN(VI4_DATA1_B),
2697 GPIO_FN(CANFD0_RX_B),
2698 GPIO_FN(MSIOF3_SS1_E),
2703 GPIO_FN(DU_EXODDF_DU_ODDF_DISP_CDE),
2704 GPIO_FN(VI4_DATA2_B),
2705 GPIO_FN(MSIOF3_SYNC_E),
2709 GPIO_FN(DU_DOTCLKOUT1),
2710 GPIO_FN(VI4_DATA3_B),
2711 GPIO_FN(MSIOF3_SCK_E),
2715 GPIO_FN(DU_EXHSYNC_DU_HSYNC),
2716 GPIO_FN(VI4_DATA4_B),
2717 GPIO_FN(MSIOF3_RXD_E),
2721 GPIO_FN(DU_EXVSYNC_DU_VSYNC),
2722 GPIO_FN(VI4_DATA5_B),
2723 GPIO_FN(MSIOF3_TXD_E),
2726 GPIO_FN(AVB_AVTP_PPS),
2727 GPIO_FN(VI4_DATA6_B),
2731 GPIO_FN(VI4_DATA7_B),
2739 GPIO_FN(MSIOF3_SYNC_B),
2747 GPIO_FN(MSIOF3_TXD_B),
2753 GPIO_FN(MSIOF3_SCK_B),
2754 GPIO_FN(VI4_DATA10),
2759 GPIO_FN(MSIOF3_RXD_B),
2760 GPIO_FN(VI4_DATA11),
2765 GPIO_FN(MSIOF3_SS1_B),
2766 GPIO_FN(VI4_DATA12),
2767 GPIO_FN(VI5_DATA12),
2771 GPIO_FN(MSIOF3_SS2_B),
2773 GPIO_FN(VI4_DATA13),
2774 GPIO_FN(VI5_DATA13),
2778 GPIO_FN(MSIOF2_SS1_A),
2780 GPIO_FN(VI4_DATA14),
2781 GPIO_FN(VI5_DATA14),
2785 GPIO_FN(MSIOF2_SS2_A),
2787 GPIO_FN(VI4_DATA15),
2788 GPIO_FN(V15_DATA15),
2792 GPIO_FN(MSIOF2_SYNC_A),
2795 GPIO_FN(AVB_AVTP_MATCH_B),
2800 GPIO_FN(MSIOF2_SCK_A),
2802 GPIO_FN(VI5_VSYNCx),
2804 GPIO_FN(MSIOF2_RXD_A),
2805 GPIO_FN(RTS4n_TANS_B),
2806 GPIO_FN(VI5_HSYNCx),
2809 GPIO_FN(MSIOF2_TXD_A),
2814 GPIO_FN(AVB_AVTP_CAPTURE_B),
2819 GPIO_FN(MSIOF3_SCK_C),
2825 GPIO_FN(MSIOF3_SYNC_C),
2831 GPIO_FN(MSIOF3_RXD_C),
2833 GPIO_FN(VI5_DATA10),
2837 GPIO_FN(MSIOF3_TXD_C),
2839 GPIO_FN(VI5_DATA11),
2849 GPIO_FN(VI4_VSYNCx),
2853 GPIO_FN(VI4_HSYNCx),
2857 GPIO_FN(VI4_CLKENB),
2860 GPIO_FN(VI5_CLKENB),
2863 GPIO_FN(EX_WAIT0_B),
2866 GPIO_FN(MSIOF3_SCK_D),
2873 GPIO_FN(MSIOF3_SYNC_D),
2877 GPIO_FN(CANFD0_TX_A),
2879 GPIO_FN(MSIOF3_RXD_D),
2883 GPIO_FN(CANFD0_RX_A),
2887 GPIO_FN(MSIIOF3_TXD_D),
2894 GPIO_FN(MSIOF3_SS1_D),
2895 GPIO_FN(RTS3x_TANS),
2901 GPIO_IFN(EX_WAIT0_A),
2904 GPIO_FN(DU_DOTCLKOUT0),
2906 GPIO_FN(MSIOF2_SS1_B),
2907 GPIO_FN(MSIOF3_SCK_A),
2908 GPIO_FN(VI4_DATA16),
2911 GPIO_FN(MSIOF2_SS2_B),
2912 GPIO_FN(MSIOF3_SYNC_A),
2913 GPIO_FN(VI4_DATA17),
2916 GPIO_FN(MSIOF3_RXD_A),
2917 GPIO_FN(VI4_DATA18),
2920 GPIO_FN(MSIOF3_TXD_A),
2921 GPIO_FN(VI4_DATA19),
2924 GPIO_FN(MSIOF2_SCK_B),
2925 GPIO_FN(VI4_DATA20),
2930 GPIO_FN(MSIOF2_SYNC_B),
2931 GPIO_FN(VI4_DATA21),
2934 GPIO_FN(MSIOF2_RXD_B),
2935 GPIO_FN(VI4_DATA22),
2938 GPIO_FN(MSIOF2_TXD_B),
2939 GPIO_FN(VI4_DATA23),
2943 GPIO_FN(MSIOF2_SCK_D),
2945 GPIO_FN(VI4_DATA0_A),
2949 GPIO_FN(MSIOF2_SYNC_D),
2950 GPIO_FN(VI4_DATA1_A),
2954 GPIO_FN(MSIOF2_RXD_D),
2956 GPIO_FN(VI4_DATA2_A),
2961 GPIO_FN(MSIOF2_TXD_D),
2963 GPIO_FN(VI4_DATA3_A),
2964 GPIO_FN(RTS4x_TANS_C),
2968 GPIO_FN(MSIOF2_SS1_D),
2970 GPIO_FN(VI4_DATA4_A),
2976 GPIO_FN(MSIOF2_SS2_D),
2978 GPIO_FN(VI4_DATA5_A),
2982 GPIO_FN(MSIOF3_SS1_A),
2984 GPIO_FN(VI4_DATA6_A),
2989 GPIO_FN(MSIOF3_SS2_A),
2991 GPIO_FN(VI4_DATA7_A),
2996 GPIO_FN(MSIOF1_SCK_E),
2997 GPIO_FN(STP_OPWM_0_B),
2999 GPIO_FN(MSIOF1_SYNC_E),
3000 GPIO_FN(STP_IVCXO27_0_B),
3002 GPIO_FN(MSIOF1_RXD_E),
3004 GPIO_FN(STP_ISCLK_0_B),
3006 GPIO_FN(MSIOF1_TXD_E),
3007 GPIO_FN(TS_SPSYNC0_B),
3008 GPIO_FN(STP_ISSYNC_0_B),
3012 GPIO_FN(MSIOF1_SS1_E),
3013 GPIO_FN(TS_SDAT0_B),
3014 GPIO_FN(STP_ISD_0_B),
3017 GPIO_FN(MSIOF1_SS2_E),
3018 GPIO_FN(TS_SDEN0_B),
3019 GPIO_FN(STP_ISEN_0_B),
3022 GPIO_FN(MSIOF1_SCK_G),
3023 GPIO_FN(SIM0_CLK_A),
3026 GPIO_FN(MSIOF1_SYNC_G),
3029 GPIO_FN(STP_IVCXO27_1_B),
3033 GPIO_FN(MSIOF1_RXD_G),
3036 GPIO_FN(STP_ISCLK_1_B),
3040 GPIO_FN(MSIOF1_TXD_G),
3041 GPIO_FN(NFDATA14_B),
3042 GPIO_FN(TS_SPSYNC1_B),
3043 GPIO_FN(STP_ISSYNC_1_B),
3047 GPIO_FN(MSIOF1_SS1_G),
3048 GPIO_FN(NFDATA15_B),
3049 GPIO_FN(TS_SDAT1_B),
3050 GPIO_FN(STP_IOD_1_B),
3054 GPIO_FN(MSIOF1_SS2_G),
3056 GPIO_FN(TS_SDEN1_B),
3057 GPIO_FN(STP_ISEN_1_B),
3121 GPIO_FN(NFDATA14_A),
3123 GPIO_FN(SIM0_RST_A),
3126 GPIO_FN(NFDATA15_A),
3131 GPIO_FN(SIM0_CLK_B),
3139 GPIO_FN(MSIOF1_SS2_B),
3140 GPIO_FN(AUDIO_CLKC_B),
3142 GPIO_FN(SIM0_RST_B),
3143 GPIO_FN(STP_OPWM_0_C),
3144 GPIO_FN(RIF0_CLK_B),
3151 GPIO_FN(STP_ISCLK_0_C),
3157 GPIO_FN(TS_SPSYNC0_C),
3158 GPIO_FN(STP_ISSYNC_0_C),
3163 GPIO_FN(MSIOF1_SYNC_B),
3164 GPIO_FN(TS_SPSYNC1_C),
3165 GPIO_FN(STP_ISSYNC_1_C),
3166 GPIO_FN(RIF1_SYNC_B),
3167 GPIO_FN(AUDIO_CLKOUT_C),
3168 GPIO_FN(ADICS_SAMP),
3170 GPIO_IFN(RTS0x_TANS),
3172 GPIO_FN(MSIOF1_SS1_B),
3173 GPIO_FN(AUDIO_CLKA_B),
3175 GPIO_FN(STP_IVCXO27_1_C),
3176 GPIO_FN(RIF0_SYNC_B),
3181 GPIO_FN(TS_SDAT0_C),
3182 GPIO_FN(STP_ISD_0_C),
3183 GPIO_FN(RIF1_CLK_C),
3187 GPIO_FN(TS_SDEN0_C),
3188 GPIO_FN(STP_ISEN_0_C),
3193 GPIO_FN(MSIOF1_RXD_B),
3194 GPIO_FN(TS_SDEN1_C),
3195 GPIO_FN(STP_ISEN_1_C),
3199 GPIO_IFN(RTS1x_TANS),
3201 GPIO_FN(MSIOF1_TXD_B),
3202 GPIO_FN(TS_SDAT1_C),
3203 GPIO_FN(STP_ISD_1_C),
3208 GPIO_FN(SCIF_CLK_B),
3209 GPIO_FN(MSIOF1_SCK_B),
3211 GPIO_FN(STP_ISCLK_1_C),
3212 GPIO_FN(RIF1_CLK_B),
3221 GPIO_FN(FSO_CFE_0_B),
3227 GPIO_FN(RIF1_SYNC_C),
3228 GPIO_FN(FSO_CEF_1_B),
3231 GPIO_FN(MSIOF1_SCK_D),
3232 GPIO_FN(AUDIO_CLKB_A),
3233 GPIO_FN(SSI_SDATA1_B),
3235 GPIO_FN(STP_ISCLK_0_D),
3236 GPIO_FN(RIF0_CLK_C),
3240 GPIO_FN(MSIOF1_RXD_D),
3241 GPIO_FN(SS1_SDATA2_B),
3242 GPIO_FN(TS_SDEN0_D),
3243 GPIO_FN(STP_ISEN_0_D),
3247 GPIO_FN(MSIOF1_TXD_D),
3248 GPIO_FN(SSI_SDATA9_B),
3249 GPIO_FN(TS_SDAT0_D),
3250 GPIO_FN(STP_ISD_0_D),
3255 GPIO_FN(MSIOF1_SYNC_D),
3256 GPIO_FN(SSI_SCK9_A),
3257 GPIO_FN(TS_SPSYNC0_D),
3258 GPIO_FN(STP_ISSYNC_0_D),
3259 GPIO_FN(RIF0_SYNC_C),
3260 GPIO_FN(AUDIO_CLKOUT1_A),
3264 GPIO_FN(MSIOF1_SS1_D),
3266 GPIO_FN(STP_IVCXO27_0_D),
3268 GPIO_FN(AUDIO_CLKOUT2_A),
3270 GPIO_IFN(MSIOF0_SYNC),
3271 GPIO_FN(AUDIO_CLKOUT_A),
3276 GPIO_IFN(MSIOF0_SS1),
3279 GPIO_FN(AUDIO_CLKA_C),
3280 GPIO_FN(SSI_SCK2_A),
3281 GPIO_FN(STP_IVCXO27_0_C),
3282 GPIO_FN(AUDIO_CLKOUT3_A),
3285 GPIO_IFN(MSIOF0_SS2),
3287 GPIO_FN(MSIOF1_SS2_D),
3288 GPIO_FN(AUDIO_CLKC_A),
3290 GPIO_FN(STP_OPWM_0_D),
3291 GPIO_FN(AUDIO_CLKOUT_D),
3295 GPIO_FN(MSIOF1_SCK_F),
3300 GPIO_FN(MSIOF1_SYNC_F),
3305 GPIO_FN(MSIOF1_RXD_F),
3307 GPIO_IFN(SSI_SCK0129),
3308 GPIO_FN(MSIOF1_TXD_F),
3311 GPIO_IFN(SSI_WS0129),
3312 GPIO_FN(MSIOF1_SS1_F),
3315 GPIO_IFN(SSI_SDATA0),
3316 GPIO_FN(MSIOF1_SS2_F),
3320 GPIO_IFN(SSI_SDATA1_A),
3323 GPIO_IFN(SSI_SDATA2_A),
3324 GPIO_FN(SSI_SCK1_B),
3327 GPIO_IFN(SSI_SCK34),
3328 GPIO_FN(MSIOF1_SS1_A),
3329 GPIO_FN(STP_OPWM_0_A),
3333 GPIO_FN(MSIOF1_SS2_A),
3334 GPIO_FN(STP_IVCXO27_0_A),
3336 GPIO_IFN(SSI_SDATA3),
3338 GPIO_FN(MSIOF1_TXD_A),
3340 GPIO_FN(STP_ISCLK_0_A),
3346 GPIO_FN(MSIOF1_SCK_A),
3347 GPIO_FN(TS_SDAT0_A),
3348 GPIO_FN(STP_ISD_0_A),
3349 GPIO_FN(RIF0_CLK_A),
3350 GPIO_FN(RIF2_CLK_A),
3354 GPIO_FN(MSIOF1_SYNC_A),
3355 GPIO_FN(TS_SDEN0_A),
3356 GPIO_FN(STP_ISEN_0_A),
3357 GPIO_FN(RIF0_SYNC_A),
3358 GPIO_FN(RIF2_SYNC_A),
3360 GPIO_IFN(SSI_SDATA4),
3362 GPIO_FN(MSIOF1_RXD_A),
3363 GPIO_FN(TS_SPSYNC0_A),
3364 GPIO_FN(STP_ISSYNC_0_A),
3370 GPIO_FN(SIM0_RST_D),
3376 GPIO_IFN(SSI_SDATA6),
3377 GPIO_FN(SIM0_CLK_D),
3379 GPIO_IFN(SSI_SCK78),
3381 GPIO_FN(MSIOF1_SCK_C),
3383 GPIO_FN(STP_ISCLK_1_A),
3384 GPIO_FN(RIF1_CLK_A),
3385 GPIO_FN(RIF3_CLK_A),
3389 GPIO_FN(MSIOF1_SYNC_C),
3390 GPIO_FN(TS_SDAT1_A),
3391 GPIO_FN(STP_ISD_1_A),
3392 GPIO_FN(RIF1_SYNC_A),
3393 GPIO_FN(RIF3_SYNC_A),
3395 GPIO_IFN(SSI_SDATA7),
3397 GPIO_FN(MSIOF1_RXD_C),
3398 GPIO_FN(TS_SDEN1_A),
3399 GPIO_FN(STP_IEN_1_A),
3404 GPIO_IFN(SSI_SDATA8),
3406 GPIO_FN(MSIOF1_TXD_C),
3407 GPIO_FN(TS_SPSYNC1_A),
3408 GPIO_FN(STP_ISSYNC_1_A),
3412 GPIO_IFN(SSI_SDATA9_A),
3414 GPIO_FN(MSIOF1_SS1_C),
3418 GPIO_FN(STP_IVCXO27_1_A),
3422 GPIO_IFN(AUDIO_CLKA_A),
3423 GPIO_FN(CC5_OSCOUT),
3425 GPIO_IFN(AUDIO_CLKB_B),
3426 GPIO_FN(SCIF_CLK_A),
3427 GPIO_FN(STP_IVCXO27_1_D),
3431 GPIO_IFN(USB0_PWEN),
3432 GPIO_FN(SIM0_RST_C),
3434 GPIO_FN(STP_ISCLK_1_D),
3436 GPIO_FN(RIF3_CLK_B),
3437 GPIO_FN(FSO_CFE_1_A),
3442 GPIO_FN(TS_SDAT1_D),
3443 GPIO_FN(STP_ISD_1_D),
3444 GPIO_FN(RIF3_SYNC_B),
3447 GPIO_IFN(USB1_PWEN),
3448 GPIO_FN(SIM0_CLK_C),
3449 GPIO_FN(SSI_SCK1_A),
3451 GPIO_FN(STP_ISCLK_0_E),
3453 GPIO_FN(RIF2_CLK_B),
3458 GPIO_FN(MSIOF1_SS2_C),
3460 GPIO_FN(TS_SDAT0_E),
3461 GPIO_FN(STP_ISD_0_E),
3463 GPIO_FN(RIF2_SYNC_B),
3467 GPIO_IFN(USB30_PWEN),
3468 GPIO_FN(AUDIO_CLKOUT_B),
3469 GPIO_FN(SSI_SCK2_B),
3470 GPIO_FN(TS_SDEN1_D),
3471 GPIO_FN(STP_ISEN_1_D),
3472 GPIO_FN(STP_OPWM_0_E),
3479 GPIO_IFN(USB30_OVC),
3480 GPIO_FN(AUDIO_CLKOUT1_B),
3482 GPIO_FN(TS_SPSYNC1_D),
3483 GPIO_FN(STP_ISSYNC_1_D),
3484 GPIO_FN(STP_IVCXO27_0_E),
3491 GPIO_FN(AUDIO_CLKOUT2_B),
3492 GPIO_FN(SSI_SCK9_B),
3493 GPIO_FN(TS_SDEN0_E),
3494 GPIO_FN(STP_ISEN_0_E),
3496 GPIO_FN(FSO_CFE_0_A),
3502 GPIO_FN(AUDIO_CLKOUT3_B),
3504 GPIO_FN(TS_SPSYNC0_E),
3505 GPIO_FN(STP_ISSYNC_0_E),
3512 static struct pinmux_cfg_reg pinmux_config_regs[] = {
3513 /* GPSR0(0xE6060100) md[3:1] controls initial value */
3514 /* md[3:1] .. 0 : 0x0000FFFF */
3515 /* .. other : 0x00000000 */
3516 { PINMUX_CFG_REG("GPSR0", 0xE6060100, 32, 1) {
3535 GP_0_15_FN, GFN_D15,
3536 GP_0_14_FN, GFN_D14,
3537 GP_0_13_FN, GFN_D13,
3538 GP_0_12_FN, GFN_D12,
3539 GP_0_11_FN, GFN_D11,
3540 GP_0_10_FN, GFN_D10,
3552 /* GPSR1(0xE6060104) is md[3:1] controls initial value */
3553 /* md[3:1] .. 0 : 0x0EFFFFFF */
3554 /* .. other : 0x00000000 */
3555 { PINMUX_CFG_REG("GPSR1", 0xE6060104, 32, 1) {
3559 GP_1_28_FN, GFN_CLKOUT,
3560 GP_1_27_FN, GFN_EX_WAIT0_A,
3561 GP_1_26_FN, GFN_WE1x,
3562 GP_1_25_FN, GFN_WE0x,
3563 GP_1_24_FN, GFN_RD_WRx,
3564 GP_1_23_FN, GFN_RDx,
3565 GP_1_22_FN, GFN_BSx,
3566 GP_1_21_FN, GFN_CS1x_A26,
3567 GP_1_20_FN, GFN_CS0x,
3568 GP_1_19_FN, GFN_A19,
3569 GP_1_18_FN, GFN_A18,
3570 GP_1_17_FN, GFN_A17,
3571 GP_1_16_FN, GFN_A16,
3572 GP_1_15_FN, GFN_A15,
3573 GP_1_14_FN, GFN_A14,
3574 GP_1_13_FN, GFN_A13,
3575 GP_1_12_FN, GFN_A12,
3576 GP_1_11_FN, GFN_A11,
3577 GP_1_10_FN, GFN_A10,
3589 /* GPSR2(0xE6060108) is md[3:1] controls */
3590 /* md[3:1] .. 0 : 0x000003C0 */
3591 /* .. other : 0x00000200 */
3592 { PINMUX_CFG_REG("GPSR2", 0xE6060108, 32, 1) {
3612 GP_2_14_FN, GFN_AVB_AVTP_CAPTURE_A,
3613 GP_2_13_FN, GFN_AVB_AVTP_MATCH_A,
3614 GP_2_12_FN, GFN_AVB_LINK,
3615 GP_2_11_FN, GFN_AVB_PHY_INT,
3616 GP_2_10_FN, GFN_AVB_MAGIC,
3617 GP_2_9_FN, GFN_AVB_MDC,
3618 GP_2_8_FN, GFN_PWM2_A,
3619 GP_2_7_FN, GFN_PWM1_A,
3620 GP_2_6_FN, GFN_PWM0,
3621 GP_2_5_FN, GFN_IRQ5,
3622 GP_2_4_FN, GFN_IRQ4,
3623 GP_2_3_FN, GFN_IRQ3,
3624 GP_2_2_FN, GFN_IRQ2,
3625 GP_2_1_FN, GFN_IRQ1,
3626 GP_2_0_FN, GFN_IRQ0 }
3630 { PINMUX_CFG_REG("GPSR3", 0xE606010C, 32, 1) {
3649 GP_3_15_FN, GFN_SD1_WP,
3650 GP_3_14_FN, GFN_SD1_CD,
3651 GP_3_13_FN, GFN_SD0_WP,
3652 GP_3_12_FN, GFN_SD0_CD,
3653 GP_3_11_FN, GFN_SD1_DAT3,
3654 GP_3_10_FN, GFN_SD1_DAT2,
3655 GP_3_9_FN, GFN_SD1_DAT1,
3656 GP_3_8_FN, GFN_SD1_DAT0,
3657 GP_3_7_FN, GFN_SD1_CMD,
3658 GP_3_6_FN, GFN_SD1_CLK,
3659 GP_3_5_FN, GFN_SD0_DAT3,
3660 GP_3_4_FN, GFN_SD0_DAT2,
3661 GP_3_3_FN, GFN_SD0_DAT1,
3662 GP_3_2_FN, GFN_SD0_DAT0,
3663 GP_3_1_FN, GFN_SD0_CMD,
3664 GP_3_0_FN, GFN_SD0_CLK }
3667 { PINMUX_CFG_REG("GPSR4", 0xE6060110, 32, 1) {
3683 GP_4_17_FN, GFN_SD3_DS,
3684 GP_4_16_FN, GFN_SD3_DAT7,
3686 GP_4_15_FN, GFN_SD3_DAT6,
3687 GP_4_14_FN, GFN_SD3_DAT5,
3688 GP_4_13_FN, GFN_SD3_DAT4,
3689 GP_4_12_FN, FN_SD3_DAT3,
3690 GP_4_11_FN, FN_SD3_DAT2,
3691 GP_4_10_FN, FN_SD3_DAT1,
3692 GP_4_9_FN, FN_SD3_DAT0,
3693 GP_4_8_FN, FN_SD3_CMD,
3694 GP_4_7_FN, FN_SD3_CLK,
3695 GP_4_6_FN, GFN_SD2_DS,
3696 GP_4_5_FN, GFN_SD2_DAT3,
3697 GP_4_4_FN, GFN_SD2_DAT2,
3698 GP_4_3_FN, GFN_SD2_DAT1,
3699 GP_4_2_FN, GFN_SD2_DAT0,
3700 GP_4_1_FN, FN_SD2_CMD,
3701 GP_4_0_FN, GFN_SD2_CLK }
3704 { PINMUX_CFG_REG("GPSR5", 0xE6060114, 32, 1) {
3711 GP_5_25_FN, GFN_MLB_DAT,
3712 GP_5_24_FN, GFN_MLB_SIG,
3714 GP_5_23_FN, GFN_MLB_CLK,
3715 GP_5_22_FN, FN_MSIOF0_RXD,
3716 GP_5_21_FN, GFN_MSIOF0_SS2,
3717 GP_5_20_FN, FN_MSIOF0_TXD,
3718 GP_5_19_FN, GFN_MSIOF0_SS1,
3719 GP_5_18_FN, GFN_MSIOF0_SYNC,
3720 GP_5_17_FN, FN_MSIOF0_SCK,
3721 GP_5_16_FN, GFN_HRTS0x,
3722 GP_5_15_FN, GFN_HCTS0x,
3723 GP_5_14_FN, GFN_HTX0,
3724 GP_5_13_FN, GFN_HRX0,
3725 GP_5_12_FN, GFN_HSCK0,
3726 GP_5_11_FN, GFN_RX2_A,
3727 GP_5_10_FN, GFN_TX2_A,
3728 GP_5_9_FN, GFN_SCK2,
3729 GP_5_8_FN, GFN_RTS1x_TANS,
3730 GP_5_7_FN, GFN_CTS1x,
3731 GP_5_6_FN, GFN_TX1_A,
3732 GP_5_5_FN, GFN_RX1_A,
3733 GP_5_4_FN, GFN_RTS0x_TANS,
3734 GP_5_3_FN, GFN_CTS0x,
3737 GP_5_0_FN, GFN_SCK0 }
3740 { PINMUX_CFG_REG("GPSR6", 0xE6060118, 32, 1) {
3741 GP_6_31_FN, GFN_GP6_31,
3742 GP_6_30_FN, GFN_GP6_30,
3743 GP_6_29_FN, GFN_USB30_OVC,
3744 GP_6_28_FN, GFN_USB30_PWEN,
3745 GP_6_27_FN, GFN_USB1_OVC,
3746 GP_6_26_FN, GFN_USB1_PWEN,
3747 GP_6_25_FN, GFN_USB0_OVC,
3748 GP_6_24_FN, GFN_USB0_PWEN,
3749 GP_6_23_FN, GFN_AUDIO_CLKB_B,
3750 GP_6_22_FN, GFN_AUDIO_CLKA_A,
3751 GP_6_21_FN, GFN_SSI_SDATA9_A,
3752 GP_6_20_FN, GFN_SSI_SDATA8,
3753 GP_6_19_FN, GFN_SSI_SDATA7,
3754 GP_6_18_FN, GFN_SSI_WS78,
3755 GP_6_17_FN, GFN_SSI_SCK78,
3756 GP_6_16_FN, GFN_SSI_SDATA6,
3757 GP_6_15_FN, GFN_SSI_WS6,
3758 GP_6_14_FN, GFN_SSI_SCK6,
3759 GP_6_13_FN, FN_SSI_SDATA5,
3760 GP_6_12_FN, FN_SSI_WS5,
3761 GP_6_11_FN, FN_SSI_SCK5,
3762 GP_6_10_FN, GFN_SSI_SDATA4,
3763 GP_6_9_FN, GFN_SSI_WS4,
3764 GP_6_8_FN, GFN_SSI_SCK4,
3765 GP_6_7_FN, GFN_SSI_SDATA3,
3766 GP_6_6_FN, GFN_SSI_WS34,
3767 GP_6_5_FN, GFN_SSI_SCK34,
3768 GP_6_4_FN, GFN_SSI_SDATA2_A,
3769 GP_6_3_FN, GFN_SSI_SDATA1_A,
3770 GP_6_2_FN, GFN_SSI_SDATA0,
3771 GP_6_1_FN, GFN_SSI_WS01239,
3772 GP_6_0_FN, GFN_SSI_SCK01239 }
3775 { PINMUX_CFG_REG("GPSR7", 0xE606011C, 32, 1) {
3807 GP_7_3_FN, FN_HDMI1_CEC,
3808 GP_7_2_FN, FN_HDMI0_CEC,
3810 GP_7_0_FN, FN_AVS1 }
3812 { PINMUX_CFG_REG_VAR("IPSR0", 0xE6060200, 32,
3813 4, 4, 4, 4, 4, 4, 4, 4) {
3814 /* IPSR0_31_28 [4] */
3815 IFN_IRQ1, FN_QPOLA, 0, FN_DU_DISP,
3816 FN_VI4_DATA1_B, FN_CAN0_RX_B, FN_CANFD0_RX_B,
3820 /* IPSR0_27_24 [4] */
3821 IFN_IRQ0, FN_QPOLB, 0, FN_DU_CDE,
3822 FN_VI4_DATA0_B, FN_CAN0_TX_B, FN_CANFD0_TX_B,
3826 /* IPSR0_23_20 [4] */
3827 IFN_AVB_AVTP_CAPTURE_A, 0, FN_MSIOF2_TXD_C, FN_RTS4x_TANS_A,
3831 /* IPSR0_19_16 [4] */
3832 IFN_AVB_AVTP_MATCH_A, 0, FN_MSIOF2_RXD_C, FN_CTS4x_A,
3836 /* IPSR0_15_12 [4] */
3837 IFN_AVB_LINK, 0, FN_MSIOF2_SCK_C, FN_TX4_A,
3841 /* IPSR0_11_8 [4] */
3842 IFN_AVB_PHY_INT, 0, FN_MSIOF2_SYNC_C, FN_RX4_A,
3847 IFN_AVB_MAGIC, 0, FN_MSIOF2_SS1_C, FN_SCK4_A,
3852 IFN_AVB_MDC, 0, FN_MSIOF2_SS2_C, 0,
3858 { PINMUX_CFG_REG_VAR("IPSR1", 0xE6060204, 32,
3859 4, 4, 4, 4, 4, 4, 4, 4) {
3860 /* IPSR1_31_28 [4] */
3861 IFN_A0, FN_LCDOUT16, FN_MSIOF3_SYNC_B, 0,
3862 FN_VI4_DATA8, 0, FN_DU_DB0, 0,
3865 /* IPSR1_27_24 [4] */
3866 IFN_PWM2_A, FN_PWMFSW0, 0, FN_HTX3_D,
3870 /* IPSR1_23_20 [4] */
3871 IFN_PWM1_A, 0, 0, FN_HRX3_D,
3872 FN_VI4_DATA7_B, 0, 0, 0,
3875 /* IPSR1_19_16 [4] */
3876 IFN_PWM0, FN_AVB_AVTP_PPS, 0, 0,
3877 FN_VI4_DATA6_B, 0, 0, 0,
3878 0, FN_IECLK_B, 0, 0,
3880 /* IPSR1_15_12 [4] */
3881 IFN_IRQ5, FN_QSTB_QHE, 0, FN_DU_EXVSYNC_DU_VSYNC,
3882 FN_VI4_DATA5_B, 0, 0, FN_MSIOF3_TXD_E,
3885 /* IPSR1_11_8 [4] */
3886 IFN_IRQ4, FN_QSTH_QHS, 0, FN_DU_EXHSYNC_DU_HSYNC,
3887 FN_VI4_DATA4_B, 0, 0, FN_MSIOF3_RXD_E,
3891 IFN_IRQ3, FN_QSTVB_QVE, 0, FN_DU_DOTCLKOUT1,
3892 FN_VI4_DATA3_B, 0, 0, FN_MSIOF3_SCK_E,
3896 IFN_IRQ2, FN_QCPV_QDE, 0, FN_DU_EXODDF_DU_ODDF_DISP_CDE,
3897 FN_VI4_DATA2_B, 0, 0, FN_MSIOF3_SYNC_E,
3902 { PINMUX_CFG_REG_VAR("IPSR2", 0xE6060208, 32,
3903 4, 4, 4, 4, 4, 4, 4, 4) {
3904 /* IPSR2_31_28 [4] */
3905 IFN_A8, FN_RX3_B, FN_MSIOF2_SYNC_A, FN_HRX4_B,
3907 FN_AVB_AVTP_MATCH_B, FN_PWM1_B, 0, 0,
3909 /* IPSR2_27_24 [4] */
3910 IFN_A7, FN_LCDOUT23, FN_MSIOF2_SS2_A, FN_TX4_B,
3911 FN_VI4_DATA15, FN_V15_DATA15, FN_DU_DB7, 0,
3914 /* IPSR2_23_20 [4] */
3915 IFN_A6, FN_LCDOUT22, FN_MSIOF2_SS1_A, FN_RX4_B,
3916 FN_VI4_DATA14, FN_VI5_DATA14, FN_DU_DB6, 0,
3919 /* IPSR2_19_16 [4] */
3920 IFN_A5, FN_LCDOUT21, FN_MSIOF3_SS2_B, FN_SCK4_B,
3921 FN_VI4_DATA13, FN_VI5_DATA13, FN_DU_DB5, 0,
3924 /* IPSR2_15_12 [4] */
3925 IFN_A4, FN_LCDOUT20, FN_MSIOF3_SS1_B, 0,
3926 FN_VI4_DATA12, FN_VI5_DATA12, FN_DU_DB4, 0,
3929 /* IPSR2_11_8 [4] */
3930 IFN_A3, FN_LCDOUT19, FN_MSIOF3_RXD_B, 0,
3931 FN_VI4_DATA11, 0, FN_DU_DB3, 0,
3935 IFN_A2, FN_LCDOUT18, FN_MSIOF3_SCK_B, 0,
3936 FN_VI4_DATA10, 0, FN_DU_DB2, 0,
3940 IFN_A1, FN_LCDOUT17, FN_MSIOF3_TXD_B, 0,
3941 FN_VI4_DATA9, 0, FN_DU_DB1, 0,
3946 { PINMUX_CFG_REG_VAR("IPSR3", 0xE606020C, 32,
3947 4, 4, 4, 4, 4, 4, 4, 4) {
3948 /* IPSR3_31_28 [4] */
3949 IFN_A16, FN_LCDOUT8, 0, 0,
3950 FN_VI4_FIELD, 0, FN_DU_DG0, 0,
3953 /* IPSR3_27_24 [4] */
3954 IFN_A15, FN_LCDOUT15, FN_MSIOF3_TXD_C, 0,
3955 FN_HRTS4x, FN_VI5_DATA11, FN_DU_DG7, 0,
3958 /* IPSR3_23_20 [4] */
3959 IFN_A14, FN_LCDOUT14, FN_MSIOF3_RXD_C, 0,
3960 FN_HCTS4x, FN_VI5_DATA10, FN_DU_DG6, 0,
3963 /* IPSR3_19_16 [4] */
3964 IFN_A13, FN_LCDOUT13, FN_MSIOF3_SYNC_C, 0,
3965 FN_HTX4_A, FN_VI5_DATA9, FN_DU_DG5, 0,
3968 /* IPSR3_15_12 [4] */
3969 IFN_A12, FN_LCDOUT12, FN_MSIOF3_SCK_C, 0,
3970 FN_HRX4_A, FN_VI5_DATA8, FN_DU_DG4, 0,
3973 /* IPSR3_11_8 [4] */
3974 IFN_A11, FN_TX3_B, FN_MSIOF2_TXD_A, FN_HTX4_B,
3975 FN_HSCK4, FN_VI5_FIELD, 0, FN_SCL6_A,
3976 FN_AVB_AVTP_CAPTURE_B, FN_PWM2_B, FN_SPV_EVEN, 0,
3979 IFN_A10, 0, FN_MSIOF2_RXD_A, FN_RTS4n_TANS_B,
3980 0, FN_VI5_HSYNCx, 0, 0,
3984 IFN_A9, 0, FN_MSIOF2_SCK_A, FN_CTS4x_B,
3985 0, FN_VI5_VSYNCx, 0, 0,
3990 { PINMUX_CFG_REG_VAR("IPSR4", 0xE6060210, 32,
3991 4, 4, 4, 4, 4, 4, 4, 4) {
3992 /* IPSR4_31_28 [4] */
3993 IFN_RD_WRx, 0, FN_MSIOF3_RXD_D, FN_TX3_A,
3995 FN_CAN0_RX_A, FN_CANFD0_RX_A, 0, 0,
3997 /* IPSR4_27_24 [4] */
3998 IFN_RDx, 0, FN_MSIOF3_SYNC_D, FN_RX3_A,
4000 FN_CAN0_TX_A, FN_CANFD0_TX_A, 0, 0,
4002 /* IPSR4_23_20 [4] */
4003 IFN_BSx, FN_QSTVA_QVS, FN_MSIOF3_SCK_D, FN_SCK3,
4005 FN_CAN1_TX, FN_CANFD1_TX, FN_IETX_A, 0,
4007 /* IPSR4_19_16 [4] */
4008 IFN_CS1x_A26, 0, 0, 0,
4009 0, FN_VI5_CLK, 0, FN_EX_WAIT0_B,
4012 /* IPSR4_15_12 [4] */
4014 0, FN_VI5_CLKENB, 0, 0,
4017 /* IPSR4_11_8 [4] */
4018 IFN_A19, FN_LCDOUT11, 0, 0,
4019 FN_VI4_CLKENB, 0, FN_DU_DG3, 0,
4023 IFN_A18, FN_LCDOUT10, 0, 0,
4024 FN_VI4_HSYNCx, 0, FN_DU_DG2, 0,
4028 IFN_A17, FN_LCDOUT9, 0, 0,
4029 FN_VI4_VSYNCx, 0, FN_DU_DG1, 0,
4034 { PINMUX_CFG_REG_VAR("IPSR5", 0xE6060214, 32,
4035 4, 4, 4, 4, 4, 4, 4, 4) {
4036 /* IPSR5_31_28 [4] */
4037 IFN_D4, FN_MSIOF2_SCK_B, 0, 0,
4038 FN_VI4_DATA20, FN_VI5_DATA4, 0, 0,
4041 /* IPSR5_27_24 [4] */
4042 IFN_D3, 0, FN_MSIOF3_TXD_A, 0,
4043 FN_VI4_DATA19, FN_VI5_DATA3, 0, 0,
4046 /* IPSR5_23_20 [4] */
4047 IFN_D2, 0, FN_MSIOF3_RXD_A, 0,
4048 FN_VI4_DATA18, FN_VI5_DATA2, 0, 0,
4051 /* IPSR5_19_16 [4] */
4052 IFN_D1, FN_MSIOF2_SS2_B, FN_MSIOF3_SYNC_A, 0,
4053 FN_VI4_DATA17, FN_VI5_DATA1, 0, 0,
4056 /* IPSR5_15_12 [4] */
4057 IFN_D0, FN_MSIOF2_SS1_B, FN_MSIOF3_SCK_A, 0,
4058 FN_VI4_DATA16, FN_VI5_DATA0, 0, 0,
4061 /* IPSR5_11_8 [4] */
4062 IFN_EX_WAIT0_A, FN_QCLK, 0, 0,
4063 FN_VI4_CLK, 0, FN_DU_DOTCLKOUT0, 0,
4067 IFN_WE1x, 0, FN_MSIOF3_SS1_D, FN_RTS3x_TANS,
4068 FN_HRTS3x, 0, 0, FN_SDA6_B,
4069 FN_CAN1_RX, FN_CANFD1_RX, FN_IERX_A, 0,
4072 IFN_WE0x, 0, FN_MSIIOF3_TXD_D, FN_CTS3x,
4073 FN_HCTS3x, 0, 0, FN_SCL6_B,
4074 FN_CAN_CLK, 0, FN_IECLK_A, 0,
4078 { PINMUX_CFG_REG_VAR("IPSR6", 0xE6060218, 32,
4079 4, 4, 4, 4, 4, 4, 4, 4) {
4080 /* IPSR6_31_28 [4] */
4081 IFN_D12, FN_LCDOUT4, FN_MSIOF2_SS1_D, FN_RX4_C,
4082 FN_VI4_DATA4_A, 0, FN_DU_DR4, 0,
4085 /* IPSR6_27_24 [4] */
4086 IFN_D11, FN_LCDOUT3, FN_MSIOF2_TXD_D, FN_HTX3_B,
4087 FN_VI4_DATA3_A, FN_RTS4x_TANS_C, FN_DU_DR3, 0,
4090 /* IPSR6_23_20 [4] */
4091 IFN_D10, FN_LCDOUT2, FN_MSIOF2_RXD_D, FN_HRX3_B,
4092 FN_VI4_DATA2_A, FN_CTS4x_C, FN_DU_DR2, 0,
4095 /* IPSR6_19_16 [4] */
4096 IFN_D9, FN_LCDOUT1, FN_MSIOF2_SYNC_D, 0,
4097 FN_VI4_DATA1_A, 0, FN_DU_DR1, 0,
4100 /* IPSR6_15_12 [4] */
4101 IFN_D8, FN_LCDOUT0, FN_MSIOF2_SCK_D, FN_SCK4_C,
4102 FN_VI4_DATA0_A, 0, FN_DU_DR0, 0,
4105 /* IPSR6_11_8 [4] */
4106 IFN_D7, FN_MSIOF2_TXD_B, 0, 0,
4107 FN_VI4_DATA23, FN_VI5_DATA7, 0, 0,
4111 IFN_D6, FN_MSIOF2_RXD_B, 0, 0,
4112 FN_VI4_DATA22, FN_VI5_DATA6, 0, 0,
4116 IFN_D5, FN_MSIOF2_SYNC_B, 0, 0,
4117 FN_VI4_DATA21, FN_VI5_DATA5, 0, 0,
4122 { PINMUX_CFG_REG_VAR("IPSR7", 0xE606021C, 32,
4123 4, 4, 4, 4, 4, 4, 4, 4) {
4124 /* IPSR7_31_28 [4] */
4125 IFN_SD0_DAT1, 0, FN_MSIOF1_TXD_E, 0,
4126 0, FN_TS_SPSYNC0_B, FN_STP_ISSYNC_0_B, 0,
4129 /* IPSR7_27_24 [4] */
4130 IFN_SD0_DAT0, 0, FN_MSIOF1_RXD_E, 0,
4131 0, FN_TS_SCK0_B, FN_STP_ISCLK_0_B, 0,
4134 /* IPSR7_23_20 [4] */
4135 IFN_SD0_CMD, 0, FN_MSIOF1_SYNC_E, 0,
4136 0, 0, FN_STP_IVCXO27_0_B, 0,
4139 /* IPSR7_19_16 [4] */
4140 IFN_SD0_CLK, 0, FN_MSIOF1_SCK_E, 0,
4141 0, 0, FN_STP_OPWM_0_B, 0,
4144 /* IPSR7_15_12 [4] */
4145 FN_FSCLKST, 0, 0, 0,
4149 /* IPSR7_11_8 [4] */
4150 IFN_D15, FN_LCDOUT7, FN_MSIOF3_SS2_A, FN_HTX3_C,
4151 FN_VI4_DATA7_A, 0, FN_DU_DR7, FN_SDA6_C,
4155 IFN_D14, FN_LCDOUT6, FN_MSIOF3_SS1_A, FN_HRX3_C,
4156 FN_VI4_DATA6_A, 0, FN_DU_DR6, FN_SCL6_C,
4160 IFN_D13, FN_LCDOUT5, FN_MSIOF2_SS2_D, FN_TX4_C,
4161 FN_VI4_DATA5_A, 0, FN_DU_DR5, 0,
4166 { PINMUX_CFG_REG_VAR("IPSR8", 0xE6060220, 32,
4167 4, 4, 4, 4, 4, 4, 4, 4) {
4168 /* IPSR8_31_28 [4] */
4169 IFN_SD1_DAT3, FN_SD2_DAT7, FN_MSIOF1_SS2_G,
4171 0, FN_TS_SDEN1_B, FN_STP_ISEN_1_B, 0,
4174 /* IPSR8_27_24 [4] */
4175 IFN_SD1_DAT2, FN_SD2_DAT6, FN_MSIOF1_SS1_G,
4177 0, FN_TS_SDAT1_B, FN_STP_IOD_1_B, 0,
4180 /* IPSR8_23_20 [4] */
4181 IFN_SD1_DAT1, FN_SD2_DAT5, FN_MSIOF1_TXD_G,
4183 0, FN_TS_SPSYNC1_B, FN_STP_ISSYNC_1_B, 0,
4186 /* IPSR8_19_16 [4] */
4187 IFN_SD1_DAT0, FN_SD2_DAT4, FN_MSIOF1_RXD_G,
4189 0, FN_TS_SCK1_B, FN_STP_ISCLK_1_B, 0,
4192 /* IPSR8_15_12 [4] */
4193 IFN_SD1_CMD, 0, FN_MSIOF1_SYNC_G,
4195 0, FN_SIM0_D_A, FN_STP_IVCXO27_1_B, 0,
4198 /* IPSR8_11_8 [4] */
4199 IFN_SD1_CLK, 0, FN_MSIOF1_SCK_G, 0,
4200 0, FN_SIM0_CLK_A, 0, 0,
4204 IFN_SD0_DAT3, 0, FN_MSIOF1_SS2_E, 0,
4205 0, FN_TS_SDEN0_B, FN_STP_ISEN_0_B, 0,
4209 IFN_SD0_DAT2, 0, FN_MSIOF1_SS1_E, 0,
4210 0, FN_TS_SDAT0_B, FN_STP_ISD_0_B, 0,
4215 { PINMUX_CFG_REG_VAR("IPSR9", 0xE6060224, 32,
4216 4, 4, 4, 4, 4, 4, 4, 4) {
4217 /* IPSR9_31_28 [4] */
4218 IFN_SD3_CLK, 0, FN_NFWEx, 0,
4222 /* IPSR9_27_24 [4] */
4223 IFN_SD2_DS, 0, FN_NFALE, 0,
4227 /* IPSR9_23_20 [4] */
4228 IFN_SD2_DAT3, 0, FN_NFDATA13, 0,
4232 /* IPSR9_19_16 [4] */
4233 IFN_SD2_DAT2, 0, FN_NFDATA12, 0,
4237 /* IPSR9_15_12 [4] */
4238 IFN_SD2_DAT1, 0, FN_NFDATA11, 0,
4242 /* IPSR9_11_8 [4] */
4243 IFN_SD2_DAT0, 0, FN_NFDATA10, 0,
4248 IFN_SD2_CMD, 0, FN_NFDATA9, 0,
4253 IFN_SD3_CLK, 0, FN_NFDATA8, 0,
4259 { PINMUX_CFG_REG_VAR("IPSR10", 0xE6060228, 32,
4260 4, 4, 4, 4, 4, 4, 4, 4) {
4261 /* IPSR10_31_28 [4] */
4262 IFN_SD3_DAT6, FN_SD3_CD, FN_NFDATA6, 0,
4266 /* IPSR10_27_24 [4] */
4267 IFN_SD3_DAT5, FN_SD2_WP_A, FN_NFDATA5, 0,
4271 /* IPSR10_23_20 [4] */
4272 IFN_SD3_DAT4, FN_SD2_CD_A, FN_NFDATA4, 0,
4276 /* IPSR10_19_16 [4] */
4277 IFN_SD3_DAT3, 0, FN_NFDATA3, 0,
4281 /* IPSR10_15_12 [4] */
4282 IFN_SD3_DAT2, 0, FN_NFDATA2, 0,
4286 /* IPSR10_11_8 [4] */
4287 IFN_SD3_DAT1, 0, FN_NFDATA1, 0,
4291 /* IPSR10_7_4 [4] */
4292 IFN_SD3_DAT0, 0, FN_NFDATA0, 0,
4296 /* IPSR10_3_0 [4] */
4297 IFN_SD3_CMD, 0, FN_NFREx, 0,
4303 { PINMUX_CFG_REG_VAR("IPSR11", 0xE606022C, 32,
4304 4, 4, 4, 4, 4, 4, 4, 4) {
4305 /* IPSR11_31_28 [4] */
4306 IFN_RX0, FN_HRX1_B, 0, 0,
4307 0, FN_TS_SCK0_C, FN_STP_ISCLK_0_C, FN_RIF0_D0_B,
4310 /* IPSR11_27_24 [4] */
4311 IFN_SCK0, FN_HSCK1_B, FN_MSIOF1_SS2_B, FN_AUDIO_CLKC_B,
4312 FN_SDA2_A, FN_SIM0_RST_B, FN_STP_OPWM_0_C,
4314 0, FN_ADICHS2, 0, FN_RIF0_CLK_B,
4316 /* IPSR11_23_20 [4] */
4317 IFN_SD1_WP, 0, FN_NFCEx_A, 0,
4318 0, FN_SIM0_D_B, 0, 0,
4321 /* IPSR11_19_16 [4] */
4322 IFN_SD1_CD, 0, FN_NFRBx_A, 0,
4323 0, FN_SIM0_CLK_B, 0, 0,
4326 /* IPSR11_15_12 [4] */
4327 IFN_SD0_WP, 0, FN_NFDATA15_A, 0,
4331 /* IPSR11_11_8 [4] */
4332 IFN_SD0_CD, 0, FN_NFDATA14_A, 0,
4333 FN_SCL2_B, FN_SIM0_RST_A, 0, 0,
4336 /* IPSR11_7_4 [4] */
4337 IFN_SD3_DS, 0, FN_NFCLE, 0,
4341 /* IPSR11_3_0 [4] */
4342 IFN_SD3_DAT7, FN_SD3_WP, FN_NFDATA7, 0,
4348 { PINMUX_CFG_REG_VAR("IPSR12", 0xE6060230, 32,
4349 4, 4, 4, 4, 4, 4, 4, 4) {
4350 /* IPSR12_31_28 [4] */
4351 IFN_SCK2, FN_SCIF_CLK_B, FN_MSIOF1_SCK_B, 0,
4352 0, FN_TS_SCK1_C, FN_STP_ISCLK_1_C, FN_RIF1_CLK_B,
4355 /* IPSR12_27_24 [4] */
4356 IFN_RTS1x_TANS, FN_HRTS1x_A, FN_MSIOF1_TXD_B, 0,
4357 0, FN_TS_SDAT1_C, FN_STP_ISD_1_C, FN_RIF1_D1_B,
4358 0, FN_ADICHS0, 0, 0,
4360 /* IPSR12_23_20 [4] */
4361 IFN_CTS1x, FN_HCTS1x_A, FN_MSIOF1_RXD_B, 0,
4362 0, FN_TS_SDEN1_C, FN_STP_ISEN_1_C, FN_RIF1_D0_B,
4363 0, FN_ADIDATA, 0, 0,
4364 /* IPSR12_19_16 [4] */
4365 IFN_TX1_A, FN_HTX1_A, 0, 0,
4366 0, FN_TS_SDEN0_C, FN_STP_ISEN_0_C, FN_RIF1_D0_C,
4369 /* IPSR12_15_12 [4] */
4370 IFN_RX1_A, FN_HRX1_A, 0, 0,
4371 0, FN_TS_SDAT0_C, FN_STP_ISD_0_C, FN_RIF1_CLK_C,
4374 /* IPSR12_11_8 [4] */
4375 IFN_RTS0x_TANS, FN_HRTS1x_B, FN_MSIOF1_SS1_B, FN_AUDIO_CLKA_B,
4376 FN_SCL2_A, 0, FN_STP_IVCXO27_1_C, FN_RIF0_SYNC_B,
4377 0, FN_ADICHS1, 0, 0,
4379 /* IPSR12_7_4 [4] */
4380 IFN_CTS0x, FN_HCTS1x_B, FN_MSIOF1_SYNC_B, 0,
4381 0, FN_TS_SPSYNC1_C, FN_STP_ISSYNC_1_C, FN_RIF1_SYNC_B,
4382 FN_AUDIO_CLKOUT_C, FN_ADICS_SAMP, 0, 0,
4384 /* IPSR12_3_0 [4] */
4385 IFN_TX0, FN_HTX1_B, 0, 0,
4386 0, FN_TS_SPSYNC0_C, FN_STP_ISSYNC_0_C, FN_RIF0_D1_B,
4391 { PINMUX_CFG_REG_VAR("IPSR13", 0xE6060234, 32,
4392 4, 4, 4, 4, 4, 4, 4, 4) {
4393 /* IPSR13_31_28 [4] */
4394 IFN_MSIOF0_SYNC, 0, 0, 0,
4396 FN_AUDIO_CLKOUT_A, 0, FN_TX5_B, 0,
4397 0, FN_BPFCLK_D, 0, 0,
4398 /* IPSR13_27_24 [4] */
4399 IFN_HRTS0x, FN_TX2_B, FN_MSIOF1_SS1_D, 0,
4400 FN_SSI_WS9_A, 0, FN_STP_IVCXO27_0_D, FN_BPFCLK_A,
4401 FN_AUDIO_CLKOUT2_A, 0, 0, 0,
4403 /* IPSR13_23_20 [4] */
4404 IFN_HCTS0x, FN_RX2_B, FN_MSIOF1_SYNC_D, 0,
4405 FN_SSI_SCK9_A, FN_TS_SPSYNC0_D, FN_STP_ISSYNC_0_D,
4407 FN_AUDIO_CLKOUT1_A, 0, 0, 0,
4409 /* IPSR13_19_16 [4] */
4410 IFN_HTX0, 0, FN_MSIOF1_TXD_D, 0,
4411 FN_SSI_SDATA9_B, FN_TS_SDAT0_D, FN_STP_ISD_0_D, FN_RIF0_D1_C,
4414 /* IPSR13_15_12 [4] */
4415 IFN_HRX0, 0, FN_MSIOF1_RXD_D, 0,
4416 FN_SS1_SDATA2_B, FN_TS_SDEN0_D, FN_STP_ISEN_0_D, FN_RIF0_D0_C,
4419 /* IPSR13_11_8 [4] */
4420 IFN_HSCK0, 0, FN_MSIOF1_SCK_D, FN_AUDIO_CLKB_A,
4421 FN_SSI_SDATA1_B, FN_TS_SCK0_D, FN_STP_ISCLK_0_D, FN_RIF0_CLK_C,
4424 /* IPSR13_7_4 [4] */
4425 IFN_RX2_A, 0, 0, FN_SD2_WP_B,
4426 FN_SDA1_A, 0, FN_FMIN_A, FN_RIF1_SYNC_C,
4427 0, FN_FSO_CEF_1_B, 0, 0,
4429 /* IPSR13_3_0 [4] */
4430 IFN_TX2_A, 0, 0, FN_SD2_CD_B,
4431 FN_SCL1_A, 0, FN_FMCLK_A, FN_RIF1_D1_C,
4432 0, FN_FSO_CFE_0_B, 0, 0,
4436 { PINMUX_CFG_REG_VAR("IPSR14", 0xE6060238, 32,
4437 4, 4, 4, 4, 4, 4, 4, 4) {
4438 /* IPSR14_31_28 [4] */
4439 IFN_SSI_SDATA0, 0, FN_MSIOF1_SS2_F, 0,
4443 /* IPSR14_27_24 [4] */
4444 IFN_SSI_WS0129, 0, FN_MSIOF1_SS1_F, 0,
4448 /* IPSR14_23_20 [4] */
4449 IFN_SSI_SCK0129, 0, FN_MSIOF1_TXD_F, 0,
4453 /* IPSR14_19_16 [4] */
4454 IFN_MLB_DAT, FN_TX1_B, FN_MSIOF1_RXD_F, 0,
4458 /* IPSR14_15_12 [4] */
4459 IFN_MLB_SIG, FN_RX1_B, FN_MSIOF1_SYNC_F, 0,
4463 /* IPSR14_11_8 [4] */
4464 IFN_MLB_CLK, 0, FN_MSIOF1_SCK_F, 0,
4468 /* IPSR14_7_4 [4] */
4469 IFN_MSIOF0_SS2, FN_TX5_A, FN_MSIOF1_SS2_D, FN_AUDIO_CLKC_A,
4470 FN_SSI_WS2_A, 0, FN_STP_OPWM_0_D, 0,
4471 FN_AUDIO_CLKOUT_D, 0, FN_SPEEDIN_B, 0,
4472 /* IPSR14_3_0 [4] */
4473 IFN_MSIOF0_SS1, FN_RX5_A, 0, FN_AUDIO_CLKA_C,
4474 FN_SSI_SCK2_A, 0, FN_STP_IVCXO27_0_C, 0,
4475 FN_AUDIO_CLKOUT3_A, 0, FN_TCLK1_B, 0,
4479 { PINMUX_CFG_REG_VAR("IPSR15", 0xE606023C, 32,
4480 4, 4, 4, 4, 4, 4, 4, 4) {
4481 /* IPSR15_31_28 [4] */
4482 IFN_SSI_SDATA4, FN_HSCK2_A, FN_MSIOF1_RXD_A, 0,
4483 0, FN_TS_SPSYNC0_A, FN_STP_ISSYNC_0_A, FN_RIF0_D0_A,
4484 FN_RIF2_D1_A, 0, 0, 0,
4486 /* IPSR15_27_24 [4] */
4487 IFN_SSI_WS4, FN_HTX2_A, FN_MSIOF1_SYNC_A, 0,
4488 0, FN_TS_SDEN0_A, FN_STP_ISEN_0_A, FN_RIF0_SYNC_A,
4489 FN_RIF2_SYNC_A, 0, 0, 0,
4491 /* IPSR15_23_20 [4] */
4492 IFN_SSI_SCK4, FN_HRX2_A, FN_MSIOF1_SCK_A, 0,
4493 0, FN_TS_SDAT0_A, FN_STP_ISD_0_A, FN_RIF0_CLK_A,
4494 FN_RIF2_CLK_A, 0, 0, 0,
4496 /* IPSR15_19_16 [4] */
4497 IFN_SSI_SDATA3, FN_HRTS2x_A, FN_MSIOF1_TXD_A, 0,
4498 0, FN_TS_SCK0_A, FN_STP_ISCLK_0_A, FN_RIF0_D1_A,
4499 FN_RIF2_D0_A, 0, 0, 0,
4501 /* IPSR15_15_12 [4] */
4502 IFN_SSI_WS34, FN_HCTS2x_A, FN_MSIOF1_SS2_A, 0,
4503 0, 0, FN_STP_IVCXO27_0_A, 0,
4506 /* IPSR15_11_8 [4] */
4507 IFN_SSI_SCK34, 0, FN_MSIOF1_SS1_A, 0,
4508 0, 0, FN_STP_OPWM_0_A, 0,
4511 /* IPSR15_7_4 [4] */
4512 IFN_SSI_SDATA2_A, 0, 0, 0,
4513 FN_SSI_SCK1_B, 0, 0, FN_MOUT6,
4516 /* IPSR15_3_0 [4] */
4517 IFN_SSI_SDATA1_A, 0, 0, 0,
4523 { PINMUX_CFG_REG_VAR("IPSR16", 0xE6060240, 32,
4524 4, 4, 4, 4, 4, 4, 4, 4) {
4525 /* IPSR16_31_28 [4] */
4526 IFN_SSI_SDATA9_A, FN_HSCK2_B, FN_MSIOF1_SS1_C, FN_HSCK1_A,
4527 FN_SSI_WS1_B, FN_SCK1, FN_STP_IVCXO27_1_A, FN_SCK5,
4530 /* IPSR16_27_24 [4] */
4531 IFN_SSI_SDATA8, FN_HRTS2x_B, FN_MSIOF1_TXD_C, 0,
4532 0, FN_TS_SPSYNC1_A, FN_STP_ISSYNC_1_A, FN_RIF1_D1_A,
4533 FN_EIF3_D1_A, 0, 0, 0,
4535 /* IPSR16_23_20 [4] */
4536 IFN_SSI_SDATA7, FN_HCTS2x_B, FN_MSIOF1_RXD_C, 0,
4537 0, FN_TS_SDEN1_A, FN_STP_IEN_1_A, FN_RIF1_D0_A,
4538 FN_RIF3_D0_A, 0, FN_TCLK2_A, 0,
4539 /* IPSR16_19_16 [4] */
4540 IFN_SSI_WS78, FN_HTX2_B, FN_MSIOF1_SYNC_C, 0,
4541 0, FN_TS_SDAT1_A, FN_STP_ISD_1_A, FN_RIF1_SYNC_A,
4542 FN_RIF3_SYNC_A, 0, 0, 0,
4544 /* IPSR16_15_12 [4] */
4545 IFN_SSI_SCK78, FN_HRX2_B, FN_MSIOF1_SCK_C, 0,
4546 0, FN_TS_SCK1_A, FN_STP_ISCLK_1_A, FN_RIF1_CLK_A,
4547 FN_RIF3_CLK_A, 0, 0, 0,
4549 /* IPSR16_11_8 [4] */
4550 IFN_SSI_SDATA6, 0, 0, FN_SIM0_CLK_D,
4554 /* IPSR16_7_4 [4] */
4555 IFN_SSI_WS6, 0, 0, FN_SIM0_D_D,
4559 /* IPSR16_3_0 [4] */
4560 IFN_SSI_SCK6, 0, 0, FN_SIM0_RST_D,
4562 0, 0, FN_FSO_TOE_A, 0,
4566 { PINMUX_CFG_REG_VAR("IPSR17", 0xE6060244, 32,
4567 4, 4, 4, 4, 4, 4, 4, 4) {
4568 /* IPSR17_31_28 [4] */
4569 IFN_USB30_OVC, 0, FN_AUDIO_CLKOUT1_B, 0,
4570 FN_SSI_WS2_B, FN_TS_SPSYNC1_D, FN_STP_ISSYNC_1_D,
4572 FN_RIF3_D1_B, 0, FN_FSO_TOE_B, FN_TPU0TO1,
4574 /* IPSR17_27_24 [4] */
4575 IFN_USB30_PWEN, 0, 0, FN_AUDIO_CLKOUT_B,
4576 FN_SSI_SCK2_B, FN_TS_SDEN1_D, FN_STP_ISEN_1_D, FN_STP_OPWM_0_E,
4577 FN_RIF3_D0_B, 0, FN_TCLK2_B, FN_TPU0TO0,
4578 FN_BPFCLK_C, FN_HRTS2x_C, 0, 0,
4579 /* IPSR17_23_20 [4] */
4580 IFN_USB1_OVC, 0, FN_MSIOF1_SS2_C, 0,
4581 FN_SSI_WS1_A, FN_TS_SDAT0_E, FN_STP_ISD_0_E, FN_FMIN_B,
4582 FN_RIF2_SYNC_B, 0, FN_REMOCON_B, 0,
4583 0, FN_HCTS2x_C, 0, 0,
4584 /* IPSR17_19_16 [4] */
4585 IFN_USB1_PWEN, 0, 0, FN_SIM0_CLK_C,
4586 FN_SSI_SCK1_A, FN_TS_SCK0_E, FN_STP_ISCLK_0_E, FN_FMCLK_B,
4587 FN_RIF2_CLK_B, 0, FN_SPEEDIN_A, 0,
4589 /* IPSR17_15_12 [4] */
4590 IFN_USB0_OVC, 0, 0, FN_SIM0_D_C,
4591 0, FN_TS_SDAT1_D, FN_STP_ISD_1_D, 0,
4592 FN_RIF3_SYNC_B, 0, 0, 0,
4594 /* IPSR17_11_8 [4] */
4595 IFN_USB0_PWEN, 0, 0, FN_SIM0_RST_C,
4596 0, FN_TS_SCK1_D, FN_STP_ISCLK_1_D, FN_BPFCLK_B,
4597 FN_RIF3_CLK_B, 0, FN_FSO_CFE_1_A, 0,
4598 0, FN_HSCK2_C, 0, 0,
4599 /* IPSR17_7_4 [4] */
4600 IFN_AUDIO_CLKB_B, FN_SCIF_CLK_A, 0, 0,
4601 0, 0, FN_STP_IVCXO27_1_D, FN_REMOCON_A,
4602 0, 0, FN_TCLK1_A, 0,
4604 /* IPSR17_3_0 [4] */
4605 IFN_AUDIO_CLKA_A, 0, 0, 0,
4607 0, 0, 0, FN_CC5_OSCOUT,
4611 { PINMUX_CFG_REG_VAR("IPSR18", 0xE6060248, 32,
4612 1, 1, 1, 1, 1, 1, 1, 1,
4613 1, 1, 1, 1, 1, 1, 1, 1,
4614 1, 1, 1, 1, 1, 1, 1, 1,
4616 /* reserved [31..24] */
4625 /* reserved [23..16] */
4634 /* reserved [15..8] */
4643 /* IPSR18_7_4 [4] */
4644 IFN_GP6_31, 0, 0, FN_AUDIO_CLKOUT3_B,
4645 FN_SSI_WS9_B, FN_TS_SPSYNC0_E, FN_STP_ISSYNC_0_E, 0,
4646 FN_RIF2_D1_B, 0, 0, FN_TPU0TO3,
4647 FN_FMIN_C, FN_FMIN_D, 0, 0,
4648 /* IPSR18_3_0 [4] */
4649 IFN_GP6_30, 0, 0, FN_AUDIO_CLKOUT2_B,
4650 FN_SSI_SCK9_B, FN_TS_SDEN0_E, FN_STP_ISEN_0_E, 0,
4651 FN_RIF2_D0_B, 0, FN_FSO_CFE_0_A, FN_TPU0TO2,
4652 FN_FMCLK_C, FN_FMCLK_D, 0, 0,
4655 { PINMUX_CFG_REG_VAR("MOD_SEL0", 0xE6060500, 32,
4657 1, 1, 1, 1, 1, 2, 1,
4660 /* SEL_MSIOF3 [3] */
4661 FN_SEL_MSIOF3_0, FN_SEL_MSIOF3_1,
4662 FN_SEL_MSIOF3_2, FN_SEL_MSIOF3_3,
4663 FN_SEL_MSIOF3_4, FN_SEL_MSIOF3_5,
4665 /* SEL_MSIOF2 [2] */
4666 FN_SEL_MSIOF2_0, FN_SEL_MSIOF2_1,
4667 FN_SEL_MSIOF2_2, FN_SEL_MSIOF2_3,
4668 /* SEL_MSIOF1 [3] */
4669 FN_SEL_MSIOF1_0, FN_SEL_MSIOF1_1,
4670 FN_SEL_MSIOF1_2, FN_SEL_MSIOF1_3,
4671 FN_SEL_MSIOF1_4, FN_SEL_MSIOF1_5,
4675 FN_SEL_LBSC_0, FN_SEL_LBSC_1,
4677 FN_SEL_IEBUS_0, FN_SEL_IEBUS_1,
4679 FN_SEL_I2C2_0, FN_SEL_I2C2_1,
4681 FN_SEL_I2C1_0, FN_SEL_I2C1_1,
4682 /* SEL_HSCIF4 [1] */
4683 FN_SEL_HSCIF4_0, FN_SEL_HSCIF4_1,
4684 /* SEL_HSCIF3 [2] */
4685 FN_SEL_HSCIF3_0, FN_SEL_HSCIF3_1,
4686 FN_SEL_HSCIF3_2, FN_SEL_HSCIF3_3,
4687 /* SEL_HSCIF1 [1] */
4688 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
4691 FN_SEL_FSO_0, FN_SEL_FSO_1,
4692 /* SEL_HSCIF2 [2] */
4693 FN_SEL_HSCIF2_0, FN_SEL_HSCIF2_1,
4695 /* SEL_ETHERAVB [1] */
4696 FN_SEL_ETHERAVB_0, FN_SEL_ETHERAVB_1,
4698 FN_SEL_DRIF3_0, FN_SEL_DRIF3_1,
4700 FN_SEL_DRIF2_0, FN_SEL_DRIF2_1,
4702 FN_SEL_DRIF1_0, FN_SEL_DRIF1_1,
4706 FN_SEL_DRIF0_0, FN_SEL_DRIF0_1,
4708 /* SEL_CANFD0 [1] */
4709 FN_SEL_CANFD_0, FN_SEL_CANFD_1,
4711 FN_SEL_ADG_0, FN_SEL_ADG_1,
4712 FN_SEL_ADG_2, FN_SEL_ADG_3,
4719 { PINMUX_CFG_REG_VAR("MOD_SEL1", 0xE6060504, 32,
4722 2, 1, 1, 1, 1, 1, 1,
4723 1, 1, 1, 1, 1, 1, 1, 1) {
4738 /* SEL_TIMER_TMU [1] */
4741 /* SEL_SSP1_1 [2] */
4747 /* SEL_SSP1_0 [3] */
4759 /* SEL_SPEED_PULSE_IF [1] */
4760 FN_SEL_SPEED_PULSE_IF_0,
4761 FN_SEL_SPEED_PULSE_IF_1,
4762 /* SEL_SIMCARD [2] */
4788 /* SEL_REMOCON [1] */
4818 { PINMUX_CFG_REG_VAR("MOD_SEL2", 0xE6060508, 32,
4820 3, 1, 1, 1, 1, 1, 1,
4821 1, 1, 1, 1, 1, 1, 1, 1,
4822 1, 1, 1, 1, 1, 1, 1, 1,
4860 /* SEL_TIMER_TME2 [1] */
4861 FN_SEL_TIMER_TMU2_0,
4862 FN_SEL_TIMER_TMU2_1,
4894 /* under construction */
4895 { PINMUX_CFG_REG("INOUTSEL0", 0xE6050004, 32, 1) {
4914 GP_0_15_IN, GP_0_15_OUT,
4915 GP_0_14_IN, GP_0_14_OUT,
4916 GP_0_13_IN, GP_0_13_OUT,
4917 GP_0_12_IN, GP_0_12_OUT,
4918 GP_0_11_IN, GP_0_11_OUT,
4919 GP_0_10_IN, GP_0_10_OUT,
4920 GP_0_9_IN, GP_0_9_OUT,
4921 GP_0_8_IN, GP_0_8_OUT,
4922 GP_0_7_IN, GP_0_7_OUT,
4923 GP_0_6_IN, GP_0_6_OUT,
4924 GP_0_5_IN, GP_0_5_OUT,
4925 GP_0_4_IN, GP_0_4_OUT,
4926 GP_0_3_IN, GP_0_3_OUT,
4927 GP_0_2_IN, GP_0_2_OUT,
4928 GP_0_1_IN, GP_0_1_OUT,
4929 GP_0_0_IN, GP_0_0_OUT,
4932 { PINMUX_CFG_REG("INOUTSEL1", 0xE6051004, 32, 1) {
4936 GP_1_28_IN, GP_1_28_OUT,
4937 GP_1_27_IN, GP_1_27_OUT,
4938 GP_1_26_IN, GP_1_26_OUT,
4939 GP_1_25_IN, GP_1_25_OUT,
4940 GP_1_24_IN, GP_1_24_OUT,
4941 GP_1_23_IN, GP_1_23_OUT,
4942 GP_1_22_IN, GP_1_22_OUT,
4943 GP_1_21_IN, GP_1_21_OUT,
4944 GP_1_20_IN, GP_1_20_OUT,
4945 GP_1_19_IN, GP_1_19_OUT,
4946 GP_1_18_IN, GP_1_18_OUT,
4947 GP_1_17_IN, GP_1_17_OUT,
4948 GP_1_16_IN, GP_1_16_OUT,
4949 GP_1_15_IN, GP_1_15_OUT,
4950 GP_1_14_IN, GP_1_14_OUT,
4951 GP_1_13_IN, GP_1_13_OUT,
4952 GP_1_12_IN, GP_1_12_OUT,
4953 GP_1_11_IN, GP_1_11_OUT,
4954 GP_1_10_IN, GP_1_10_OUT,
4955 GP_1_9_IN, GP_1_9_OUT,
4956 GP_1_8_IN, GP_1_8_OUT,
4957 GP_1_7_IN, GP_1_7_OUT,
4958 GP_1_6_IN, GP_1_6_OUT,
4959 GP_1_5_IN, GP_1_5_OUT,
4960 GP_1_4_IN, GP_1_4_OUT,
4961 GP_1_3_IN, GP_1_3_OUT,
4962 GP_1_2_IN, GP_1_2_OUT,
4963 GP_1_1_IN, GP_1_1_OUT,
4964 GP_1_0_IN, GP_1_0_OUT,
4967 { PINMUX_CFG_REG("INOUTSEL2", 0xE6052004, 32, 1) {
4987 GP_2_14_IN, GP_2_14_OUT,
4988 GP_2_13_IN, GP_2_13_OUT,
4989 GP_2_12_IN, GP_2_12_OUT,
4990 GP_2_11_IN, GP_2_11_OUT,
4991 GP_2_10_IN, GP_2_10_OUT,
4992 GP_2_9_IN, GP_2_9_OUT,
4993 GP_2_8_IN, GP_2_8_OUT,
4994 GP_2_7_IN, GP_2_7_OUT,
4995 GP_2_6_IN, GP_2_6_OUT,
4996 GP_2_5_IN, GP_2_5_OUT,
4997 GP_2_4_IN, GP_2_4_OUT,
4998 GP_2_3_IN, GP_2_3_OUT,
4999 GP_2_2_IN, GP_2_2_OUT,
5000 GP_2_1_IN, GP_2_1_OUT,
5001 GP_2_0_IN, GP_2_0_OUT,
5004 { PINMUX_CFG_REG("INOUTSEL3", 0xE6053004, 32, 1) {
5023 GP_3_15_IN, GP_3_15_OUT,
5024 GP_3_14_IN, GP_3_14_OUT,
5025 GP_3_13_IN, GP_3_13_OUT,
5026 GP_3_12_IN, GP_3_12_OUT,
5027 GP_3_11_IN, GP_3_11_OUT,
5028 GP_3_10_IN, GP_3_10_OUT,
5029 GP_3_9_IN, GP_3_9_OUT,
5030 GP_3_8_IN, GP_3_8_OUT,
5031 GP_3_7_IN, GP_3_7_OUT,
5032 GP_3_6_IN, GP_3_6_OUT,
5033 GP_3_5_IN, GP_3_5_OUT,
5034 GP_3_4_IN, GP_3_4_OUT,
5035 GP_3_3_IN, GP_3_3_OUT,
5036 GP_3_2_IN, GP_3_2_OUT,
5037 GP_3_1_IN, GP_3_1_OUT,
5038 GP_3_0_IN, GP_3_0_OUT,
5041 { PINMUX_CFG_REG("INOUTSEL4", 0xE6054004, 32, 1) {
5057 GP_4_17_IN, GP_4_17_OUT,
5058 GP_4_16_IN, GP_4_16_OUT,
5060 GP_4_15_IN, GP_4_15_OUT,
5061 GP_4_14_IN, GP_4_14_OUT,
5062 GP_4_13_IN, GP_4_13_OUT,
5063 GP_4_12_IN, GP_4_12_OUT,
5064 GP_4_11_IN, GP_4_11_OUT,
5065 GP_4_10_IN, GP_4_10_OUT,
5066 GP_4_9_IN, GP_4_9_OUT,
5067 GP_4_8_IN, GP_4_8_OUT,
5068 GP_4_7_IN, GP_4_7_OUT,
5069 GP_4_6_IN, GP_4_6_OUT,
5070 GP_4_5_IN, GP_4_5_OUT,
5071 GP_4_4_IN, GP_4_4_OUT,
5072 GP_4_3_IN, GP_4_3_OUT,
5073 GP_4_2_IN, GP_4_2_OUT,
5074 GP_4_1_IN, GP_4_1_OUT,
5075 GP_4_0_IN, GP_4_0_OUT,
5078 { PINMUX_CFG_REG("INOUTSEL5", 0xE6055004, 32, 1) {
5085 GP_5_25_IN, GP_5_25_OUT,
5086 GP_5_24_IN, GP_5_24_OUT,
5088 GP_5_23_IN, GP_5_23_OUT,
5089 GP_5_22_IN, GP_5_22_OUT,
5090 GP_5_21_IN, GP_5_21_OUT,
5091 GP_5_20_IN, GP_5_20_OUT,
5092 GP_5_19_IN, GP_5_19_OUT,
5093 GP_5_18_IN, GP_5_18_OUT,
5094 GP_5_17_IN, GP_5_17_OUT,
5095 GP_5_16_IN, GP_5_16_OUT,
5097 GP_5_15_IN, GP_5_15_OUT,
5098 GP_5_14_IN, GP_5_14_OUT,
5099 GP_5_13_IN, GP_5_13_OUT,
5100 GP_5_12_IN, GP_5_12_OUT,
5101 GP_5_11_IN, GP_5_11_OUT,
5102 GP_5_10_IN, GP_5_10_OUT,
5103 GP_5_9_IN, GP_5_9_OUT,
5104 GP_5_8_IN, GP_5_8_OUT,
5105 GP_5_7_IN, GP_5_7_OUT,
5106 GP_5_6_IN, GP_5_6_OUT,
5107 GP_5_5_IN, GP_5_5_OUT,
5108 GP_5_4_IN, GP_5_4_OUT,
5109 GP_5_3_IN, GP_5_3_OUT,
5110 GP_5_2_IN, GP_5_2_OUT,
5111 GP_5_1_IN, GP_5_1_OUT,
5112 GP_5_0_IN, GP_5_0_OUT,
5115 { PINMUX_CFG_REG("INOUTSEL6", 0xE6055404, 32, 1) {
5119 { PINMUX_CFG_REG("INOUTSEL7", 0xE6055804, 32, 1) {
5151 GP_6_3_IN, GP_6_3_OUT,
5152 GP_6_2_IN, GP_6_2_OUT,
5153 GP_6_1_IN, GP_6_1_OUT,
5154 GP_6_0_IN, GP_6_0_OUT,
5160 static struct pinmux_data_reg pinmux_data_regs[] = {
5161 /* use OUTDT registers? */
5162 { PINMUX_DATA_REG("INDT0", 0xE6050008, 32) {
5163 0, 0, 0, 0, 0, 0, 0, 0,
5164 0, 0, 0, 0, 0, 0, 0, 0,
5165 GP_0_15_DATA, GP_0_14_DATA, GP_0_13_DATA, GP_0_12_DATA,
5166 GP_0_11_DATA, GP_0_10_DATA, GP_0_9_DATA, GP_0_8_DATA,
5167 GP_0_7_DATA, GP_0_6_DATA, GP_0_5_DATA, GP_0_4_DATA,
5168 GP_0_3_DATA, GP_0_2_DATA, GP_0_1_DATA, GP_0_0_DATA }
5170 { PINMUX_DATA_REG("INDT1", 0xE6051008, 32) {
5171 0, 0, 0, GP_1_28_DATA,
5172 GP_1_27_DATA, GP_1_26_DATA, GP_1_25_DATA, GP_1_24_DATA,
5173 GP_1_23_DATA, GP_1_22_DATA, GP_1_21_DATA, GP_1_20_DATA,
5174 GP_1_19_DATA, GP_1_18_DATA, GP_1_17_DATA, GP_1_16_DATA,
5175 GP_1_15_DATA, GP_1_14_DATA, GP_1_13_DATA, GP_1_12_DATA,
5176 GP_1_11_DATA, GP_1_10_DATA, GP_1_9_DATA, GP_1_8_DATA,
5177 GP_1_7_DATA, GP_1_6_DATA, GP_1_5_DATA, GP_1_4_DATA,
5178 GP_1_3_DATA, GP_1_2_DATA, GP_1_1_DATA, GP_1_0_DATA }
5180 { PINMUX_DATA_REG("INDT2", 0xE6052008, 32) {
5181 0, 0, 0, 0, 0, 0, 0, 0,
5182 0, 0, 0, 0, 0, 0, 0, 0,
5183 0, GP_2_14_DATA, GP_2_13_DATA, GP_2_12_DATA,
5184 GP_2_11_DATA, GP_2_10_DATA, GP_2_9_DATA, GP_2_8_DATA,
5185 GP_2_7_DATA, GP_2_6_DATA, GP_2_5_DATA, GP_2_4_DATA,
5186 GP_2_3_DATA, GP_2_2_DATA, GP_2_1_DATA, GP_2_0_DATA }
5188 { PINMUX_DATA_REG("INDT3", 0xE6053008, 32) {
5189 0, 0, 0, 0, 0, 0, 0, 0,
5190 0, 0, 0, 0, 0, 0, 0, 0,
5191 GP_3_15_DATA, GP_3_14_DATA, GP_3_13_DATA, GP_3_12_DATA,
5192 GP_3_11_DATA, GP_3_10_DATA, GP_3_9_DATA, GP_3_8_DATA,
5193 GP_3_7_DATA, GP_3_6_DATA, GP_3_5_DATA, GP_3_4_DATA,
5194 GP_3_3_DATA, GP_3_2_DATA, GP_3_1_DATA, GP_3_0_DATA }
5196 { PINMUX_DATA_REG("INDT4", 0xE6054008, 32) {
5197 0, 0, 0, 0, 0, 0, 0, 0,
5198 0, 0, 0, 0, 0, 0, GP_4_17_DATA, GP_4_16_DATA,
5199 GP_4_15_DATA, GP_4_14_DATA, GP_4_13_DATA, GP_4_12_DATA,
5200 GP_4_11_DATA, GP_4_10_DATA, GP_4_9_DATA, GP_4_8_DATA,
5201 GP_4_7_DATA, GP_4_6_DATA, GP_4_5_DATA, GP_4_4_DATA,
5202 GP_4_3_DATA, GP_4_2_DATA, GP_4_1_DATA, GP_4_0_DATA }
5204 { PINMUX_DATA_REG("INDT5", 0xE6055008, 32) {
5206 0, 0, GP_5_25_DATA, GP_5_24_DATA,
5207 GP_5_23_DATA, GP_5_22_DATA, GP_5_21_DATA, GP_5_20_DATA,
5208 GP_5_19_DATA, GP_5_18_DATA, GP_5_17_DATA, GP_5_16_DATA,
5209 GP_5_15_DATA, GP_5_14_DATA, GP_5_13_DATA, GP_5_12_DATA,
5210 GP_5_11_DATA, GP_5_10_DATA, GP_5_9_DATA, GP_5_8_DATA,
5211 GP_5_7_DATA, GP_5_6_DATA, GP_5_5_DATA, GP_5_4_DATA,
5212 GP_5_3_DATA, GP_5_2_DATA, GP_5_1_DATA, GP_5_0_DATA }
5214 { PINMUX_DATA_REG("INDT6", 0xE6055408, 32) {
5217 { PINMUX_DATA_REG("INDT7", 0xE6055808, 32) {
5218 0, 0, 0, 0, 0, 0, 0, 0,
5219 0, 0, 0, 0, 0, 0, 0, 0,
5220 0, 0, 0, 0, 0, 0, 0, 0,
5222 GP_7_3_DATA, GP_7_2_DATA, GP_7_1_DATA, GP_7_0_DATA }
5227 static struct pinmux_info r8a7796_pinmux_info = {
5228 .name = "r8a7796_pfc",
5230 .unlock_reg = 0xe6060000, /* PMMR */
5232 .reserved_id = PINMUX_RESERVED,
5233 .data = { PINMUX_DATA_BEGIN, PINMUX_DATA_END },
5234 .input = { PINMUX_INPUT_BEGIN, PINMUX_INPUT_END },
5235 .output = { PINMUX_OUTPUT_BEGIN, PINMUX_OUTPUT_END },
5236 .mark = { PINMUX_MARK_BEGIN, PINMUX_MARK_END },
5237 .function = { PINMUX_FUNCTION_BEGIN, PINMUX_FUNCTION_END },
5239 .first_gpio = GPIO_GP_0_0,
5240 .last_gpio = GPIO_FN_FMIN_D,
5242 .gpios = pinmux_gpios,
5243 .cfg_regs = pinmux_config_regs,
5244 .data_regs = pinmux_data_regs,
5246 .gpio_data = pinmux_data,
5247 .gpio_data_size = ARRAY_SIZE(pinmux_data),
5250 void r8a7796_pinmux_init(void)
5252 register_pinmux(&r8a7796_pinmux_info);