3 config SPL_LIBCOMMON_SUPPORT
6 config SPL_LIBDISK_SUPPORT
9 config SPL_LIBGENERIC_SUPPORT
12 config SPL_MMC_SUPPORT
15 config SPL_NAND_SUPPORT
16 default y if SPL_NAND_DENALI
18 config TARGET_SOCFPGA_ARRIA5
20 select TARGET_SOCFPGA_GEN5
22 config TARGET_SOCFPGA_CYCLONE5
24 select TARGET_SOCFPGA_GEN5
26 config TARGET_SOCFPGA_GEN5
30 prompt "Altera SOCFPGA board select"
33 config TARGET_SOCFPGA_ARRIA5_SOCDK
34 bool "Altera SOCFPGA SoCDK (Arria V)"
35 select TARGET_SOCFPGA_ARRIA5
37 config TARGET_SOCFPGA_CYCLONE5_SOCDK
38 bool "Altera SOCFPGA SoCDK (Cyclone V)"
39 select TARGET_SOCFPGA_CYCLONE5
41 config TARGET_SOCFPGA_DENX_MCVEVK
42 bool "DENX MCVEVK (Cyclone V)"
43 select TARGET_SOCFPGA_CYCLONE5
45 config TARGET_SOCFPGA_EBV_SOCRATES
46 bool "EBV SoCrates (Cyclone V)"
47 select TARGET_SOCFPGA_CYCLONE5
49 config TARGET_SOCFPGA_IS1
50 bool "IS1 (Cyclone V)"
51 select TARGET_SOCFPGA_CYCLONE5
53 config TARGET_SOCFPGA_SAMTEC_VINING_FPGA
54 bool "samtec VIN|ING FPGA (Cyclone V)"
55 select TARGET_SOCFPGA_CYCLONE5
57 config TARGET_SOCFPGA_SR1500
58 bool "SR1500 (Cyclone V)"
59 select TARGET_SOCFPGA_CYCLONE5
61 config TARGET_SOCFPGA_TERASIC_DE0_NANO
62 bool "Terasic DE0-Nano-Atlas (Cyclone V)"
63 select TARGET_SOCFPGA_CYCLONE5
65 config TARGET_SOCFPGA_TERASIC_SOCKIT
66 bool "Terasic SoCkit (Cyclone V)"
67 select TARGET_SOCFPGA_CYCLONE5
72 default "arria5-socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
73 default "cyclone5-socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
74 default "de0-nano-soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
75 default "is1" if TARGET_SOCFPGA_IS1
76 default "mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
77 default "sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
78 default "socrates" if TARGET_SOCFPGA_EBV_SOCRATES
79 default "sr1500" if TARGET_SOCFPGA_SR1500
80 default "vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
83 default "altera" if TARGET_SOCFPGA_ARRIA5_SOCDK
84 default "altera" if TARGET_SOCFPGA_CYCLONE5_SOCDK
85 default "denx" if TARGET_SOCFPGA_DENX_MCVEVK
86 default "ebv" if TARGET_SOCFPGA_EBV_SOCRATES
87 default "samtec" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA
88 default "terasic" if TARGET_SOCFPGA_TERASIC_DE0_NANO
89 default "terasic" if TARGET_SOCFPGA_TERASIC_SOCKIT
94 config SYS_CONFIG_NAME
95 default "socfpga_arria5_socdk" if TARGET_SOCFPGA_ARRIA5_SOCDK
96 default "socfpga_cyclone5_socdk" if TARGET_SOCFPGA_CYCLONE5_SOCDK
97 default "socfpga_de0_nano_soc" if TARGET_SOCFPGA_TERASIC_DE0_NANO
98 default "socfpga_is1" if TARGET_SOCFPGA_IS1
99 default "socfpga_mcvevk" if TARGET_SOCFPGA_DENX_MCVEVK
100 default "socfpga_sockit" if TARGET_SOCFPGA_TERASIC_SOCKIT
101 default "socfpga_socrates" if TARGET_SOCFPGA_EBV_SOCRATES
102 default "socfpga_sr1500" if TARGET_SOCFPGA_SR1500
103 default "socfpga_vining_fpga" if TARGET_SOCFPGA_SAMTEC_VINING_FPGA