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   1 /* SPDX-License-Identifier: BSD-3-Clause */
   2 /*
   3  * Copyright (C) 2012-2017 Altera Corporation <www.altera.com>
   4  * All rights reserved.
   5  */
   6
   7 #ifndef _FPGA_MANAGER_H_
   8 #define _FPGA_MANAGER_H_
   9
  10 #include <altera.h>
  11
  12 #if defined(CONFIG_TARGET_SOCFPGA_GEN5)
  13 #include <asm/arch/fpga_manager_gen5.h>
  14 #elif defined(CONFIG_TARGET_SOCFPGA_ARRIA10)
  15 #include <asm/arch/fpga_manager_arria10.h>
  16 #endif
  17
  18 /* FPGA CD Ratio Value */
  19 #define CDRATIO_x1                              0x0
  20 #define CDRATIO_x2                              0x1
  21 #define CDRATIO_x4                              0x2
  22 #define CDRATIO_x8                              0x3
  23
  24 #ifndef __ASSEMBLY__
  25
  26 /* Common prototypes */
  27 int fpgamgr_get_mode(void);
  28 int fpgamgr_poll_fpga_ready(void);
  29 void fpgamgr_program_write(const void *rbf_data, size_t rbf_size);
  30 int fpgamgr_test_fpga_ready(void);
  31 int fpgamgr_dclkcnt_set(unsigned long cnt);
  32
  33 #endif /* __ASSEMBLY__ */
  34 #endif /* _FPGA_MANAGER_H_ */