2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/freeze_controller.h>
10 #include <asm/arch/scan_manager.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 static const struct socfpga_scan_manager *scan_manager_base =
15 (void *)(SOCFPGA_SCANMGR_ADDRESS);
16 static const struct socfpga_freeze_controller *freeze_controller_base =
17 (void *)(SOCFPGA_SYSMGR_ADDRESS + SYSMGR_FRZCTRL_ADDRESS);
20 * Function to check IO scan chain engine status and wait if the engine is
21 * is active. Poll the IO scan chain engine till maximum iteration reached.
23 static inline uint32_t scan_chain_engine_is_idle(uint32_t max_iter)
25 uint32_t scanmgr_status;
27 scanmgr_status = readl(&scan_manager_base->stat);
29 /* Poll the engine until the scan engine is inactive */
30 while (SCANMGR_STAT_ACTIVE_GET(scanmgr_status) ||
31 (SCANMGR_STAT_WFIFOCNT_GET(scanmgr_status) > 0)) {
34 scanmgr_status = readl(&scan_manager_base->stat);
42 * scan_mgr_io_scan_chain_prg() - Program HPS IO Scan Chain
43 * @io_scan_chain_id: IO scan chain ID
45 static int scan_mgr_io_scan_chain_prg(const unsigned int io_scan_chain_id)
47 uint16_t tdi_tdo_header;
48 uint32_t io_program_iter;
49 uint32_t io_scan_chain_data_residual;
53 uint32_t io_scan_chain_len_in_bits,
54 const uint32_t *iocsr_scan_chain;
56 switch (io_scan_chain_id) {
58 io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN0_LENGTH;
59 iocsr_scan_chain = iocsr_scan_chain0_table;
62 io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN1_LENGTH;
63 iocsr_scan_chain = iocsr_scan_chain1_table;
66 io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN2_LENGTH;
67 iocsr_scan_chain = iocsr_scan_chain2_table;
70 io_scan_chain_len_in_bits = CONFIG_HPS_IOCSR_SCANCHAIN3_LENGTH;
71 iocsr_scan_chain = iocsr_scan_chain3_table;
76 * De-assert reinit if the IO scan chain is intended for HIO. In
77 * this, its the chain 3.
79 if (io_scan_chain_id == 3)
80 clrbits_le32(&freeze_controller_base->hioctrl,
81 SYSMGR_FRZCTRL_HIOCTRL_DLLRST_MASK);
84 * Check if the scan chain engine is inactive and the
85 * WFIFO is empty before enabling the IO scan chain
87 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
91 * Enable IO Scan chain based on scan chain id
92 * Note: only one chain can be enabled at a time
94 setbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
97 * Calculate number of iteration needed for full 128-bit (4 x32-bits)
98 * bits shifting. Each TDI_TDO packet can shift in maximum 128-bits
100 io_program_iter = io_scan_chain_len_in_bits >>
101 IO_SCAN_CHAIN_128BIT_SHIFT;
102 io_scan_chain_data_residual = io_scan_chain_len_in_bits &
103 IO_SCAN_CHAIN_128BIT_MASK;
105 /* Construct TDI_TDO packet for 128-bit IO scan chain (2 bytes) */
106 tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
107 (TDI_TDO_MAX_PAYLOAD << TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
109 /* Program IO scan chain in 128-bit iteration */
110 for (i = 0; i < io_program_iter; i++) {
111 /* write TDI_TDO packet header to scan manager */
112 writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
114 /* calculate array index. Multiply by 4 as write 4 x 32bits */
117 /* write 4 successive 32-bit IO scan chain data into WFIFO */
118 writel(iocsr_scan_chain[index],
119 &scan_manager_base->fifo_quad_byte);
120 writel(iocsr_scan_chain[index + 1],
121 &scan_manager_base->fifo_quad_byte);
122 writel(iocsr_scan_chain[index + 2],
123 &scan_manager_base->fifo_quad_byte);
124 writel(iocsr_scan_chain[index + 3],
125 &scan_manager_base->fifo_quad_byte);
128 * Check if the scan chain engine has completed the
129 * IO scan chain data shifting
131 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
135 /* Calculate array index for final TDI_TDO packet */
136 index = io_program_iter * 4;
138 /* Final TDI_TDO packet if any */
139 if (io_scan_chain_data_residual) {
141 * Calculate number of quad bytes FIFO write
142 * needed for the final TDI_TDO packet
144 io_program_iter = io_scan_chain_data_residual >>
145 IO_SCAN_CHAIN_32BIT_SHIFT;
148 * Construct TDI_TDO packet for remaining IO
149 * scan chain (2 bytes)
151 tdi_tdo_header = TDI_TDO_HEADER_FIRST_BYTE |
152 ((io_scan_chain_data_residual - 1) <<
153 TDI_TDO_HEADER_SECOND_BYTE_SHIFT);
156 * Program the last part of IO scan chain write TDI_TDO packet
157 * header (2 bytes) to scan manager
159 writel(tdi_tdo_header, &scan_manager_base->fifo_double_byte);
161 for (i = 0; i < io_program_iter; i++) {
163 * write remaining scan chain data into scan
164 * manager WFIFO with 4 bytes write
166 writel(iocsr_scan_chain[index + i],
167 &scan_manager_base->fifo_quad_byte);
170 index += io_program_iter;
171 residual = io_scan_chain_data_residual &
172 IO_SCAN_CHAIN_32BIT_MASK;
174 if (IO_SCAN_CHAIN_PAYLOAD_24BIT < residual) {
176 * write the last 4B scan chain data
177 * into scan manager WFIFO
179 writel(iocsr_scan_chain[index],
180 &scan_manager_base->fifo_quad_byte);
183 * write the remaining 1 - 3 bytes scan chain
184 * data into scan manager WFIFO byte by byte
185 * to prevent JTAG engine shifting unused data
186 * from the FIFO and mistaken the data as a
187 * valid command (even though unused bits are
188 * set to 0, but just to prevent hardware
191 for (i = 0; i < residual; i += 8) {
192 writel(((iocsr_scan_chain[index] >> i)
193 & IO_SCAN_CHAIN_BYTE_MASK),
194 &scan_manager_base->fifo_single_byte);
199 * Check if the scan chain engine has completed the
200 * IO scan chain data shifting
202 if (!scan_chain_engine_is_idle(SCAN_MAX_DELAY))
206 /* Disable IO Scan chain when configuration done*/
207 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
211 /* Disable IO Scan chain when error detected */
212 clrbits_le32(&scan_manager_base->en, 1 << io_scan_chain_id);
216 int scan_mgr_configure_iocsr(void)
220 /* configure the IOCSR through scan chain */
221 status |= scan_mgr_io_scan_chain_prg(0);
222 status |= scan_mgr_io_scan_chain_prg(1);
223 status |= scan_mgr_io_scan_chain_prg(2);
224 status |= scan_mgr_io_scan_chain_prg(3);