2 * Copyright (C) 2013 Altera Corporation <www.altera.com>
4 * SPDX-License-Identifier: GPL-2.0+
9 #include <asm/arch/system_manager.h>
10 #include <asm/arch/fpga_manager.h>
12 DECLARE_GLOBAL_DATA_PTR;
14 static struct socfpga_system_manager *sysmgr_regs =
15 (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
18 * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
19 * The value is not wrote to SYSMGR.FPGAINTF.MODULE but
20 * CONFIG_SYSMGR_ISWGRP_HANDOFF.
22 static void populate_sysmgr_fpgaintf_module(void)
24 uint32_t handoff_val = 0;
26 /* ISWGRP_HANDOFF_FPGAINTF */
27 writel(0, &sysmgr_regs->iswgrp_handoff[2]);
29 /* Enable the signal for those HPS peripherals that use FPGA. */
30 if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)
31 handoff_val |= SYSMGR_FPGAINTF_NAND;
32 if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
33 handoff_val |= SYSMGR_FPGAINTF_EMAC1;
34 if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)
35 handoff_val |= SYSMGR_FPGAINTF_SDMMC;
36 if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
37 handoff_val |= SYSMGR_FPGAINTF_EMAC0;
38 if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
39 handoff_val |= SYSMGR_FPGAINTF_SPIM0;
40 if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
41 handoff_val |= SYSMGR_FPGAINTF_SPIM1;
43 /* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
44 based on pinmux setting */
45 setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val);
47 handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]);
48 if (fpgamgr_test_fpga_ready()) {
49 /* Enable the required signals only */
50 writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module);
55 * Configure all the pin muxes
57 void sysmgr_pinmux_init(void)
59 uint32_t regs = (uint32_t)&sysmgr_regs->emacio[0];
62 for (i = 0; i < ARRAY_SIZE(sys_mgr_init_table); i++) {
63 writel(sys_mgr_init_table[i], regs);
67 populate_sysmgr_fpgaintf_module();
71 * This bit allows the bootrom to configure the IOs after a warm reset.
73 void sysmgr_enable_warmrstcfgio(void)
75 setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
76 SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);