1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013-2017 Altera Corporation <www.altera.com>
8 #include <asm/arch/system_manager.h>
9 #include <asm/arch/fpga_manager.h>
11 static struct socfpga_system_manager *sysmgr_regs =
12 (struct socfpga_system_manager *)SOCFPGA_SYSMGR_ADDRESS;
15 * Populate the value for SYSMGR.FPGAINTF.MODULE based on pinmux setting.
16 * The value is not wrote to SYSMGR.FPGAINTF.MODULE but
17 * CONFIG_SYSMGR_ISWGRP_HANDOFF.
19 static void populate_sysmgr_fpgaintf_module(void)
23 /* ISWGRP_HANDOFF_FPGAINTF */
24 writel(0, &sysmgr_regs->iswgrp_handoff[2]);
26 /* Enable the signal for those HPS peripherals that use FPGA. */
27 if (readl(&sysmgr_regs->nandusefpga) == SYSMGR_FPGAINTF_USEFPGA)
28 handoff_val |= SYSMGR_FPGAINTF_NAND;
29 if (readl(&sysmgr_regs->rgmii1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
30 handoff_val |= SYSMGR_FPGAINTF_EMAC1;
31 if (readl(&sysmgr_regs->sdmmcusefpga) == SYSMGR_FPGAINTF_USEFPGA)
32 handoff_val |= SYSMGR_FPGAINTF_SDMMC;
33 if (readl(&sysmgr_regs->rgmii0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
34 handoff_val |= SYSMGR_FPGAINTF_EMAC0;
35 if (readl(&sysmgr_regs->spim0usefpga) == SYSMGR_FPGAINTF_USEFPGA)
36 handoff_val |= SYSMGR_FPGAINTF_SPIM0;
37 if (readl(&sysmgr_regs->spim1usefpga) == SYSMGR_FPGAINTF_USEFPGA)
38 handoff_val |= SYSMGR_FPGAINTF_SPIM1;
40 /* populate (not writing) the value for SYSMGR.FPGAINTF.MODULE
41 based on pinmux setting */
42 setbits_le32(&sysmgr_regs->iswgrp_handoff[2], handoff_val);
44 handoff_val = readl(&sysmgr_regs->iswgrp_handoff[2]);
45 if (fpgamgr_test_fpga_ready()) {
46 /* Enable the required signals only */
47 writel(handoff_val, &sysmgr_regs->fpgaintfgrp_module);
52 * Configure all the pin muxes
54 void sysmgr_pinmux_init(void)
56 u32 regs = (u32)&sysmgr_regs->emacio[0];
57 const u8 *sys_mgr_init_table;
61 sysmgr_get_pinmux_table(&sys_mgr_init_table, &len);
63 for (i = 0; i < len; i++) {
64 writel(sys_mgr_init_table[i], regs);
68 populate_sysmgr_fpgaintf_module();
72 * This bit allows the bootrom to configure the IOs after a warm reset.
74 void sysmgr_config_warmrstcfgio(int enable)
77 setbits_le32(&sysmgr_regs->romcodegrp_ctrl,
78 SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);
80 clrbits_le32(&sysmgr_regs->romcodegrp_ctrl,
81 SYSMGR_ROMCODEGRP_CTRL_WARMRSTCFGIO);