3 * Kamil Lulko, <kamil.lulko@gmail.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/armv7m.h>
11 #include <asm/arch/stm32.h>
13 DECLARE_GLOBAL_DATA_PTR;
15 #define STM32_TIM2_BASE (STM32_APB1PERIPH_BASE + 0x0000)
17 #define RCC_APB1ENR_TIM2EN (1 << 0)
43 #define TIM_CR1_CEN (1 << 0)
45 #define TIM_EGR_UG (1 << 0)
49 struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
51 setbits_le32(&STM32_RCC->apb1enr, RCC_APB1ENR_TIM2EN);
53 if (clock_get(CLOCK_AHB) == clock_get(CLOCK_APB1))
54 writel((clock_get(CLOCK_APB1) / CONFIG_SYS_HZ_CLOCK) - 1,
57 writel(((clock_get(CLOCK_APB1) * 2) / CONFIG_SYS_HZ_CLOCK) - 1,
60 writel(0xFFFFFFFF, &tim->arr);
61 writel(TIM_CR1_CEN, &tim->cr1);
62 setbits_le32(&tim->egr, TIM_EGR_UG);
71 ulong get_timer(ulong base)
73 return (get_ticks() / (CONFIG_SYS_HZ_CLOCK / CONFIG_SYS_HZ)) - base;
76 unsigned long long get_ticks(void)
78 struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
81 now = readl(&tim->cnt);
83 if (now >= gd->arch.lastinc)
84 gd->arch.tbl += (now - gd->arch.lastinc);
86 gd->arch.tbl += (0xFFFFFFFF - gd->arch.lastinc) + now;
88 gd->arch.lastinc = now;
93 void reset_timer(void)
95 struct stm32_tim2_5 *tim = (struct stm32_tim2_5 *)STM32_TIM2_BASE;
97 gd->arch.lastinc = readl(&tim->cnt);
101 /* delay x useconds */
102 void __udelay(ulong usec)
104 unsigned long long start;
106 start = get_ticks(); /* get current timestamp */
107 while ((get_ticks() - start) < usec)
108 ; /* loop till time has passed */
112 * This function is derived from PowerPC code (timebase clock frequency).
113 * On ARM it returns the number of timer ticks per second.
115 ulong get_tbclk(void)
117 return CONFIG_SYS_HZ_CLOCK;