2 * On-chip UART initializaion for low-level debugging
4 * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 #include <linux/serial_reg.h>
10 #include <linux/linkage.h>
12 #include "../bcu/bcu-regs.h"
13 #include "../sc-regs.h"
14 #include "../sg-regs.h"
16 #if !defined(CONFIG_DEBUG_SEMIHOSTING)
17 #include CONFIG_DEBUG_LL_INCLUDE
20 #define BAUDRATE 115200
21 #define DIV_ROUND(x, d) (((x) + ((d) / 2)) / (d))
26 and r1, r1, #SG_REVISION_TYPE_MASK
27 mov r1, r1, lsr #SG_REVISION_TYPE_SHIFT
29 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
30 #define UNIPHIER_SLD3_UART_CLK 36864000
34 sg_set_pinsel 64, 1, 4, 4, r0, r1 @ TXD0 -> TXD0
42 orr r1, r1, #SC_CLKCTRL_CEN_PERI
45 ldr r3, =DIV_ROUND(UNIPHIER_SLD3_UART_CLK, 16 * BAUDRATE)
50 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
51 #define UNIPHIER_LD4_UART_CLK 36864000
60 sg_set_pinsel 88, 1, 8, 4, r0, r1 @ HSDOUT6 -> TXD0
62 ldr r3, =DIV_ROUND(UNIPHIER_LD4_UART_CLK, 16 * BAUDRATE)
67 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
68 #define UNIPHIER_PRO4_UART_CLK 73728000
72 sg_set_pinsel 128, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
74 ldr r0, =SG_LOADPINCTRL
80 orr r1, r1, #SC_CLKCTRL_CEN_PERI
83 ldr r3, =DIV_ROUND(UNIPHIER_PRO4_UART_CLK, 16 * BAUDRATE)
88 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
89 #define UNIPHIER_SLD8_UART_CLK 80000000
98 sg_set_pinsel 70, 3, 8, 4, r0, r1 @ HSDOUT0 -> TXD0
100 ldr r3, =DIV_ROUND(UNIPHIER_SLD8_UART_CLK, 16 * BAUDRATE)
105 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
106 #define UNIPHIER_PRO5_UART_CLK 73728000
110 sg_set_pinsel 47, 0, 4, 8, r0, r1 @ TXD0 -> TXD0
111 sg_set_pinsel 49, 0, 4, 8, r0, r1 @ TXD1 -> TXD1
112 sg_set_pinsel 51, 0, 4, 8, r0, r1 @ TXD2 -> TXD2
113 sg_set_pinsel 53, 0, 4, 8, r0, r1 @ TXD3 -> TXD3
115 ldr r0, =SG_LOADPINCTRL
121 orr r1, r1, #SC_CLKCTRL_CEN_PERI
124 ldr r3, =DIV_ROUND(UNIPHIER_PRO5_UART_CLK, 16 * BAUDRATE)
129 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
130 #define UNIPHIER_PXS2_UART_CLK 88900000
139 sg_set_pinsel 217, 8, 8, 4, r0, r1 @ TXD0 -> TXD0
140 sg_set_pinsel 115, 8, 8, 4, r0, r1 @ TXD1 -> TXD1
141 sg_set_pinsel 113, 8, 8, 4, r0, r1 @ TXD2 -> TXD2
142 sg_set_pinsel 219, 8, 8, 4, r0, r1 @ TXD3 -> TXD3
146 orr r1, r1, #SC_CLKCTRL_CEN_PERI
149 ldr r3, =DIV_ROUND(UNIPHIER_PXS2_UART_CLK, 16 * BAUDRATE)
154 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
155 #define UNIPHIER_LD6B_UART_CLK 88900000
164 sg_set_pinsel 135, 3, 8, 4, r0, r1 @ PORT10 -> TXD0
165 sg_set_pinsel 115, 0, 8, 4, r0, r1 @ TXD1 -> TXD1
166 sg_set_pinsel 113, 2, 8, 4, r0, r1 @ SBO0 -> TXD2
170 orr r1, r1, #SC_CLKCTRL_CEN_PERI
173 ldr r3, =DIV_ROUND(UNIPHIER_LD6B_UART_CLK, 16 * BAUDRATE)
182 mov r1, #UART_LCR_WLEN8 << 8
187 ENDPROC(debug_ll_init)