2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
14 #include "micro-support-card.h"
18 DECLARE_GLOBAL_DATA_PTR;
20 static void uniphier_setup_xirq(void)
22 const void *fdt = gd->fdt_blob;
23 int soc_node, aidet_node;
25 unsigned long aidet_base;
28 soc_node = fdt_path_offset(fdt, "/soc");
32 aidet_node = fdt_subnode_offset_namelen(fdt, soc_node, "aidet", 5);
36 val = fdt_getprop(fdt, aidet_node, "reg", NULL);
40 aidet_base = fdt32_to_cpu(*val);
42 tmp = readl(aidet_base + 8); /* AIDET DETCONFR2 */
43 tmp |= 0x00ff0000; /* Set XIRQ0-7 low active */
44 writel(tmp, aidet_base + 8);
46 tmp = readl(0x55000090); /* IRQCTL */
48 writel(tmp, 0x55000090);
51 #ifdef CONFIG_ARCH_UNIPHIER_LD11
52 static void uniphier_ld11_misc_init(void)
54 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
56 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
61 #ifdef CONFIG_ARCH_UNIPHIER_LD20
62 static void uniphier_ld20_misc_init(void)
64 sg_set_pinsel(149, 14, 8, 4); /* XIRQ0 -> XIRQ0 */
66 sg_set_pinsel(153, 14, 8, 4); /* XIRQ4 -> XIRQ4 */
69 /* ES1 errata: increase VDD09 supply to suppress VBO noise */
70 if (uniphier_get_soc_revision() == 1) {
71 writel(0x00000003, 0x6184e004);
72 writel(0x00000100, 0x6184e040);
73 writel(0x0000b500, 0x6184e024);
74 writel(0x00000001, 0x6184e000);
79 struct uniphier_initdata {
81 void (*sbc_init)(void);
82 void (*pll_init)(void);
83 void (*clk_init)(void);
84 void (*misc_init)(void);
87 static const struct uniphier_initdata uniphier_initdata[] = {
88 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
90 .soc_id = UNIPHIER_LD4_ID,
91 .sbc_init = uniphier_ld4_sbc_init,
92 .pll_init = uniphier_ld4_pll_init,
93 .clk_init = uniphier_ld4_clk_init,
96 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
98 .soc_id = UNIPHIER_PRO4_ID,
99 .sbc_init = uniphier_sbc_init_savepin,
100 .pll_init = uniphier_pro4_pll_init,
101 .clk_init = uniphier_pro4_clk_init,
104 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
106 .soc_id = UNIPHIER_SLD8_ID,
107 .sbc_init = uniphier_ld4_sbc_init,
108 .pll_init = uniphier_ld4_pll_init,
109 .clk_init = uniphier_ld4_clk_init,
112 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
114 .soc_id = UNIPHIER_PRO5_ID,
115 .sbc_init = uniphier_sbc_init_savepin,
116 .clk_init = uniphier_pro5_clk_init,
119 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
121 .soc_id = UNIPHIER_PXS2_ID,
122 .sbc_init = uniphier_pxs2_sbc_init,
123 .clk_init = uniphier_pxs2_clk_init,
126 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
128 .soc_id = UNIPHIER_LD6B_ID,
129 .sbc_init = uniphier_pxs2_sbc_init,
130 .clk_init = uniphier_pxs2_clk_init,
133 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
135 .soc_id = UNIPHIER_LD11_ID,
136 .sbc_init = uniphier_ld11_sbc_init,
137 .pll_init = uniphier_ld11_pll_init,
138 .clk_init = uniphier_ld11_clk_init,
139 .misc_init = uniphier_ld11_misc_init,
142 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
144 .soc_id = UNIPHIER_LD20_ID,
145 .sbc_init = uniphier_ld11_sbc_init,
146 .pll_init = uniphier_ld20_pll_init,
147 .clk_init = uniphier_ld20_clk_init,
148 .misc_init = uniphier_ld20_misc_init,
151 #if defined(CONFIG_ARCH_UNIPHIER_PXS3)
153 .soc_id = UNIPHIER_PXS3_ID,
154 .sbc_init = uniphier_pxs2_sbc_init,
155 .pll_init = uniphier_pxs3_pll_init,
156 .clk_init = uniphier_pxs3_clk_init,
160 UNIPHIER_DEFINE_SOCDATA_FUNC(uniphier_get_initdata, uniphier_initdata)
164 const struct uniphier_initdata *initdata;
168 initdata = uniphier_get_initdata();
170 pr_err("unsupported SoC\n");
174 initdata->sbc_init();
180 if (initdata->pll_init)
181 initdata->pll_init();
185 if (initdata->clk_init)
186 initdata->clk_init();
190 if (initdata->misc_init)
191 initdata->misc_init();
195 uniphier_setup_xirq();
199 support_card_late_init();