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ARM: uniphier: fix DRAM size of LD21 SoC package
[u-boot] / arch / arm / mach-uniphier / boards.c
1 /*
2  * Copyright (C) 2015-2016 Socionext Inc.
3  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #include <common.h>
9 #include <libfdt.h>
10 #include <linux/kernel.h>
11
12 #include "init.h"
13
14 DECLARE_GLOBAL_DATA_PTR;
15
16 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
17 static const struct uniphier_board_data uniphier_sld3_data = {
18         .dram_freq = 1600,
19         .dram_nr_ch = 3,
20         .dram_ch[0] = {
21                 .base = 0x80000000,
22                 .size = 0x20000000,
23                 .width = 32,
24         },
25         .dram_ch[1] = {
26                 .base = 0xc0000000,
27                 .size = 0x20000000,
28                 .width = 16,
29         },
30         .dram_ch[2] = {
31                 .base = 0xc0000000,
32                 .size = 0x10000000,
33                 .width = 16,
34         },
35 };
36 #endif
37
38 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
39 static const struct uniphier_board_data uniphier_ld4_data = {
40         .dram_freq = 1600,
41         .dram_nr_ch = 2,
42         .dram_ch[0] = {
43                 .base = 0x80000000,
44                 .size = 0x10000000,
45                 .width = 16,
46         },
47         .dram_ch[1] = {
48                 .base = 0x90000000,
49                 .size = 0x10000000,
50                 .width = 16,
51         },
52         .flags = UNIPHIER_BD_DDR3PLUS,
53 };
54 #endif
55
56 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
57 /* 1GB RAM board */
58 static const struct uniphier_board_data uniphier_pro4_data = {
59         .dram_freq = 1600,
60         .dram_nr_ch = 2,
61         .dram_ch[0] = {
62                 .base = 0x80000000,
63                 .size = 0x20000000,
64                 .width = 32,
65         },
66         .dram_ch[1] = {
67                 .base = 0xa0000000,
68                 .size = 0x20000000,
69                 .width = 32,
70         },
71 };
72
73 /* 2GB RAM board */
74 static const struct uniphier_board_data uniphier_pro4_2g_data = {
75         .dram_freq = 1600,
76         .dram_nr_ch = 2,
77         .dram_ch[0] = {
78                 .base = 0x80000000,
79                 .size = 0x40000000,
80                 .width = 32,
81         },
82         .dram_ch[1] = {
83                 .base = 0xc0000000,
84                 .size = 0x40000000,
85                 .width = 32,
86         },
87 };
88 #endif
89
90 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
91 static const struct uniphier_board_data uniphier_sld8_data = {
92         .dram_freq = 1333,
93         .dram_nr_ch = 2,
94         .dram_ch[0] = {
95                 .base = 0x80000000,
96                 .size = 0x10000000,
97                 .width = 16,
98         },
99         .dram_ch[1] = {
100                 .base = 0x90000000,
101                 .size = 0x10000000,
102                 .width = 16,
103         },
104         .flags = UNIPHIER_BD_DDR3PLUS,
105 };
106 #endif
107
108 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
109 static const struct uniphier_board_data uniphier_pro5_data = {
110         .dram_freq = 1866,
111         .dram_nr_ch = 2,
112         .dram_ch[0] = {
113                 .base = 0x80000000,
114                 .size = 0x20000000,
115                 .width = 32,
116         },
117         .dram_ch[1] = {
118                 .base = 0xa0000000,
119                 .size = 0x20000000,
120                 .width = 32,
121         },
122 };
123 #endif
124
125 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
126 static const struct uniphier_board_data uniphier_pxs2_data = {
127         .dram_freq = 2133,
128         .dram_nr_ch = 3,
129         .dram_ch[0] = {
130                 .base = 0x80000000,
131                 .size = 0x40000000,
132                 .width = 32,
133         },
134         .dram_ch[1] = {
135                 .base = 0xc0000000,
136                 .size = 0x20000000,
137                 .width = 32,
138         },
139         .dram_ch[2] = {
140                 .base = 0xe0000000,
141                 .size = 0x20000000,
142                 .width = 16,
143         },
144 };
145 #endif
146
147 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
148 static const struct uniphier_board_data uniphier_ld6b_data = {
149         .dram_freq = 1866,
150         .dram_nr_ch = 3,
151         .dram_ch[0] = {
152                 .base = 0x80000000,
153                 .size = 0x40000000,
154                 .width = 32,
155         },
156         .dram_ch[1] = {
157                 .base = 0xc0000000,
158                 .size = 0x20000000,
159                 .width = 32,
160         },
161         .dram_ch[2] = {
162                 .base = 0xe0000000,
163                 .size = 0x20000000,
164                 .width = 16,
165         },
166 };
167 #endif
168
169 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
170 static const struct uniphier_board_data uniphier_ld11_data = {
171         .dram_freq = 1600,
172         .dram_nr_ch = 2,
173         .dram_ch[0] = {
174                 .base = 0x80000000,
175                 .size = 0x20000000,
176                 .width = 16,
177         },
178         .dram_ch[1] = {
179                 .base = 0xa0000000,
180                 .size = 0x20000000,
181                 .width = 16,
182         },
183 };
184 #endif
185
186 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
187 static const struct uniphier_board_data uniphier_ld20_data = {
188         .dram_freq = 1866,
189         .dram_nr_ch = 3,
190         .dram_ch[0] = {
191                 .base = 0x80000000,
192                 .size = 0x40000000,
193                 .width = 32,
194         },
195         .dram_ch[1] = {
196                 .base = 0xc0000000,
197                 .size = 0x40000000,
198                 .width = 32,
199         },
200         .dram_ch[2] = {
201                 .base = 0x100000000UL,
202                 .size = 0x40000000,
203                 .width = 32,
204         },
205 };
206
207 static const struct uniphier_board_data uniphier_ld21_data = {
208         .dram_freq = 1866,
209         .dram_nr_ch = 2,
210         .dram_ch[0] = {
211                 .base = 0x80000000,
212                 .size = 0x20000000,
213                 .width = 32,
214         },
215         .dram_ch[1] = {
216                 .base = 0xc0000000,
217                 .size = 0x40000000,
218                 .width = 32,
219         },
220         .flags = UNIPHIER_BD_PACKAGE_LD21,
221 };
222 #endif
223
224 struct uniphier_board_id {
225         const char *compatible;
226         const struct uniphier_board_data *param;
227 };
228
229 static const struct uniphier_board_id uniphier_boards[] = {
230 #if defined(CONFIG_ARCH_UNIPHIER_SLD3)
231         { "socionext,ph1-sld3", &uniphier_sld3_data, },
232 #endif
233 #if defined(CONFIG_ARCH_UNIPHIER_LD4)
234         { "socionext,ph1-ld4", &uniphier_ld4_data, },
235 #endif
236 #if defined(CONFIG_ARCH_UNIPHIER_PRO4)
237         { "socionext,ph1-pro4-ace", &uniphier_pro4_2g_data, },
238         { "socionext,ph1-pro4-sanji", &uniphier_pro4_2g_data, },
239         { "socionext,ph1-pro4", &uniphier_pro4_data, },
240 #endif
241 #if defined(CONFIG_ARCH_UNIPHIER_SLD8)
242         { "socionext,ph1-sld8", &uniphier_sld8_data, },
243 #endif
244 #if defined(CONFIG_ARCH_UNIPHIER_PRO5)
245         { "socionext,ph1-pro5", &uniphier_pro5_data, },
246 #endif
247 #if defined(CONFIG_ARCH_UNIPHIER_PXS2)
248         { "socionext,proxstream2", &uniphier_pxs2_data, },
249 #endif
250 #if defined(CONFIG_ARCH_UNIPHIER_LD6B)
251         { "socionext,ph1-ld6b", &uniphier_ld6b_data, },
252 #endif
253 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
254         { "socionext,ph1-ld11", &uniphier_ld11_data, },
255 #endif
256 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
257         { "socionext,ph1-ld21", &uniphier_ld21_data, },
258         { "socionext,ph1-ld20", &uniphier_ld20_data, },
259 #endif
260 };
261
262 const struct uniphier_board_data *uniphier_get_board_param(void)
263 {
264         int i;
265
266         for (i = 0; i < ARRAY_SIZE(uniphier_boards); i++) {
267                 if (!fdt_node_check_compatible(gd->fdt_blob, 0,
268                                                uniphier_boards[i].compatible))
269                         return uniphier_boards[i].param;
270         }
271
272         return NULL;
273 }