git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/clk/clk-ph1-pro4.c

   1 /*
   2  * Copyright (C) 2011-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/io.h>
   8 #include <mach/init.h>
   9 #include <mach/sc-regs.h>
  10
  11 void ph1_pro4_clk_init(void)
  12 {
  13         u32 tmp;
  14
  15         /* deassert reset */
  16         tmp = readl(SC_RSTCTRL);
  17 #ifdef CONFIG_USB_XHCI_UNIPHIER
  18         tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_USB3C0 |
  19                 SC_RSTCTRL_NRST_GIO;
  20 #endif
  21 #ifdef CONFIG_UNIPHIER_ETH
  22         tmp |= SC_RSTCTRL_NRST_ETHER;
  23 #endif
  24 #ifdef CONFIG_USB_EHCI_UNIPHIER
  25         tmp |= SC_RSTCTRL_NRST_STDMAC;
  26 #endif
  27 #ifdef CONFIG_NAND_DENALI
  28         tmp |= SC_RSTCTRL_NRST_NAND;
  29 #endif
  30         writel(tmp, SC_RSTCTRL);
  31         readl(SC_RSTCTRL); /* dummy read */
  32
  33 #ifdef CONFIG_USB_XHCI_UNIPHIER
  34         tmp = readl(SC_RSTCTRL2);
  35         tmp |= SC_RSTCTRL2_NRST_USB3B1 | SC_RSTCTRL2_NRST_USB3C1;
  36         writel(tmp, SC_RSTCTRL2);
  37         readl(SC_RSTCTRL2); /* dummy read */
  38 #endif
  39
  40         /* privide clocks */
  41         tmp = readl(SC_CLKCTRL);
  42 #ifdef CONFIG_USB_XHCI_UNIPHIER
  43         tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
  44                 SC_CLKCTRL_CEN_GIO;
  45 #endif
  46 #ifdef CONFIG_UNIPHIER_ETH
  47         tmp |= SC_CLKCTRL_CEN_ETHER;
  48 #endif
  49 #ifdef CONFIG_USB_EHCI_UNIPHIER
  50         tmp |= SC_CLKCTRL_CEN_MIO | SC_CLKCTRL_CEN_STDMAC;
  51 #endif
  52 #ifdef CONFIG_NAND_DENALI
  53         tmp |= SC_CLKCTRL_CEN_NAND;
  54 #endif
  55         writel(tmp, SC_CLKCTRL);
  56         readl(SC_CLKCTRL); /* dummy read */
  57 }