git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/clk/clk-pro5.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/io.h>
   8
   9 #include "../init.h"
  10 #include "../sc-regs.h"
  11
  12 void ph1_pro5_clk_init(void)
  13 {
  14         u32 tmp;
  15
  16         /* deassert reset */
  17         tmp = readl(SC_RSTCTRL);
  18 #ifdef CONFIG_USB_XHCI_UNIPHIER
  19         tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
  20 #endif
  21 #ifdef CONFIG_NAND_DENALI
  22         tmp |= SC_RSTCTRL_NRST_NAND;
  23 #endif
  24         writel(tmp, SC_RSTCTRL);
  25         readl(SC_RSTCTRL); /* dummy read */
  26
  27 #ifdef CONFIG_USB_XHCI_UNIPHIER
  28         tmp = readl(SC_RSTCTRL2);
  29         tmp |= SC_RSTCTRL2_NRST_USB3B1;
  30         writel(tmp, SC_RSTCTRL2);
  31         readl(SC_RSTCTRL2); /* dummy read */
  32 #endif
  33
  34         /* privide clocks */
  35         tmp = readl(SC_CLKCTRL);
  36 #ifdef CONFIG_USB_XHCI_UNIPHIER
  37         tmp |= SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
  38                 SC_CLKCTRL_CEN_GIO;
  39 #endif
  40 #ifdef CONFIG_NAND_DENALI
  41         tmp |= SC_CLKCTRL_CEN_NAND;
  42 #endif
  43         writel(tmp, SC_CLKCTRL);
  44         readl(SC_CLKCTRL); /* dummy read */
  45 }