git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/clk/clk-pxs2.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/bitops.h>
   8 #include <linux/io.h>
   9
  10 #include "../init.h"
  11 #include "../sc-regs.h"
  12
  13 void uniphier_pxs2_clk_init(void)
  14 {
  15         u32 tmp;
  16
  17         /* deassert reset */
  18         tmp = readl(SC_RSTCTRL);
  19 #ifdef CONFIG_USB_XHCI_UNIPHIER
  20         tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
  21 #endif
  22 #ifdef CONFIG_UNIPHIER_ETH
  23         tmp |= SC_RSTCTRL_NRST_ETHER;
  24 #endif
  25 #ifdef CONFIG_NAND_DENALI
  26         tmp |= SC_RSTCTRL_NRST_NAND;
  27 #endif
  28         writel(tmp, SC_RSTCTRL);
  29         readl(SC_RSTCTRL); /* dummy read */
  30
  31 #ifdef CONFIG_USB_XHCI_UNIPHIER
  32         tmp = readl(SC_RSTCTRL2);
  33         tmp |= SC_RSTCTRL2_NRST_USB3B1;
  34         writel(tmp, SC_RSTCTRL2);
  35         readl(SC_RSTCTRL2); /* dummy read */
  36
  37         tmp = readl(SC_RSTCTRL6);
  38         tmp |= 0x37;
  39         writel(tmp, SC_RSTCTRL6);
  40 #endif
  41
  42         /* provide clocks */
  43         tmp = readl(SC_CLKCTRL);
  44 #ifdef CONFIG_USB_XHCI_UNIPHIER
  45         tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
  46                 SC_CLKCTRL_CEN_GIO;
  47 #endif
  48 #ifdef CONFIG_UNIPHIER_ETH
  49         tmp |= SC_CLKCTRL_CEN_ETHER;
  50 #endif
  51 #ifdef CONFIG_NAND_DENALI
  52         tmp |= SC_CLKCTRL_CEN_NAND;
  53 #endif
  54         writel(tmp, SC_CLKCTRL);
  55         readl(SC_CLKCTRL); /* dummy read */
  56 }