git.sur5r.net Git - u-boot/blob - arch/arm/mach-uniphier/clk/clk-pxs2.c

   1 /*
   2  * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <linux/bitops.h>
   8 #include <linux/io.h>
   9
  10 #include "../init.h"
  11 #include "../sc-regs.h"
  12
  13 void uniphier_pxs2_clk_init(void)
  14 {
  15         u32 tmp;
  16
  17         /* deassert reset */
  18         tmp = readl(SC_RSTCTRL);
  19 #ifdef CONFIG_USB_DWC3_UNIPHIER
  20         tmp |= SC_RSTCTRL_NRST_USB3B0 | SC_RSTCTRL_NRST_GIO;
  21 #endif
  22 #ifdef CONFIG_NAND_DENALI
  23         tmp |= SC_RSTCTRL_NRST_NAND;
  24 #endif
  25         writel(tmp, SC_RSTCTRL);
  26         readl(SC_RSTCTRL); /* dummy read */
  27
  28 #ifdef CONFIG_USB_DWC3_UNIPHIER
  29         tmp = readl(SC_RSTCTRL2);
  30         tmp |= SC_RSTCTRL2_NRST_USB3B1;
  31         writel(tmp, SC_RSTCTRL2);
  32         readl(SC_RSTCTRL2); /* dummy read */
  33
  34         tmp = readl(SC_RSTCTRL6);
  35         tmp |= 0x37;
  36         writel(tmp, SC_RSTCTRL6);
  37 #endif
  38
  39         /* provide clocks */
  40         tmp = readl(SC_CLKCTRL);
  41 #ifdef CONFIG_USB_DWC3_UNIPHIER
  42         tmp |= BIT(20) | BIT(19) | SC_CLKCTRL_CEN_USB31 | SC_CLKCTRL_CEN_USB30 |
  43                 SC_CLKCTRL_CEN_GIO;
  44 #endif
  45 #ifdef CONFIG_NAND_DENALI
  46         tmp |= SC_CLKCTRL_CEN_NAND;
  47 #endif
  48         writel(tmp, SC_CLKCTRL);
  49         readl(SC_CLKCTRL); /* dummy read */
  50 }