2 * Copyright (C) 2013-2014 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
5 * SPDX-License-Identifier: GPL-2.0+
13 #include "../sc-regs.h"
15 #undef DPLL_SSC_RATE_1PER
17 int uniphier_ld4_dpll_init(const struct uniphier_board_data *bd)
19 unsigned int dram_freq = bd->dram_freq;
24 * Set 0xc(1600MHz)/0xd(1333MHz)/0xe(1066MHz)
25 * to FOUT (DPLLCTRL.bit[29:20])
27 tmp = readl(SC_DPLLCTRL);
37 pr_err("Unsupported frequency");
41 #if defined(DPLL_SSC_RATE_1PER)
42 tmp &= ~SC_DPLLCTRL_SSC_RATE;
44 tmp |= SC_DPLLCTRL_SSC_RATE;
46 writel(tmp, SC_DPLLCTRL);
48 tmp = readl(SC_DPLLCTRL2);
49 tmp |= SC_DPLLCTRL2_NRSTDS;
50 writel(tmp, SC_DPLLCTRL2);
52 /* Wait 500 usec until dpll gets stable */