2 * Copyright (C) 2016 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #include <linux/bitops.h>
9 #include <linux/delay.h>
10 #include <linux/errno.h>
12 #include <linux/sizes.h>
17 #define SC_PLLCTRL_SSC_DK_MASK GENMASK(14, 0)
18 #define SC_PLLCTRL_SSC_EN BIT(31)
19 #define SC_PLLCTRL2_NRSTDS BIT(28)
20 #define SC_PLLCTRL2_SSC_JK_MASK GENMASK(26, 0)
22 /* PLL type: VPLL27 */
23 #define SC_VPLL27CTRL_WP BIT(0)
24 #define SC_VPLL27CTRL3_K_LD BIT(28)
27 #define SC_DSPLLCTRL2_K_LD BIT(28)
29 int uniphier_ld20_sscpll_init(unsigned long reg_base, unsigned int freq,
30 unsigned int ssc_rate, unsigned int divn)
35 base = ioremap(reg_base, SZ_16);
39 if (freq != UNIPHIER_PLL_FREQ_DEFAULT) {
40 tmp = readl(base); /* SSCPLLCTRL */
41 tmp &= ~SC_PLLCTRL_SSC_DK_MASK;
42 tmp |= (487 * freq * ssc_rate / divn / 512) &
43 SC_PLLCTRL_SSC_DK_MASK;
46 tmp = readl(base + 4);
47 tmp &= ~SC_PLLCTRL2_SSC_JK_MASK;
48 tmp |= (41859 * freq / divn) & SC_PLLCTRL2_SSC_JK_MASK;
53 tmp = readl(base + 4); /* SSCPLLCTRL2 */
54 tmp |= SC_PLLCTRL2_NRSTDS;
55 writel(tmp, base + 4);
62 int uniphier_ld20_sscpll_ssc_en(unsigned long reg_base)
67 base = ioremap(reg_base, SZ_16);
71 tmp = readl(base); /* SSCPLLCTRL */
72 tmp |= SC_PLLCTRL_SSC_EN;
80 int uniphier_ld20_vpll27_init(unsigned long reg_base)
85 base = ioremap(reg_base, SZ_16);
89 tmp = readl(base); /* VPLL27CTRL */
90 tmp |= SC_VPLL27CTRL_WP; /* write protect off */
93 tmp = readl(base + 8); /* VPLL27CTRL3 */
94 tmp |= SC_VPLL27CTRL3_K_LD;
95 writel(tmp, base + 8);
97 tmp = readl(base); /* VPLL27CTRL */
98 tmp &= ~SC_VPLL27CTRL_WP; /* write protect on */
106 int uniphier_ld20_dspll_init(unsigned long reg_base)
111 base = ioremap(reg_base, SZ_16);
115 tmp = readl(base + 8); /* DSPLLCTRL2 */
116 tmp |= SC_DSPLLCTRL2_K_LD;
117 writel(tmp, base + 8);