2 * Copyright (C) 2016 Socionext Inc.
5 #ifndef UMC_LD20_REGS_H
6 #define UMC_LD20_REGS_H
8 #define UMC_CMDCTLA 0x00000000
9 #define UMC_CMDCTLB 0x00000004
10 #define UMC_CMDCTLC 0x00000008
11 #define UMC_INITCTLA 0x00000020
12 #define UMC_INITCTLB 0x00000024
13 #define UMC_INITCTLC 0x00000028
14 #define UMC_DRMMR0 0x00000030
15 #define UMC_DRMMR1 0x00000034
16 #define UMC_DRMMR2 0x00000038
17 #define UMC_DRMMR3 0x0000003C
18 #define UMC_INITSET 0x00000040
19 #define UMC_INITSTAT 0x00000044
20 #define UMC_CMDCTLE 0x00000050
21 #define UMC_SPCSETB 0x00000084
22 #define UMC_SPCSETB_AREFMD_MASK (0x3) /* Auto Refresh Mode */
23 #define UMC_SPCSETB_AREFMD_ARB (0x0) /* control by arbitor */
24 #define UMC_SPCSETB_AREFMD_CONT (0x1) /* control by DRAMCONT */
25 #define UMC_SPCSETB_AREFMD_REG (0x2) /* control by register */
26 #define UMC_ACSCTLA 0x000000C0
27 #define UMC_ACSSETA 0x000000C4
28 #define UMC_MEMCONF0A 0x00000200
29 #define UMC_MEMCONF0B 0x00000204
30 #define UMC_MEMCONFCH 0x00000240
31 #define UMC_MEMMAPSET 0x00000250
32 #define UMC_FLOWCTLA 0x00000400
33 #define UMC_FLOWCTLB 0x00000404
34 #define UMC_FLOWCTLC 0x00000408
35 #define UMC_FLOWCTLG 0x00000508
36 #define UMC_RDATACTL_D0 0x00000600
37 #define UMC_WDATACTL_D0 0x00000604
38 #define UMC_RDATACTL_D1 0x00000608
39 #define UMC_WDATACTL_D1 0x0000060C
40 #define UMC_DATASET 0x00000610
41 #define UMC_ODTCTL_D0 0x00000618
42 #define UMC_ODTCTL_D1 0x0000061C
43 #define UMC_RESPCTL 0x00000624
44 #define UMC_DIRECTBUSCTRLA 0x00000680
45 #define UMC_DCCGCTL 0x00000720
46 #define UMC_DICGCTLA 0x00000724
47 #define UMC_DICGCTLB 0x00000728
48 #define UMC_ERRMASKA 0x00000958
49 #define UMC_ERRMASKB 0x0000095C
50 #define UMC_BSICMAPSET 0x00000988
51 #define UMC_DIOCTLA 0x00000C00
52 #define UMC_DIOCTLA_CTL_NRST BIT(8) /* ctl_rst_n */
53 #define UMC_DIOCTLA_CFG_NRST BIT(0) /* cfg_rst_n */
54 #define UMC_DFISTCTLC 0x00000C18
55 #define UMC_DFICUPDCTLA 0x00000C20
56 #define UMC_DFIPUPDCTLA 0x00000C30
57 #define UMC_DFICSOVRRD 0x00000C84
58 #define UMC_DFITURNOFF 0x00000C88
61 #define UMC_MBUS0 0x00080004
62 #define UMC_MBUS1 0x00081004
63 #define UMC_MBUS2 0x00082004
64 #define UMC_MBUS3 0x00000C78
65 #define UMC_MBUS4 0x00000CF8
66 #define UMC_MBUS5 0x00000E78
67 #define UMC_MBUS6 0x00000EF8
68 #define UMC_MBUS7 0x00001278
69 #define UMC_MBUS8 0x000012F8
70 #define UMC_MBUS9 0x00002478
71 #define UMC_MBUS10 0x000024F8
73 #endif /* UMC_LD20_REGS_H */